Here are my collection of trends and predictions for electronics industry for 2015:
The computer market, once the IC growth driver per se, apparently is approaching saturation status. Communications industry is still growing (6.8%.). Automotive V2X, LED lighting and smart domestic objects are set to drive semiconductor market growth through the year 2020, according to market analysis firm Gartner.
Car electronics will be hot in 2015. New cars will have more security features, smart infotainment and connectivity in them. It is an are where smart phone companies are pushing to. Automotive Industry Drives Chip Demand article says that until 2018, the IC demand from automotive customers is expected to exhibit the strongest average annual growth — 10.8% on average. This is significantly higher than the communications industry, at second place with 6.8%. Demand drivers include safety features that increasingly are becoming mandatory, such as backup cameras or eCall. But driver-assistance systems are also becoming ubiquitous. Future drivers will include connectivity, such as vehicle-to-vehicle communications, as well as sensors and controllers necessary for various degrees of autonomous driving.
Power electronics is a $90 billion-per-year market. The market for discrete power electronics is predicted to grow to $23 billion by 2024 from $13 billion today. Silicon rules power electronics industry, but new materials are pushing to headlines quickly. In the power electronics community, compound semiconductors such as gallium nitride (GaN) are drawing more attention as they try to displace silicon based power devices, which have been doing the heavy lifting for the past 30 years or so. While silicon-based devices are predicted to remain predominant with an 87% share of the market, it is expected that SiC- and GaN-based components to grow at annual rates of 30% and 32%, respectively. There’s no denying the cost advantages that silicon possesses.
Chip designs that enable everything from a 6 Gbit/s smartphone interface to the world’s smallest SRAM cell will be described at the International Solid State Circuits Conference (ISSCC) in February 2015. Intel will describe a Xeon processor packing 5.56 billion transistors, and AMD will disclose an integrated processor sporting a new x86 core, according to a just-released preview of the event. The annual ISSCC covers the waterfront of chip designs that enable faster speeds, longer battery life, more performance, more memory, and interesting new capabilities. There will be many presentations on first designs made in 16 and 14 nm FinFET processes at IBM, Samsung, and TSMC.
There is push to go to even smaller processes, and it seems that next generation of lithography equipment are started to being used. Earlier expectation was for chipmakers to use traditional immersion lithography for production of 10 nm chip, but it seems that extreme ultraviolet (EUV) scanners that allows allow scaling to 10 nm or even smaller is being used. TSMC to Use EUV for 7nm, Says ASML. Intel and TSMC have been injecting money in ASML to push process technology.
2015 promises to see initial FPGA product releases and (no doubt) a deluge of marketing claims and counter-claims. One thing is certain: 2015 will not be boring. There will be FPGA products that use processes beyond 20nm, for example Altera and Xilinx have committed to use the TSMC 16nm FinFET technology. There is publicized (and rumored) race to get to production at 14nm has seen time frames for initial samples move into 2015. However, with both FPGA companies reporting gross margins of close to 70 percent, it would be possible for either company to take an initial hit on margin to gain key socket wins.
It seems that the hardware becomes hot again as Wearables make hardware the new software. Apple invest its time when it released the Apple Watch last quarter, going up against the likes of Google’s Android Wear and others in the burgeoning wearables area of design. Once Apple’s bitten into a market, it’s somewhat a given that there’s good growth ahead and that the market is, indeed, stable enough. As we turn to 2015 and beyond wearables becomes an explosive hardware design opportunity — one that is closely tied to both consumer and healthcare markets. It could pick up steam in the way software did during the smartphone app explosion.
There will be more start-up activity within hardware sector. For recent years, the software has been on the main focus on the start-ups, and the hardware sector activity has been lower. Hardware sector has seem some start-up activity with many easy to use open hardware platforms became available (make development of complex devices easier and reachable for smaller companies). The group financing (Kickstarter, Indiegogo, etc.) have made it possible to test of new hardware ideas are market-worthy and get finance to get them to production.
EEs embrace hackathons aand accelerators. Design 2.0 is bubbling up in the engineering community, injecting new energy into the profession. In many ways, it’s the new Moore’s Law. Easy to use open hardware development platforms have made it possible to design working hardware device prototypes within hackathons.
Silicon Startups Get Incubator article tells that there will be new IC start-up activity as semiconductor veterans announced plans for an incubator dedicated to helping chip startups design their first prototypes. Keysight, Synopsys, and TSMC have signed exclusive deals to provide tools and services to the incubator. Silicon Catalyst aims to select its first batch of about 10 chip startups before April.
MEMS mics are taking over. Almost every mobile device has ditched its old-fashioned electret microphone invented way back in 1962 at Bell Labs. Expect new piezoelectric MEMS microphones, which promise unheard of signal-to-noise ratios (SNR) of up to 80 dB (versus 65 dB in the best current capacitive microphones) in 2015. MEMS microphones are growing like gangbusters.Also engineers have found a whole bunch of applications that can use MEMS microphone as a substitute for more specialized sensors starting in 2015.
There will be advancements in eco-design. There will be activity within Europe’s Ecodesign directive. The EC’s Ecodesign Working Plan for 2015-2017 is currently in its final study stages – the plan is expected to be completed by January 2015. The chargers will be designed for lower zero load power consumption in 2015, as on February 2016, after the 5-watt chargers are no longer at no load connected consume more than 0.1 watts of power. Socket for power supplies values are defined in the new Energy Star standard VI.
LED light market growing in 2015. Strategies Unlimited estimates that in 2014 the LED lamps were sold $ 7 billion, or about 5.7 billion euros. In 2019 the LED lamps will already sold just over 12 billion euros. LED technology will replace other lighting technologies quickly. For those who do not go to the LED Strategies Unlimited permission difficult times – all other lamp technologies, the market will shrink 14 percent per year. The current lighting market growth is based on LED proliferation of all the different application areas.
IoT market is growing fast in 2015. Gartner is predicting a 30 percent compound annual growth rate for the IoT chip market for the period 2013 to 2020. The move to create billions of smart, autonomously communicating objects known as the Internet of Things (IoT) is driving the need for low-power sensors, processors and communications chips. Gartner expects chips for IoT market to grow 36% in 2015 (IoT IC marker value in 2014 was from $3.9 billion to $9 billion depending how you calculate it). The sales generated by the connectivity and sensor subsystems to enabled this IoT will amount $48.3 billion in 2014 and grow 19 percent in 2015 to $57.7 billion. IC Insights forecasts that web-connected things will account for 85 percent of 29.5 billion Internet connections worldwide by 2020.
With the increased use of IoT, the security is becoming more and more important to embedded systems and chip designers. Embedded systems face ongoing threats of penetration by persistent individuals and organizations armed with increasingly sophisticated tools. There is push for IC makers to add on-chip security features to serve as fundamental enablers for secure systems, but it is just one part of the IoT security puzzle. The trend toward enterprise-level security lifecycle management emerges as the most promising solution for hardened security in embedded systems underlying the explosive growth of interconnected applications. The trend continues in 2015 for inclusion of even more comprehensive hardware support for security: More and more MCUs and specialized processors now include on-chip hardware accelerators for crypto operations.
Electronics is getting smaller and smaller. Component manufacturers are continually developing new and smaller packages for components that are mere fractions of a millimeter and have board to component clearances of less than a mil. Components are placed extremely close together. No-lead solder is a relatively recent legislated fact of life that necessitated new solder, new fluxes, higher temperatures, and new solder processing equipment. Tin whisker problems also increased dramatically. You should Improve device reliability via PCB cleanliness, especially if you are designing something that should last more then few years.
Photonics will get to the circuit board levels. Progress in computer technology (and the continuation of Moore’s Law) is becoming increasingly dependent on faster data transfer between and within microchips. We keep hearing that copper has reached its speed limit, and that optics will replace copper for high-speed signals. Photonics now can run through cables, ICs, backplanes, and circuit boards. Silicon chips can now have some optical components in them using silicon photonics technologies. For more than 10 years, “silicon photonics” has attracted significant research efforts due to the potential benefits of optoelectronics integration. Using silicon as an optical medium and complementary metal-oxide semiconductor fabrication processing technology, silicon photonics allows tighter monolithic integration of many optical functions within a single device.
Enter electro-optical printed circuits, which combine copper and optical paths on the same board. Electro-optical PCBs use copper for distributing power and low-speed data, and optical paths for high-speed signals. Optical backplane connectors have been developed, as well as a technique to align the small waveguides to transceivers on the board. The next challenge is to develop waveguides on to boards where the tight bends don’t degrade performance to unacceptable levels.
3D printing will bring structural electronics. With 3D printing hot in the news, and conformable, flexible, or even printed electronics fitting any shape, it is only a matter of time before electronic circuits can be laid-out as part of the 3D-printing process, the electronic framework becoming an integral supporting part of any object’s mechanical structure. For example “structural batteries” have already been implemented in electric cars, in racing-car aerofoils, and in the Tesla pure electric car.
Superconductors are heating up again. Superconductivity will be talked again in 2015 as there were some advancements in the end of 2014. A group of international scientists working with the National Accelerator Laboratory in Menlo Park, Calif., have discovered lasers that can create conditions for superconductivity at temperatures as high at 140°F. The Massachusetts Institute of Technology (MIT) has discovered a law governing thin-film superconductors, eliminating much of the trial and error for companies that manufacture superconducting photodetector. With MIT’s new mathematical law, new superconducting chips can be designed with the correct parameters determined ahead of time.
Frost and Sullivan forecast that “PXI to disrupt automated test” between 2015 and 2018. They predict PXI to achieve $1.75B in annual sales by 2020, up from $563M in 2013. That’s an aggregate growth rate of over 17%. Not bad for an industry that has an overall secular growth rate of 3 percent.
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Tomi Engdahl says:
Intel’s 10nm Secrets Predicted
Quantum well FETs, germanium, InGaAs in mix
http://www.eetimes.com/document.asp?doc_id=1326410&
A semiconductor analyst is making a bold and detailed prediction about the process technology Intel Corp. will use for its next two generations. If he is right, the world’s largest chip maker is set to leapfrog the industry once again.
Intel will use quantum well FETs starting with its 10nm process, said David Kanter in an analysis posted on his Real World Technologies Web site. The new transistor structures will use two new materials – indium gallium arsenide (InGaAs) for n-type transistors and strained germanium for p-type devices, he said.
If correct, Intel could gain a capability as early as 2016 to produce 10nm transistors as much as 200 millivolts lower in power consumption than the rest of the industry. Kanter expects other chip makers will not be able to catch up with the techniques until their 7nm node, at least two years later.
It could take more than a year before Intel discloses its 10nm plans, Kanter said, giving his own predictions an 80-90 percent confidence level.
Tomi Engdahl says:
Astrodyne Corporation Acquires TDI Power
http://www.eeweb.com/company-news/astrodyne/astrodyne-corporation-acquires-tdi-power/
Last November 2014, Astrodyne Corporation officially announced its acquisition of TDI Power (“TDI”) from its private owners. TDI has been an innovation leader in power for defense, aerospace, telecommunications, data storage, and other demanding industries.
Tomi Engdahl says:
MEMS Seeks its Moore’s Law
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326431&
MEMS provide an alternative route to scaling technology beyond Moore’s Law that could have benefits in markets such as the Internet of Things.
Many industry pundits have declared that the cost-reduction aspect of Moore’s Law has already ended, even as linewidths continue to shrink. It is hard to imagine a world where annual step increases in processing power do not come as naturally as the changing seasons, but that time may be fast approaching. MEMS devices, however, and piezoelectric MEMS in particular, are a new technology, and 2015 may be the start of a Moore’s Law for MEMS.
Micro electromechanical systems (MEMS) are microscale devices that use silicon wafer-based manufacturing processes similar to those used in integrated circuit manufacture. Unlike classic ICs, which only operate in the electrical domain, MEMS devices are both mechanical and electrical systems that interact directly with the real world. Some of the most common applications include accelerometers, gyroscopes, microphones, pressure sensors, oscillators, energy harvesters and RF filters.
At their heart, MEMS devices are energy transducers: they take mechanical or chemical energy and transform it into electrical energy that is processed as information by ICs. It may be more intuitive to think of MEMS devices as information, rather than energy, transducers. A gyroscope or microphone, for example, takes information from the real physical world and transduces it into electrically represented information that can be processed by an integrated circuit, stored in digital media or transmitted as data.
Traditionally, this transduction is done via electrostatic sensing sometimes called capacitive transduction.
Decreasing the distance between the plates also will improve performance, but this creates another problem that has plagued electrostatic MEMS — stiction. If the plates are too close together, they will get stuck and possibly never come unstuck.
Piezoelectricity is an alternative transduction mechanism for MEMS that has been gaining ground.
Common industrial piezoelectric materials include lead zirconium tantalite (PZT), lithium niobate, lithium tantalate, aluminum nitride and quartz.
A breakthrough in piezoelectric MEMS occurred when RF filter manufacturers pioneered the use of sputtered AlN thin films to make FBAR- and BAW-type resonators for use in RF filtering.
AlN has many advantages: it is CMOS-compatible, it is deposited using low-cost sputtering, is straightforward to etch, and has many beneficial mechanical properties.
The only limitation on piezoelectric performance is the quality of the piezoelectric film itself, primarily the piezoelectric coefficient that governs how efficiently mechanical strain is transduced into electric charge. In many circumstances, piezoelectric transduction is more efficient than electrostatic.
Piezoelectric MEMS devices are reaching a period of accelerated commercialization
Piezoelectric MEMS have many properties that may make them capable of the same exponential scaling as planar transistors. Just as transistor cost reduction was driven by gate linewidth, piezoelectric MEMS size reductions are driven by thinner high-quality piezoelectric films.
Current piezoelectric films are typically around 1 micron, but researchers are growing films less than 25 nm thick.
One major difference between transistors and transducers is that one device processes information and the other transduces it. It makes sense to add millions of transistors to a single integrated circuit, but it is not yet obvious why anyone would want that many MEMS transducers.
For microphones, adding more transduction area will always improve the audio quality, and very large microphone arrays enable incredible beamforming capabilities, but it is not clear how many MEMS transducers are needed.
Tomi Engdahl says:
Basic University Research Key to Industry Progress
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326437&
A basic, precompetitive research base is required to continue to advancement of the semiconductor industry, says SRC president.
SRC has served as an integral partner to the semiconductor industry as well as academia and government by sponsoring the basic university research responsible for semiconductor technology advancements. In turn, these advancements have led to today’s range of sophisticated computing devices and applications that support our everyday lives.
The fact that SRC has been in operation since 1982 means we are doing something right. We think we probably set the record for the longest running consortium in any industry, but our ongoing mission simply affirms the critical role that university research plays in the future of technology and the U.S. economy in general.
Indeed, the world-class U.S. university system built through decades of steady government support serves as a foundation for public-private partnerships such as SRC.
As semiconductor technology continues to shrink devices dimensionally, it begins to approach the same size of biological information managing systems. This provides the opportunity to learn from nature to further advance semiconductor technology.
Therefore, it is critical to understand that today’s technology-based economy depends on a robust university research enterprise.
Furthermore, the effective collaborative research model requires three major pillars: namely industry, academia and government to work in unison—take any one of these out of the equation and the likelihood for success significantly diminishes.
Tomi Engdahl says:
Make Field-oriented Motor Control Affordable
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326445&
Shaft sensors and their wiring make field-oriented motor control pricey, but sensorless alternatives are available.
Field-oriented control has permanently changed the way engineers think about motor control. But in order to work, it needs to know the angle of the rotor flux axis. If you are willing to pay the high cost of a motor shaft sensor, painstakingly mount that sensor on said motor shaft, connect the long cable between the sensor and the control electronics, and deal with the noise susceptibility and intermittent connections of said cable, then there’s no problem. But, if like most people you prefer a more economical and robust solution, then we need to find another way to get flux angle information.
Most techniques to eliminate the shaft sensor depend on measuring other signals within the motor that are related to the flux signal. In some cases, these signals just naturally occur in a spinning motor and all we have to do is listen for them. Such algorithms fall into the category of passive techniques. Other signals only become visible if we actively stimulate the motor with higher-frequency signals.
Regardless of which technique you use, the signals of interest are often buried deep inside the motor and cannot be directly measured at the motor terminals. In such cases, we must employ a special algorithm called an observer to extract the desired signal(s) from other signals that we can observe outside the motor.
Before you close your browser in disgust, you should also know that the back-EMF vector always lies on the quadrature axis, so we are very close!
Wow! All these calculations, just to find the angle of the rotor flux vector! But considering the low cost of embedded MIPS compared to the high cost of a motor shaft sensor, it is still way worth the effort in most cases.
Tomi Engdahl says:
“The VIP-1 is the first world-class chip to be developed in Russia. It breaks new ground by integrating extremely rich functionality on a single die, including an embedded high-resolution unit for pre-processing of stereo-video streams, two RISC cores on an ARM platform, a powerful video processor for HD video streams and stereo-video streams, an integrated graphics core and a multi-standard navigation core,” Pimenow told us.
Source: http://www.eetimes.com/document.asp?doc_id=1326428&
Tomi Engdahl says:
Cypress Expands Error Correcting Code For SRAM
http://www.eetimes.com/document.asp?doc_id=1326434&
The overall market for SRAM is shrinking, but Cypress Semiconductor sees new opportunities in some as areas as traditional segments contract.
The company just announced it is sampling its latest SRAM with on-chip error-correcting code (ECC). The 4Mb asynchronous SRAMs with ECC do not need additional error correction chips, which allows for simplified designs and reduced board space.
The hardware ECC block performs all error correction functions inline without user intervention. The new devices are pin-compatible with current asynchronous fast and low-power SRAMs and include an optional error indication signal that indicates the correction of single-bit errors.
SRAM has been a niche, yet critical memory market because of its performance and speed for certain application such as networking, where it continues to fill a need as Internet traffic continues to grow exponentially. As network gear has moved to 400G linecards, the demand for SRAM bandwidth has scaled right along with it.
Although the overall SRAM market has been shrinking, Cypress has seen some growth in demand for automotive applications and the Internet of Things (IoT), such as wearables
In fact, the company sees the requirements of wearable electronics driving the resurgence of SRAMs, since size and power are critical factors.
Tomi Engdahl says:
Freescale Reveals NXP Mega Merger Details
http://www.eetimes.com/document.asp?doc_id=1326441&
In announcing yet another quarter of solid growth in product revenues and market shares in a Thursday (April 23) earnings call, Freescale Semiconductor CEO Gregg Lowe spoke confidently about the company’s upcoming merger with NXP Semiconductors.
Tomi Engdahl says:
EUV Deal Raises Questions
http://www.eetimes.com/document.asp?doc_id=1326446&
Analysts gave mixed reactions to news ASML Holdings NV has sold 15 extreme ultraviolet lithography systems to a U.S. customer. Few doubt Intel is the buyer, but the terms of the deal and what it says about the readiness of EUV for making semiconductors remains unclear.
Although in the works for decades, EUV lithography has so far failed to deliver the kind of throughput needed to make leading-edge chips due to a relatively weak light source. The company announced several improvements to the system along the way, but the latest results were still below production targets.
Just last fall, Intel Fellow Mark Bohr said EUV is “not ready yet — the throughput and reliability are not there,” he said speaking at the annual Intel Developer Forum.
At that event, Bohr said Intel sees a way to make 7nm chips cost effectively without EUV. Earlier he had said the same about 10nm although the company has not revealed details on either process node yet.
Others took a more upbeat view. “It is far too late for Intel to use EUV at 10nm, but the timing seems reasonable for 7nm,” said David Kanter of Real World Technologies.
Earlier this year, TSMC announced it exposed 1,000 wafers in 24 hours on an ASML NXE:3300B equipped with an 80W light source. The company is expected to use EUV at the 7nm node and try to retrofit it into its10nm process sometime after 10nm production starts. The new EUV deal suggests Intel may have similar plans.
There’s no doubt EUV is the industry’s leading candidate to avoid the costly process of using multiple patterning steps with today’s 193nm immersion litho systems
Tomi Engdahl says:
OrCAD PCB software turns 30
OrCAD founded in 1985, when the first PC-based software development of printed circuit boards. The name came from the company’s domicile, Oregon, and CAD tools. The first tool was the SDT or the Schematic Design Tools which began shipping in late 1985.
The next year, OrCAD expanded toolbox digital VST simulator and PCB tool, which succeeded the printed circuit board layout.
In 1999 Cadence Design Systems acquired the company.
Now OrCAD is a key part of the Cadence PCB tool selection.
Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2738:orcad-piirilevysofta-tayttaa-30-vuotta&catid=13&Itemid=101
Tomi Engdahl says:
Chasing 5G: Pizzacato, sigma delta and other architectures
http://www.edn.com/design/analog/4439205/Pizzacato–sigma-delta-and-other-architectures-chasing-5G?_mc=NL_EDN_EDT_EDN_today_20150427&cid=NL_EDN_EDT_EDN_today_20150427&elq=d8e7743b69a04b93b856d7cf815aade5&elqCampaignId=22726&elqaid=25562&elqat=1&elqTrackId=862246d94eed4b4884085b3187f4db31
Tomi Engdahl says:
Mentor has updated the popular PADS PCB design software. In the future, PADSista is offered in three different versions. The lowest price for the tool enters the five-thousand-dollar license.
Hundreds of thousands of designers have used PADSia millions of the designs into the circuit board, Mentor says. Mentor PADS portfolio primarily serves the individual designers.
Mentor has business development to David Wiensin, five tons of soft circuit board is less than the appropriate time “sweet spot”.
Because the price is now the standard PADS to succeed in making the circuit diagram and component placement. PADS Standard Plus more tools for the design and simulation of congestion management opportunities. The Plus version of the price is $ 10 000.
PADS family, the most powerful version of the PADS Professional ( $ 18 000).
For big teams is more suited to the needs of Xpedition environment.
Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2742:uusi-pads-tayttaa-suunnittelijan-kaikki-tarpeet&catid=13&Itemid=101
More information: http://www.pads.com/
Tomi Engdahl says:
Inductive sensing redefined
http://www.ti.com/lsds/ti/sensors/inductive-sensing-multi-channel-ldc.page?DCMP=multichldcs&HQS=tlead-sensing-sva-psp-ssp-multichldcs-vanity-lp-en
TI has introduced the world’s first multichannel inductance-to-digital converters (LDCs), delivering a combination of precision sensing and multichannel functionality that enables the design of high dynamic range position and motion sensing solutions. The new LDC1614 family joins the award-winning LDC portfolio offering two or four matched channels and up to 28-bit resolution in a single IC.
Tomi Engdahl says:
High-End PCB Design Made Affordable
PADS $ entry point half industry average
http://www.eetimes.com/document.asp?doc_id=1326450&
Electronic design automation company Mentor Graphics Corp. (Wilsonville, OR) has a deal it thinks printed circuit board developers can’t refuse: a new family PCB design tools based on its well-known PADS platform. At the low end, it is priced at half that of competing midrange suites. At the other extreme, it has capabilities previously only available on high-end design tools such as its own Xpedition Enterprise.
“These engineers are usually involved in doing PCB related activities outside a company’s mainstream production efforts: building prototypes, validating reference designs, and performing manufacturability studies,” said Wiens. “What they need are many of the capabilities of a full high-end tool for performing the complete design, analysis, and manufacturing data delivery of printed circuit board (PCB) electronic products. Not needed is the costly and complex usage arrangements associated with the high end.”
Meeting the needs of PCB developers
To meet the needs of this ignored, but growing, category of developers, Mentor Graphics has expanded its existing PADS platform to offer three options: PADS Standard, Standard PLUS and Standard Professional. At the same time, it has dropped the entry point from the current $10,000 average in the industry to $5,000 for an unlimited usage license on its baseline PADS Standard.
“What we wanted to do with PADS is offer a PCB design framework that was attractive to the independent developer both in terms of cost and capability and that would not force him to make choices between the two.”
Mentor Graphics’ new suite of PADS tools now includes three levels of design capability and pricing:
1. PADS Standard – Schematic and PCB layout with starter parts library, part creation Wizard, and archive management priced at $5,000 including support.
2. PADS Standard Plus – PADS Standard, plus advanced constraint management, high speed net constraints and routing, central library creation and management, signal/thermal/analog simulation, and variants design priced at $10,000, including support.
3. PADS Professional – PADS Standard Plus, with the addition of high-end design tools such as sketch routing, simultaneous 2D/3D layout, hierarchical placement planning, component and net explorers, and manufacturing prep and design review/compare, priced at $18,000, including support.
Tomi Engdahl says:
Brit Boffins EXPLODE Li-On batteries and film the MELTING COPPER
This is why Lenovo is recalling ThinkPads
http://www.theregister.co.uk/2015/04/29/boffins_blow_up_batteries_so_you_dont_have_to/
Video UK boffins have taken a close-up of what happens with Li-ion batteries when they get hot under the collar, and it’s not pretty.
As Lenovo, Boeing, Tesla, Sony and others will attest, Li-ion battery fire-safety is worth researching.
Or, to be more scientific: when the batteries break down exothermically, it generates a lot of heat, and since that heat can’t escape, the battery suffers a catastrophic failure.
What the boffins spotted included pockets of gas forming and venting inside the battery. They also found that with the right internal support, a battery can remain relatively intact in the runaway process – up until around 1,000°C when the copper melted.
“In contrast, the battery without an internal support exploded causing the entire cap of the battery to detach and its contents to eject. Prior to thermal runaway, the tightly packed core collapsed, increasing the risk of severe internal short circuits and damage to neighbouring objects”, the university says.
Tomi Engdahl says:
New demands on DC-link power capacitors
http://www.edn.com/design/power-management/4439255/New-demands-on-DC-link-power-capacitors-?_mc=NL_EDN_EDT_EDN_analog_20150423&cid=NL_EDN_EDT_EDN_analog_20150423&elq=374b79fda156427da1edac6b6aa9eb52&elqCampaignId=22676&elqaid=25513&elqat=1&elqTrackId=563c649dde914f2f90d4c48c798d6242
Following the trends in power electronics both automotive and industry applications need compact, reliable and cost effective components to reach the major targets increased power density and miniaturisation. Key technologies like fast switching semiconductors are already successful used in the market today.
Since electronic components and its characteristics become more and more complex, design solutions have to be found on system level and in addition, the interaction of active and passive devices needs to be understood in detail. Especially during semiconductor switching, the DC-link capacitor as part of the commutation loop has a lasting effect on the behaviour and efficiency of the application. Different power electronic designs use low inductive assemblies of semiconductors and DC-link capacitors to lower the voltage overshoot during turn-off [4]. In most cases, system designers have to deal with capacitors of big volume and large commutation loops. The new capacitor technology “CeraLink™” which is described in this paper and was introduced earlier in [1] and [2], shows high capacitance density as well as a very low self-inductance to keep the commutation loop inductance as low as possible.
DC-link capacitors are used in most power converters to stabilize the DC-link voltage by balancing the interim difference between the input source and the output load. The voltage ripple needs to be minimised to avoid electrical stress to the source and semiconductors as well as to comply with EMI requirements.
To a large extent, the package of a motor inverter is driven by the DC-link capacitor size [3]. Therefore high capacitance density is a major key parameter to decrease the inverter volume and to increase the power density. Together with a high current handling capability, a low self-inductance and an optimized connection technique, a compact DC-Link should be achieved.
Tomi Engdahl says:
Surface-mounted module to understand all satellite navigation systems
Swiss u-blox has introduced a miniature surface mount positioning module, which supports all satellite systems, as well as the simultaneous positioning on the basis of various signals. The module has a size of only 9.6 x 14 mm (1.96 mm thick).
CAM M8C module includes an integrated broadband antenna which captures the entire L1alueella signals. Receiver sensitivity is -167 dBm, so it works well in poor reception conditions.
The module is able to use at the same time GPS and Glonass signals GPS and Beidou signals or Glonass and Beidou signals.
Source: http://www.etn.fi/index.php?option=com_content&view=article&id=2701:pintaliitettava-moduuli-ymmartaa-kaikkia-satelliitteja&catid=13&Itemid=101
Tomi Engdahl says:
TI integrated high speed SoC including Digital Front End and JESD204B
http://www.edn.com/electronics-products/electronic-product-reviews/other/4439282/TI-integrated-high-speed-SoC-including-Digital-Front-End-and-JESD204B?_mc=NL_EDN_EDT_EDN_systemsdesign_20150429&cid=NL_EDN_EDT_EDN_systemsdesign_20150429&elq=578c645627064bb6ac4df2f49ea8352f&elqCampaignId=22760&elqaid=25604&elqat=1&elqTrackId=980e4651d4d14402bb8b83ea759ae415
Throughout my 42 year career in electronics, I have seen the battle of portions of FPGA solutions in telecom infrastructure being replaced by Graychip’s Digital Pre-Distortion IC solution, saving power, cost and size in highly dense base station PC cards. Then, years later, emerging FPGA technology replacing such optimized IC solutions as the Graychip Digital Pre-Distorion IC as that technology leap-frogged the customized solution.
Well, once again, Texas Instruments is providing a system optimized alternative to FPGAs, TI’s 66AK2L06, This is a software programmable solution that delivers market enabling performance at up to 50 percent cost and power reduction. So this time an SoC leap-frogs over FPGAs.
JESD204B is a highly efficient, industry-standard serial communications link that simplifies the digital data interface between data converters and processors in high-speed applications, such as test and measurement, medical, defense and avionics.
Designers will benefit from TI’s Digital Signal Processing (DSP) programmability and pre-validation of multiple high speed ADCs, DACs and AFEs. TI’s system level solution is further enabled on the TI SoC by the Multicore Software Development Kit (MCSDK) and RF Software Development Kit (RFSDK). Faster time to market is always a goal of today’s designers to beat the competition in getting a critical solution out in the field.
Tomi Engdahl says:
Test-executive upgrade streamlines power testing
http://www.edn.com/electronics-products/other/4439295/Test-executive-upgrade-streamlines-power-testing?_mc=NL_EDN_EDT_EDN_today_20150429&cid=NL_EDN_EDT_EDN_today_20150429&elq=9e8043274014479683a5626d52624b09&elqCampaignId=22768&elqaid=25617&elqat=1&elqTrackId=cba03422163a4c2798ed760d494d1b1b
PowerStar 6, the latest version of Intepro Systems’ test executive software, provides a number of features intended to make the testing of power electronics easier, such as an expanded drag-and-drop test library and an integrated configuration manager that allows switching between system configurations without restarting.
Intepro’s program-without-coding method allows for instrument setup and DUT-output test parameters to be defined using drag-and-drop test routines and fill-in-the-blank test screens. The updated test library includes new AC loads, DC loads, high-power AC sources, scanners, measurement devices, and various instrument communication buses—I2C, SPI, RS-232, TTL serial, MIL-STD-1553, Modbus, and CAN.
Tomi Engdahl says:
How the 3 Cs Drive IC Consumption
http://www.eetimes.com/document.asp?doc_id=1326471&
The communications, computers and consumer electronics sectors are set to be responsible for more than 70 percent of IC sales in every geographic region—Americas, Europe, Japan, and Asia-Pacific—in 2015, according to market research firm IC Insights.
Communications and computers lead in all regions with consumer electronics coming third in the Americas, Japan and Asia-Pacific. In Europe the third largest sector in 2015 will be automotive, IC Insights forecasts.
Collectively, communications, computers, and consumer systems are projected to account for 85.7 percent of IC sales in the Americas this year compared to 77.9 percent in Japan and 90.8 percent in Asia-Pacific. Communications, computer, and automotive applications are forecast to represent 82.3 percent of IC sales in Europe in 2015.
Computer applications were the largest market for IC sales for three decades but the global communications IC market took over the top spot in 2013 due to the strengthening demand for smartphones and weakening demand for personal computers.
Tomi Engdahl says:
High Costs Hint IoT SoC Design Shakeout?
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326475&
Semico hopes to identify features and technologies that are “exclusive to IoT applications.”
Let’s face it. Practically every tech company is dazzled, or more accurately, dazed by the sheer volume of the projected IoT market — “50 billion devices to be connected to the Internet by 2020” — as predicted by Cisco.
I’m not about to dispute that forecast. But I am curious to find out how that translates into the SoC market.
As Wawrzyniak sees it, every chip vendor gunning right now for the IoT market is picking only “a niche or two” where they think they can win.
Unlike smartphone apps processors, for example, the IoT SoC platform, even if there is such a thing, is unlikely to cover a full range of needs. After all, IoT is a wildly diversified and fragmented market.
The three obvious building blocks identified as necessary in IoT end-node devices are sensors, MCUs, and wireless connectivity.
Fraud concept?
“The concept that ‘super cheap chips have to be there’ [to kick start IoT] is fraud,” Wawrzyniak noted.
By going cheap, he explained, you leave out potentially critical factors like security, regarded by some as a linchpin. In some IoT device use cases, WiFi connectivity could be also necessary.
In recent months, you might have noticed more talk in the media about IIoT, the Industrial Internet of Things. The IoT industry might be waking up to the fact that IoT for home is really the hardest trick to pull off.
If a home comes with 30 connected devices (not just connected light bulbs but everything else) running 70 individual apps, the inevitable question is who is going to maintain and manage the network, asked Wawrzyniak.
Unlike Industrial IoT, with budgets to pay for professionals to manage the network, not many homeowners are going to spring for a live-in IoT manager, he explained.
If we’re talking about a standalone IoT device — like a door knob or thermostat — to be used at a single point in the home, there’s no problem. But once such a device gets connected to something else, the whole shebang suddenly becomes “a system,” he cautioned.
What matters, said Wawrzyniak, is how deep to embed a connected device into the network.
He acknowledged that the addition of an IoT SoC category is more complicated than it seems, because SoCs created for IoT solutions could easily leak into other applications. Similarly, the existing SoC categories could share certain features with the IoT category.
In a recent Semico report entitled “SoC Silicon and Software Design Cost Analysis: How Rising Costs Impact SoC Design Starts” issued in March, 2015, Warzyniak states that design costs for both the silicon and software efforts, will rise at a 43.7% CAGR through 2018.
“Even after the number of most expensive designs drops back to more normal levels, the designs in red continue to climb.”
Tomi Engdahl says:
Intel Loses Mobile Vet in Reorg
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326480&
In its latest reorg, Intel said goodbye to veteran Mooly Eden who helped pioneer the x86 giant’s move into low power processors.
In its latest reorg, Intel has moved a lot of folks around, shoved a couple sideways and in the process lost one of its most colorful and successful leaders.
Tomi Engdahl says:
eGaN FETs have surpassed Silicon performance and now have lower price
http://www.edn.com/electronics-products/electronic-product-reviews/other/4439334/eGaN-FETs-have-surpassed-Silicon-performance-and-now-have-lower-price?_mc=NL_EDN_EDT_EDN_productsandtools_20150504&cid=NL_EDN_EDT_EDN_productsandtools_20150504&elq=ee1dfecc5a4341a9b066f199a3cf2381&elqCampaignId=22836&elqaid=25698&elqat=1&elqTrackId=9796961486e6449597f80f5f76c5a48d
When I met Alex Lidow back in 2011 at APEC, he promised me that in four years he would be able to have eGaN pricing lower than Silicon MOSFETs. So far Lidow has come through on all his promises regarding high speed, applications (like wireless power transmission, Class-D audio, LIDAR, 4G/LTE base stations) and no package for his eGaN devices. Now, once again, he has kept his promise—eGaN now has a lower price than equivalent Silicon.
Efficient Power Conversion has introduced a new family of eGaN FETs with better performance, smaller size, high reliability, and lower system cost than an equivalent Silicon solution. The EPC2035 and EPC2036 are compared with power MOSFETs having comparable maximum rated on-resistance (RDS(ON)) and have the same maximum rated breakdown voltage (VDS(max)).
Performance in an actual circuit
EPC built up a buck converter using the 60 V EPC2035 in a 48V input with a 5V output DC/DC POL converter
Test these out for yourselves with the 2” x 1.5” half bridge topology development boards including gate drivers, along with supply and bypass capacitors.
Pricing for the EPC2035 power transistors at 1K units is $0.36 each and $0.38 for the EPC2036. The 10K unit prices are $0.29 and $0.31 respectively.
So Lidow and his team have kept this lower price promise as well for eGaN devices. There are too many GaN companies out there that talk a good story but do not deliver with results that you can use in your circuit designs for full production.
Tomi Engdahl says:
New PADS products embrace budget-conscious engineers
http://www.edn.com/electronics-products/other/4439308/New-PADS-products-embrace-budget-conscious-engineers?_mc=NL_EDN_EDT_EDN_today_20150504&cid=NL_EDN_EDT_EDN_today_20150504&elq=154338305b214e8f903004ea8944a2ac&elqCampaignId=22827&elqaid=25689&elqat=1&elqTrackId=780eb4992bb74bce9d8e266f77677b68
Mentor Graphics has announced three new PADS family products starting at the unprecedented pricing of five thousand dollars, a price tag that corresponds to where competitor Altium was delving about 5 years ago when the company had slashed its pricing by 50 percent.
Since then, inflation and tool upgrades have brought back the competition’s most comparable products within the 10,000 dollars price range, hence the new found opportunity for Mentor to address what the EDA company describes as the advancing needs of the independent engineer.
These independent engineers are typically part of a small to mid-sized company, or members of an isolated team within a large enterprise
In the past, for engineers doing complex design, their only option was to look at enterprise solutions, and for many, these solutions were out of their reach due to budget and heavy infrastructure requirements.
Todays lower-priced offerings run out of steam and do not support their complete needs since their design process can often include more than schematic entry and layout of the PCB, but may also require analysis such as signal integrity, thermal, design-for-manufacturability, and power distribution network integrity.
With the delivery of three new PADS products (Standard, Standard Plus and Professional)
PADS Standard offers schematic and PCB layout with a starter parts library, part creation wizard and archive management priced at $5,000 USD including support.
Tomi Engdahl says:
Tiny real-time clock consumes only 240 nA
http://www.edn.com/electronics-products/other/4439327/Tiny-real-time-clock-consumes-only-240-nA?_mc=NL_EDN_EDT_EDN_productsandtools_20150504&cid=NL_EDN_EDT_EDN_productsandtools_20150504&elq=ee1dfecc5a4341a9b066f199a3cf2381&elqCampaignId=22836&elqaid=25698&elqat=1&elqTrackId=56d0e75ebaa045d693f2018cfdab3f8d
Furnished in a ceramic surface-mount package that is just 3.2×1.5×0.8 mm, the RV-8803-C7 real-time clock module from Swiss manufacturer Micro Crystal consumes 240 nA and operates from a supply voltage as low as 1.5 V to increase the life of backup supplies.
The device gives designers the option to replace expensive batteries and supercapacitors with low-cost multilayer ceramic capacitors for battery backup.
Standard clock and calendar functions track seconds, minutes, hours, and years. Other functions include timer, alarm, temperature sensing, and time-stamped event input.
Tomi Engdahl says:
Complete the simulation of your ADC with IBIS
http://www.edn.com/electronics-blogs/bakers-best/4439345/Complete-the-simulation-of-your-ADC-with-IBIS-?_mc=NL_EDN_EDT_EDN_today_20150504&cid=NL_EDN_EDT_EDN_today_20150504&elq=154338305b214e8f903004ea8944a2ac&elqCampaignId=22827&elqaid=25689&elqat=1&elqTrackId=6b42020884944dc19f44c3dd5d87740d
The easy-to-use successive-approximation analog-to-digital converters (SAR-ADCs) may not be as easy as you think. In my last article for EDN, “Simulating the front end of your ADC,” we talked about macro-models that allow the simulation of the SAR-ADC analog interfaces (VIN and REFIN).
In the analog evaluation, the ADC driving amplifier and voltage reference are an integral part of a mixed-signal circuit. In the digital domain, the input/output terminals of the SAR-ADC, connecting digital chips and PCB traces fall into the digital simulation category.
Now, let’s go into the digital simulation domain. It is prudent to be concerned about the integrity of the digital interface, which involves a converter input clock, output data stream, and various digital control signals. If you have not looked at your board-level transmission line overshoot, undershoot, or crosstalk problems, it is possible to inadvertently compromise the signal-integrity of the clock or data signals.
Simulating the front-end of your ADC
http://www.edn.com/electronics-blogs/bakers-best/4438800/Simulating-the-front-end-of-your-ADC
The determination of the ADC analog input stage simulations rely on voltage and current accuracy. This is where the analog SPICE macro-models come in handy. The PCB digital signal-integrity relies on timing, voltage-current levels, and parasitics. This is where the digital IBIS model comes into play. The discussion about IBIS is coming next month, but let’s address the simulation environment with ADCs.
Tomi Engdahl says:
Engineer Building Google for Chips
http://www.eetimes.com/document.asp?doc_id=1326499&
While working at Micrel and Touchstone Semiconductor, Javier Solorzano took calls from engineers who couldn’t find datasheets, chip prices or performance models of parts they wanted. Now he’s trying to turn those frustrations into an opportunity.
Solorzano co-founded startup Elektet to create a Web site to help engineers find and manage information about chips they want to use. With more than 40 such sites already on the Web – beyond the 800-pound gorilla called Google — he knows the job is an ambitious one.
“We are starting with a parametric search engine which is no different than what others have, but we will focus on adding other information engineers need,” Solorzano said.
In June, Elektet will post a beta site with the search engine and take feedback from engineers on its look and feel. Then he will get started on the tools, aiming for a full release early next year.
Tomi Engdahl says:
XeThru Technology is One to Watch
http://www.eetimes.com/document.asp?doc_id=1326513&
Novelda, under the leadership of CEO Alf-Egil Bogen, is seeking the market pull rather than relying on the technology push of its CMOS impulse radar technology.
using its X2 transceiver IC as a building block for multiple application-specific radar modules
It could also mean that just offering the X2 transceiver, as Novelda has been doing for a year, has not proved such an easy sell.
The module-based approach also gives Novelda many opportunities to gain a significant market win; they just have to do a bit more of the engineering. The opportunities are clearly broad from consumer to the smart-home to the smart-city, in the automobile and on to health and medical applications.
One can imagine the technology ending up in the hands of a Qualcomm, Texas Instruments, NXP/Freescale or STMicroelectronics.
Tomi Engdahl says:
Lattice Deal: Harbinger of FPGA & ASSP Union
http://www.eetimes.com/document.asp?doc_id=1326508&
Darin Billerbeck, president and CEO at Lattice Semiconductor, after its acquisition of Silicon Image in March, believes the marriage of FPGA company to an ASSP firm is a match made in heaven.
Billerbeck said in a recent phone interview with EE Times, “That’s why Intel wants Altera. It’s obvious.”
How obvious depends on where you sit in the electronics market.
Lifecycle pitch
There are many positives in Lattice’s acquisition of Silicon Image. Strategic reasons for the merger, pitched by Lattice, include a larger economy of scale, a focus on consumer electronics, an arsenal of IPs from Silicon Image and a diversified customer base.
But the Lattice CEO’s favorite pitch is the “lifecycle” story.
He describes the merger as “a first of its kind in the semiconductor industry” in which a single company brings together the complementary attributes of FPGAs and ASSPs.
He said, “If Lattice puts the Silicon Image IP (HDMI for example) into their FPGAs, then the customers could get to market faster. They can do so while waiting for the ASSP to become available, or having their SoC design to get done, assuming they had licensed the IP from Lattice.”
USB 3.1 Type-C
USB 3.1 Type-C is one of the immediate and clear opportunities for Lattice. The industry’s first single-chip USB Type-C port controllers were originally designed by Silicon Image and announced in March.
Gartner’s Reitz called the USB 3.1 Type-C “essentially a superset of MHL.” Silicon Image’s IP on MHL can help make what’s likely to become very popular USB Type-C products even better. It offers backward compatibility with a large base of MHL-equipped consumer products, she noted.
“You can make the choice at that point to do a hardened ASSP all the way across, or leave some programmability on there, thus giving some flexibility not as much as you would have with an FPGA, but at much lower costs.”
Other FPGA – ASSP mergers
Although Lattice calls the Lattice-Silicon Image the “first of its kind in the semiconductor industry” as a single company offering both FPGAs and ASSPs, there are precedents. Gartner’s Reitz cited Microsemi Corp.’s acquisition of Actel in October, 2010.
“It may be just differences in semantics,” said Reitz. Lattice might regard Microsemi as an analog company, rather than an ASSP vendor.
With Actel bringing widely-used mixed-signal, radiation tolerant FPGA products, Microsemi today has SoC FPGAs, called SmartFusion2, designed for IoT infrastructure.
Tomi Engdahl says:
China Advantage Wanes for OEMs
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326512&
Once the clear winner for OEMs in terms of low-cost manufacturing, China may soon be less compelling for electronics OEMs.
Once the go-to low-cost manufacturing location for the electronics industry, China’s reign may be waning as the top pick. In fact, some OEMs are heading back to the U.S. hoping to get supply chain advantages and better total cost.
Although currently reductions in manufacturing are just a small blip in the bigger picture, it’s a trend that points to a larger reality. “The HSBC China Manufacturing PMI rose to 49.7 in the final reading for January, from 49.6 in December, and revised down from the flash reading of 49.8,”
“Both new orders and new export orders saw downward revisions, but still signaled marginal expansion. We think demand in the manufacturing sector remains weak and more aggressive monetary and fiscal easing measures will be needed to prevent another sharp slowdown in growth.”
Tomi Engdahl says:
Chip Market Growth Strong Q1 in US, China
http://www.eetimes.com/document.asp?doc_id=1326531&
The global chip market continued to be a tale of contrasting fortunes with Europe and Japanese markets contracting and the Americas and China enjoying double-digit percentage annual growth, according to the Semiconductor Industry Association (SIA), reporting data compiled by the World Semiconductor Trade Statistics (WSTS) organization.
The three-month average of global chip sales in March was $27.71 billion, an increase of 6.0 percent compared with the equivalent figure from a year before, the SIA said. For the fourth month in a row the annual growth rate has declined suggesting 2015 will be a lower growth year than 2014, although much will depend on the third quarter.
“Despite macroeconomic challenges, first quarter global semiconductor sales are higher than they were last year, which was a record year for semiconductor revenue,
Tomi Engdahl says:
Knowles Buys Audience for $85 Million
http://www.eetimes.com/document.asp?doc_id=1326532&
MEMS microphone supplier Knowles Corp. (Itasca, Illinois) has agreed to acquire Audience Inc. (Mountain View, Calif.) for $85 million net of a cash balance of $44 million.
Audience is a provider of audio and noise suppression processors for Android equipment and recently acquired software company sensor platforms for $41 million to help it expand into sound-plus-motion context awareness.
The combination of Knowles and Audience provides an alternative to Cirrus Logic, a market leader that acquired Wolfson Microelectroncs plc in 2014. Microphones and audio processors with extremely low power for always-on are being deployed for use as wake-up systems in mobile equipment.
“Audience and Knowles have pioneered the revolution in connected device audio capabilities,” said Peter Santos, CEO of Audience, in the same statement. “The combination of the audio and sensory intelligence of Audience and the acoustic expertise and scale of Knowles creates a truly unique audio and sensory systems company.”
Tomi Engdahl says:
Understanding Your Power Profile from RTL to Gate-level Implementation
http://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-understanding-switching-activity-powerreports-2015Q2.aspx?elq_mid=6557&elq_cid=303473&elq=da0e8d1bd97948eba939aab2945b9e92&elqCampaignId=308&elqaid=6557&elqat=1&elqTrackId=74bb1e3d11544669829cd32c406d1b98
Switching activity information from RTL simulations can be used to optimize the design for dynamic power during synthesis. However, switching activity in RTL and gate-level simulations can show wide power profile variations in the design. This article describes how to optimize for dynamic power with switching activity information and how to identify and reduce differences in the RTL and gate-level-based switching activity power profiles after synthesis. – See more at: http://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-understanding-switching-activity-powerreports-2015Q2.aspx?elq_mid=6557&elq_cid=303473&elq=da0e8d1bd97948eba939aab2945b9e92&elqCampaignId=308&elqaid=6557&elqat=1&elqTrackId=74bb1e3d11544669829cd32c406d1b98#sthash.PtzcOeuS.dpuf
Tomi Engdahl says:
Embedding Vision in Next-Generation SoCs
http://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-embedding-vision-nextgen-socs-2015Q2.aspx?elq_mid=6557&elq_cid=303473&elq=da0e8d1bd97948eba939aab2945b9e92&elqCampaignId=308&elqaid=6557&elqat=1&elqTrackId=38620e4bd932477ca3f6c8a07fd078d0
Computer vision is the acquisition, processing, analysis and understanding of real-world visual information with computers. Until recently this was only possible on PCs and other high-end machines, but the advance of microprocessor technology is now enabling designers to integrate computer vision into SoCs. The resulting practical and widely deployable embedded vision functionality is showing up in emerging consumer applications such as home surveillance, gaming systems, automotive driver assist systems, smart glasses and augmented reality. This is giving rise to a whole new class of embedded processors, designed specifically for embedded vision and offering very high vision performance, but at the low power-consumption levels required for embedded applications. Embedded vision technology is included in an increasing number of SoC designs and will have a profound impact on many aspects of our lives. – See more at: http://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-embedding-vision-nextgen-socs-2015Q2.aspx?elq_mid=6557&elq_cid=303473&elq=da0e8d1bd97948eba939aab2945b9e92&elqCampaignId=308&elqaid=6557&elqat=1&elqTrackId=38620e4bd932477ca3f6c8a07fd078d0#sthash.ATFnQxg2.dpuf
Tomi Engdahl says:
How Close Can We Put Different Voltage Regions Together?
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326098&
How best to deal with the impact of multiple voltages on the integrity of your layout and your circuit
Using multiple voltages on a single die has been a reality for a very long time.
Whether you need to mix high-voltage analog with low-voltage memory, or mix multiple VDDs on the same digital chip, you have to deal with the impact of multiple voltages on the integrity of your layout and your circuit. Also, whether you are concerned more about signal integrity or long-term reliability, the fundamental question becomes – how close can I put these different voltage regions before there are problems?
There are more voltages, and many, many more power domains. Also, to save space on your die, you may need to route high-voltage lines through areas that are predominantly low-voltage.
calls for a polygon-level voltage-dependent DRC checking methodology.
For digital designs, therefore, we recommend using an automated tool to propagate the voltages from pins to all of the internal net. It should be able to propagate voltages from each of the pins to the internal nodes, thus providing the full dynamic range for each internal net.
Tomi Engdahl says:
Nvidia Exits LTE Modems
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326546&
While having an integrated modem is still a critical differentiator in some applications, not having one will not preclude Nvidia from succeeding in other applications.
Nvidia made it official that it is winding down the LTE modem business that it purchased from Icera in 2011. The decision does not come as a complete surprise, as the company has more recently focused on gaming, automotive, enterprise graphics and the cloud applications. These are areas where Nvidia has had recent success leveraging its GPU expertise, but these applications do not require modem technology. The Tegra product line in particular has been refocused on gaming platforms and automotive applications.
Icera was one of the many LTE start-ups that were swallowed up in the cellular modem and wi-fi grab that occurred several years ago.
When Icera was purchased, well over a dozen semiconductor companies were vying for a piece of the growing smartphone market, which shipped over 1.2 billion units in 2014. Since then, companies like Broadcom, TI, Freescale, Renesas Mobile, and ST-Ericsson have all exited the mobile market. In addition, many of the leading smartphone vendors like Apple, Samsung, and Huawei, have begun using their own applications processors, which account for over a third of the total market. As a result, there are only two remaining major smartphone chipset providers, Qualcomm and MediaTek, and a handful of Chinese start-ups competing for the rest of the market.
At the same time, competing in the market for discrete or integrated modems has become more challenging. Wireless carriers in developed markets have rapidly shifted to new LTE revisions and adopted new features, such as carrier aggregation, to improve performance and network efficiency, as well as providing differentiation to competitors.
Tomi Engdahl says:
Computing Needs a Reboot
Old techniques running out of gas
http://www.eetimes.com/author.asp?section_id=36&doc_id=1326520&
Engineers need to explore new computing paradigms to fuel future performance advances.
An estimated $200 million in economic activity was lost in New York City during the blizzard of 2015. One reason that snowstorm was not predicted correctly that got lost in the debates and finger pointing: computers are not getting faster.
For years, it’s been true that about every year and a half, computers in general doubled in speed. It used to be due to Moore’s Law, the observation by Intel co-founder Gordon Moore that the semiconductor industry was increasing the density of transistors per unit area every 18 months.
Over time, the architecture of computers started to be the limit. Around 1995, the industry started to execute programs in parallel. This was the era of instruction-level parallelism and its standard bearer, the superscalar microprocessor. This kept computers doubling in performance for the same cost every 18 months.
These tricks hit a roadblock in 2005.
This so-called speculative execution meant that higher performance was tied directly to higher power
We ended up with power densities in excess of 200 watts per square centimeter, roughly the same power density as an operating nuclear reactor core! The costs shifted to cooling, but moving beyond the standard fan and heat sink cooling approaches proved to be far more expensive.
The industry reacted by putting on the same die multiple computers, christened cores by marketing. In order to light up all of the cores, the burden shifted from hardware to the programmer.
But things got even worse for the computer industry. The trend that Gordon Moore observed, that transistors per unit area doubled every 18 months, was coming to an end.
And so here we are today: microprocessors are not getting faster for the same price. Building larger and larger computer systems to solve problems such as weather prediction have become exceedingly expensive. It looks as if it’s the true end of the road for computing itself: a technology that has fueled major advances in science, healthcare, drug development, engineering, entertainment, transportation…the list of computing’s impact is nearly infinite.
In late 2012, we began an initiative under the auspices of the Institute of Electrical and Electronics Engineers.
We called this initiative “Rebooting Computing” and held three summits, one in Washington, DC, and two near Silicon Valley.
What emerged were several potential approaches to getting back to the historic exponential scaling of computer performance. Each of these is radical.
For example, one approach leverages randomness and allows computers to produce approximate results rather than computing to the 100th decimal point. The human eye does this
Another approach mimics the structures of the brain
Such a computer is good at recognizing patterns
A third approach is based on the observation that power in a computer is only consumed when the result is picked from a list of potential results– the longer you can keep the list around, the better the chance of not burning power needlessly.
Each of these approaches is considered lunatic fringe by the industry. One may be the way forward, but we do not know.
Current approaches to weather prediction use computing concepts unchanged from the early days of computers. As such, they also inherit the same limits modern computers have.
Rebooting Computing
http://rebootingcomputing.ieee.org/
Tomi Engdahl says:
AMD’s 2016-2017 x86 Roadmap: Zen Is In, Skybridge Is Out
by Ryan Smith on May 6, 2015 2:02 PM EST
http://www.anandtech.com/show/9231/amds-20162017-x86-roadmap-zen-is-in
AMD’s CTO Mark Papermaster just left the stage at AMD’s 2015 Financial Analyst Day, and one of the first things he covered was AMD’s CPU technology roadmap for the next couple of years.
The big question on everyone’s mind over the last year has been AMD’s forthcoming x86 Zen CPU, developed by Jim Keller’s group, and Papermaster did not disappoint, opting to address the future of AMD’s x86 plans first and foremost. AMD is not releasing the complete details on Zen until closer to its launch in 2016, but today they are providing some basic details on the CPU’s abilities and their schedule for it.
n terms of features, AMD once again confirmed that they’re aiming for significantly higher performance, on the order of a 40% increase in Instruction Per Clock (IPC) throughput. In a significant shift in threading for AMD’s x86 CPUs, Zen will also shift from Bulldozer’s Clustered Multithreading (CMT) to Simultanious Multithreading (SMT, aka Intel’s Hyperthreading).
Meanwhile AMD has confirmed that Zen will be shipping in 2016, and that it will be produced on a yet-to-be-named FinFET process. Our bet would be that AMD continues to use traditional partner (and spin-off fab) GlobalFoundries, who will be ramping up their 14nm equipment for next year as part of their licensing/partnership with Samsung to implement Samsung’s 14nm FinFET process.
Tomi Engdahl says:
Rachel King / ZDNet:
Nvidia’s Q1 mixed, hints at layoffs, restructuring charges between $100M-$125M tied to future Icera sale
http://www.zdnet.com/article/nvidia-q1-fiscal-2016-earnings-mobile-chips/
Summary:Earlier this week, Nvidia made the surprise announcement it would be selling off its Icera cellular chip business.
Tomi Engdahl says:
These circuits are used by all
Heres a good quiz question: what company does not manufacture integrated circuits, but almost all people still use its processors? The answer is a British ARM. According to Gartner, ARM claims sovereignty over IP market, namely other manufacturers licensed for the sale of cores.
Last year, the IP blocks sold nearly 2.7 billion dollars. These dollars ARM’s accounts leaked more than $ 1.2 billion, or 46 per cent of all IP sales.
And this is not a miracle. ARM processors are now found in roughly all the mobile phones: all circuits are based on Qualcomm’s ARM cores and basically all of its competitors’ with the exception of Intel. ARM processor can be found in a number of household electrical appliances from inside the automobile electronic systems and the growing number of the server machine.
ARM’s position in the IP market is the fact that the next largest EDA company has in-house Synopsys. It is more than a third smaller in size. The vast majority of IP companies are small and specialized houses
Source: http://etn.fi/index.php?option=com_content&view=article&id=2795:naita-piireja-kayttavat-kaikki&catid=13&Itemid=101
Tomi Engdahl says:
Ultralinear Transmitter Output Amplifier
http://www.eeweb.com/company-news/ixys/ultralinear-transmitter-output-amplifier/
The ULA-808-82 is a modular amplifier featuring extremely high IP3 at 48 dBm. It is has a single DC supplied at 7.0 V available in a surface mount package.
The amplifier is designed to meet the ultra linear transmitter output requirements of worldwide wireless base station systems. The device is self-contained with all matching and bias circuitry included.
Some applications for this device are: CDMA, TDMA, GSM, GPRS, EDGE, UMTS, WCDMA, cdma2000, TD-SCDMA.
14 dB Gain
Tomi Engdahl says:
4-Ch Capacitance to Digital Converter
http://www.eeweb.com/company-news/texas_instruments/4-ch-capacitance-to-digital-converter/
Capacitive sensing with grounded capacitor sensors is a very low-power, low-cost, high-resolution contact-less sensing technique that can be applied to a variety of applications ranging from proximity sensing and gesture recognition to material analysis and remote liquid level sensing. The sensor in a capacitive sensing system is any metal or conductor, allowing for low cost and highly flexible system design.
The FDC1004 is a high-resolution, 4-channel capacitance-to-digital converter for implementing capacitive sensing solutions. Each channel has a full scale range of ±15 pF and can handle a sensor offset capacitance of up to 100 pF, which can be either programmed internally or can be an external capacitor for tracking environmental changes over time and temperature. The large offset capacitance capability allows for the use of remote sensors.
Tomi Engdahl says:
PCB future is lightweight, low-cost, and flexible: Product how-to
http://www.edn.com/design/pc-board/4439368/Product-how-to–The-future-is-lightweight–low-cost–and-flexible?_mc=NL_EDN_EDT_EDN_today_20150507&cid=NL_EDN_EDT_EDN_today_20150507&elq=730acbbefbc6418fa567d45e219414c5&elqCampaignId=22898&elqaid=25770&elqat=1&elqTrackId=dc95fabacdb94e979dd559f792484f2d
In the last ten years, the technology for manufacturing lightweight, flexible PCBs has made huge progress. Lightweight flex circuits are usually associated with materials like Kapton. The use of those materials is typically limited to high-value applications due to price. Fast forward to 2015, and the landscape has changed dramatically.
Tomi Engdahl says:
Infineon Seeks Buyer for Welsh Wafer Fab
http://www.eetimes.com/document.asp?doc_id=1326552&
Infineon Technologies AG (Munich, Germany) has told staff at the Newport Wales wafer fab that it has inherited as part of its acquisition of International Rectifier Corp. that they will seek a buyer for fab. That’s according to a report in the South Wales Argus.
The process of finding a buyer for the 200mm wafer diameter Newport fab, which employs 540 people, could take up to two-and-a-half years the report says staff were told. The wafer fab makes analog ICs and power semiconductors according to a recent International Rectifier description.
Tomi Engdahl says:
Selecting surface-mount multilayer ceramic capacitors for high-frequency applications
http://www.edn.com/design/components-and-packaging/4439352/Surface-Mount-multilayer-ceramic-capacitors-for-high-frequency-applications?_mc=NL_EDN_EDT_EDN_analog_20150507&cid=NL_EDN_EDT_EDN_analog_20150507&elq=9df60633a846445aa84217e3719150bd&elqCampaignId=22893&elqaid=25765&elqat=1&elqTrackId=65855e84379545debf3a4d94e7a8e85a
Tomi Engdahl says:
Going deep: Capacitors take the heat of extreme down-hole drilling
http://www.edn.com/design/components-and-packaging/4439354/Going-deep–Capacitors-take-the-heat-of-extreme-down-hole-drilling?_mc=NL_EDN_EDT_EDN_analog_20150507&cid=NL_EDN_EDT_EDN_analog_20150507&elq=9df60633a846445aa84217e3719150bd&elqCampaignId=22893&elqaid=25765&elqat=1&elqTrackId=e4787e19b4b247f3a0d5ed84432f6abd
High-temperature C0G MLCCs that incorporate these advanced features are available in surface-mount packages, or as molded radial-lead devices for extra strain relief. The stability of the special high-temperature C0G dielectric ensures zero change in capacitance with respect to time and voltage, and capacitance change with temperature limited to ±30ppm/°C from -55°C to 200°C. In addition to high insulation resistance, these capacitors also have low dissipation factor at temperatures up to 200°C, as well as low ESR at high frequencies.
Highly Accelerated Life Testing (HALT) performed on the molded radial capacitors at different voltages and 200°C, with Weibull analysis and prediction using the Prokopowicz and Vaskas (P-V) equation, has predicted Mean Time to Failure (MTTF) of 8.64 x 107 years.
In addition, 1000 hours of life testing at 200°C and rated voltage has been completed. Measuring insulation resistance at zero hours and then 250, 500 and 1000 hours, to assess reliability, recorded no failures and no degradation in the measured values. Other long-term tests including humidity tests, storage-life tests, -55°C/+220°C thermal shock, and mechanical shock and vibration tests have shown zero failures indicating very high reliability for these devices.
Conclusion
The increased demands placed on electronic control systems operating in today’s deepest oil wells call for improvements in numerous aspects of component design and construction. New and advanced dielectrics, combined with high-performance solders and surface finishes, have improved both the electrical and mechanical characteristics of capacitors to withstand the harshest ultra (uHPHT) and extreme (xHPHT) environmental conditions defined by the oil industry
Tomi Engdahl says:
Is a 3D memory too expensive to produce?
PC and server memories go towards a rapid pace based on semiconductor circuits SSD disks. They are faster, quieter and consume significantly less power. According to recent analyzes by their manufacturing solid-state disks can, however, be too expensive. It will slow the spread of this technology.
This year, the SSD-terabyte manufacturing costs 53-fold and the next year to 49-fold mechanical terabyte disk extent. This not only slows down the SSD penetration, also set a shadow over the future profitability of the entire hard drive industry.
Source: http://etn.fi/index.php?option=com_content&view=article&id=2771:onko-3d-muisti-liian-kallis-valmistaa&catid=13&Itemid=101
Tomi Engdahl says:
Enterprise SSDs, Powered Off, Potentially Lose Data In a Week
http://hardware.slashdot.org/story/15/05/10/0936213/enterprise-ssds-powered-off-potentially-lose-data-in-a-week
The standards body for the microelectronics industry has found that Solid State Drives (SSD) can start to lose their data and become corrupted if they are left without power for as little as a week. … According to a recent presentation (PDF) by Seagate’s Alvin Cox, who is also chairman of the Joint Electron Device Engineering Council (JEDEC), the period of time that data will be retained on an SSD is halved for every 5 degrees Celsius (9 degrees Fahrenheit) rise in temperature in the area where the SSD is stored.
SSDs lose data if left without power for just 7 days
http://www.ibtimes.co.uk/ssds-lose-data-if-left-without-power-just-7-days-1500402
The standards body for the microelectronics industry has found that Solid State Drives (SSD) can start to lose their data and become corrupted if they are left without power for as little as a week.
While hard drives are mechanical in nature and make sure of rapidly rotating discs coated with magnetic material, flash storage devices are completely electronic, making use of a chip to process the data, so that data can be transferred much faster into smaller devices that are also more durable if dropped.
According to a recent presentation by Seagate’s Alvin Cox, who is also chairman of the Joint Electron Device Engineering Council (JEDEC), the period of time that data will be retained on an SSD is halved for every 5 degrees Celsius (9 degrees Fahrenheit) rise in temperature in the area where the SSD is stored.
Consumer class SSDs can store data for up to two years before the standard drops, but when it comes to SSDs used by enterprises, the drives are only expected to retain data for a period of three months – a fact confirmed by Samsung, Seagate and Intel’s own ratings on their products.
Security firm KoreLogic is concerned that far too many people are now using SSDs in both consumer and enterprise applications, which is clearly not a great idea if the data is important and might be needed for a longer period that three months.
The firm advises that users make sure to regularly back up their data and create drive images, or they will risk losing their data, which can have disastrous consequences, for example if the data was part of evidence gather by a law firm for a deposition.
“If long term storage is required, image the SSD onto a mechanical drive and place that drive in storage as well as the SSD,” KoreLogic writes in a blog post.
Tomi Engdahl says:
SSD Storage – Ignorance of Technology is No Excuse
https://blog.korelogic.com/blog/2015/03/24#ssds-evidence-storage-issues
Digital evidence storage for legal matters is a common practice. As the use of Solid State Drives (SSD) in consumer and enterprise computers has increased, so too has the number of SSDs in storage increased. When most, if not all, of the drives in storage were mechanical, there was little chance of silent data corruption as long as the environment in the storage enclosure maintained reasonable thresholds. The same is not true for SSDs.
A stored SSD, without power, can start to lose data in as little as a single week on the shelf.
SSDs have a shelf life. They need consistent access to a power source in order for them to not lose data over time. There are a number of factors that influence the non-powered retention period that an SSD has before potential data loss. These factors include amount of use the drive has already experienced, the temperature of the storage environment, and the materials that comprise the memory chips in the drive.
The Joint Electron Device Engineering Council (JEDEC) defines standards for the microelectronics industry, including standards for SSDs. One of those standards is an endurance rating. One of the factors for this rating is that an SSD retains data with power off for the required time for its application class.
In a presentation by Alvin Cox on JEDEC’s website titled “JEDEC SSD Specifications Explained” [PDF warning], graphs on slide 27 show that for every 5 degrees C (9 degrees F) rise in temperature where the SSD is stored, the retention period is approximately halved. For example, if a client application SSD is stored at 25 degrees C (77 degrees F) it should last about 2 years on the shelf under optimal conditions. If that temperature goes up 5 degrees C, the storage standard drops to 1 year.
JEDEC SSD Specifications Explained
http://www.jedec.org/sites/default/files/Alvin_Cox%20%5BCompatibility%20Mode%5D_0.pdf
Tomi Engdahl says:
SMIC Mum on 28nm Revenue Prospect in 2015
http://www.eetimes.com/document.asp?doc_id=1326560&
Semiconductor Manufacturing International Corp. (SMIC), China’s largest foundry, declined to say whether it will make money from 28nm products this year as the company ramps up its most advanced process technology.
“It’s a bit too early to say in terms of revenue contribution about 28nm by the end of the year,” said SMIC executive vice president Gareth Kung Friday (May 8) on a conference call to announce the company’s first-quarter 2015 financial results. “We’re going to report to investors as we make more progress.”
SMIC and Qualcomm, the world’s largest cellphone chip designer, said in July last year that they were collaborating on 28nm production. Qualcomm said it would help accelerate SMIC’s 28nm process while SMIC said it would make Qualcomm’s Snapdragon processors on that technology node.
SMIC may be lagging behind leading foundry rivals such as Samsung and Taiwan Semiconductor Manufacturing Co. (TSMC), which are ramping up 14nm and 16nm technology this year. TSMC has dominated the 28nm node for nearly five years without any challengers. United Microelectronics Corp. (UMC), has become the second company to offer 28nm products, accounting for 9% of its first-quarter revenue this year, up from 7% in the fourth quarter last year.
SMIC’s new 12-inch fab in Beijing is qualifying 40nm and 28nm as it enters initial production, SMIC CEO Tzu-Yin Chiu said on the conference call. Another SMIC 12-inch fab in Shanghai has a 14,000 wafer-per-month capacity mainly for 40nm, 45nm and R&D, with a 6,000 wafer-per-month capacity capable of 28nm production, he added.
Strong demand from customers in China helped boost SMIC’s capacity utilization to 99.7% in the first quarter of this year
By geography, about 47% of SMIC’s first-quarter revenue came from customers in China, followed by 41% from North America and 12% from Eurasia.