Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).
The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.
Manufacturing trends
According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.
300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm.
In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so packaging customers may encounter select shortages well into 2018. Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.
Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.
Moore’s law
Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet.
Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.
South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Samsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.
There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.
Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.
Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.
Application markets
Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season. eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.
The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.
Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.
Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.
Power electronics
The power electronics market continues to grow and gain more presence across a variety of markets. 2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.
Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.
According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.
Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.
Memory
Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND. Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.
NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.
Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND. SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.
Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.
There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.
There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.
5G and IoT
5G something in it for everyone. 5G is big. 5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.
Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.
A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.
The Io edge sensor device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.
Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.
The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.
AI
There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.
The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.
Sources:
Battery Market Goes Bigger and Better in 2018
Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows
Wearables Shipments Expected to Double by 2021
The Week In Review: Manufacturing #186
Five technology trends for 2018
NI Trend Watch 2018 explores trends driving the future faster
Creating Software Separation for Mixed Criticality Systems
Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC
Meeting ISO 26262 Software Standards
DRAM Growth Projected to be Highest Since ’94
NAND Market Expected to Cool in Q1
Memory Market Forecast 2018 … with Jim Handy
3D NAND Storage Fuels New Age of Smartphone Apps
$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top
Advanced Packaging Is Suddenly Very Cool
Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018
Rapid SoC Proof-of-Concept for Zero Cost
EDA Challenges Machine Learning
What Can You Expect from the New Generation of Power Supplies?
Optimizing Machine Learning Applications for Parallel Hardware
FPGA-dataa 10 kertaa nopeammin
Chipmakers Look To New Materials
What the Experts Think: Delivering the next 5 years of semiconductor technology
Programmable Logic Holds the Key to Addressing Device Obsolescence
The Battle of AI Processors Begins in 2018
For China’s Memory Firms, Legal Tests May Loom
Predictions for the New Year in Analog & Power Electronics
Lithium-ion Overcomes Limitations
Will Fab Tool Boom Cycle Last?
The Next 5 Years Of Chip Technology
Chipmakers Look To New Materials
Process Window Discovery And Control
Sensors are Fundamental to New Intelligent Systems
Industrial IoT (IIoT) – Where is Silicon Valley
Internet of things (IoT) design considerations for embedded connected devices
How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets
1,325 Comments
Tomi Engdahl says:
DIY Monolithic Power Management ICs
https://www.powerelectronics.com/power-management/diy-monolithic-power-management-ics?NL=ED-003&Issue=ED-003_20180813_ED-003_794&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=19243&utm_medium=email&elq2=702175a5f4cc4d488aaffc968892b318
A library of selectable standard analog building blocks and unique software enables the in-house design and production of a monolithic power management IC.
You may not be able to find a commercially-available power management IC (PMIC) that meets your application’s requirements, but there is a way to get the device you need. You can use a new “do-it-yourself” (DIY) design technique, developed by AnDAPT (www.andapt.com), that employs a library of selectable power component building blocks, which in turn are built using analog elementary blocks that can interface with each other. They are offered on an Adaptive Multi-Rail Power (AmP) platform IC. After you select all the desired power component building blocks, software interconnects the analog elementary blocks (called µAnalog by AnDAPT) and creates a ready-to-use monolithic IC tailored to the requirements of the particular application. It’s all transparent to you.
Tomi Engdahl says:
DRAM Sales Forecast to Top $100 Billion This Year with 39% Market Growth
http://www.icinsights.com/news/bulletins/DRAM-Sales-Forecast-To-Top-100-Billion-This-Year-With-39-Market-Growth/
Tomi Engdahl says:
It’s a wire-wrapped board sabotage
https://www.edn.com/electronics-blogs/tales-from-the-cube/4460977/It-s-a-wire-wrapped-board-sabotage
Tomi Engdahl says:
Developing Next-Gen Technology While Recruiting Next-Gen Talent
https://www.mwrf.com/defense/developing-next-gen-technology-while-recruiting-next-gen-talent?NL=MWRF-001&Issue=MWRF-001_20180814_MWRF-001_632&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19251&utm_medium=email&elq2=711af23706724a75bccb33175913ccec
With capabilities that range from advanced packaging techniques to millimeter-wave development, this firm delivers cutting-edge products to the military sector with an eye on attracting a new contingent of engineers.
Tomi Engdahl says:
Supercapacitor-Based Backup Solutions: A Design Toolkit
There are several unique challenges when we attempt to use supercapacitors in a backup solution.
https://www.powerelectronics.com/power-management/supercapacitor-based-backup-solutions-design-toolkit?NL=ED-003&Issue=ED-003_20180813_ED-003_794&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19243&utm_medium=email&elq2=702175a5f4cc4d488aaffc968892b318
Supercaps come in various shapes, sizes, and flavors, with vastly different specs. Some, for example, have ESRs of the order of tens of Ω but are very compact and low-cost and are suitable for low-energy applications whereas others with ESRs of 50 mΩ are suitable for providing bursts of high power for short durations. To make a solution reliable it must explicitly take into account these specs and the intended application so that maximum reliability and performance is obtained from a given product. Going a step further, it is also important to be able to conceptualize a solution that can take advantage of ongoing rapid improvements in supercap technology. Therefore, it is important to have a flexible platform for building complete and tailorable solutions around them.
The following “toolkit” of design ideas addresses a specific problem and suggests a solution — or the essence of it — in the form of a design “fragment”. This fragment in each case consists of a partial hardware schematic and a partial GreenPAK Designer diagram.
Tomi Engdahl says:
The Top 3 Reasons for Transformer Failures
https://www.electronicdesign.com/power/top-3-reasons-transformer-failures?NL=ED-003&Issue=ED-003_20180815_ED-003_332&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19273&utm_medium=email&elq2=7e2484c5dde44b9ba7081ef86a5827ba
The culprits are all sins of omission: a lack of craftsmanship, high-quality materials, and good design.
When it comes to big-ticket items, power transformers are near the top of the list. So, when they fail prematurely, it’s all the more painful: Damages can far exceed the cost of a replacement. The added expenses may include the loss of production time, damaged credibility, and regulatory fines and civil lawsuits.
“After a transformer failure, the first thing out of the customer’s mouth is inevitably, ‘Hey, it’s just a year old! What happened?’”
But it’s no mystery, according to Jones. Ultimately, you get what you pay for.
Plant engineers, facilities managers, general contractors, and specifying electrical engineers can learn a lot from the “post-mortem” experiences of a CSI tech such as Jones. In most cases, the premature failures of transformers could have been avoided, and the culprit is often an inadequately designed or constructed unit.
“You want equipment that is cost-effective, not cheap,” says Jones. “Cheaper transformers often cost you more in the long run, especially if [they are] critical to your business process or data center. Then the extra $10,000 or $20,000 for a better unit represents inexpensive insurance.”
“Probably the most influential factor in transformer longevity is the level of craftsmanship, the attention to detail in the manufacturing process, and the quality control,” says Jones. “This is often overlooked in today’s rush to automate every manufacturing process.”
“Look where they put transformers these days: in tight spaces when the buildings are first being erected or on the roof where you’ll need a crane to replace it,” s
At that point, this manufacturer put a single wrap of Kevlar, whereas a high-quality transformer would have double or triple layering of insulating material because it’s a high-stress area.”
The manufacturer tried to avoid the rap by explaining that their transformers needed a snubber, a capacitor-filter-resistor network that connects in parallel with the primary winding to absorb high-voltage transients.
“But a snubber is a $25,000 add-on,” explains Jones. “If you have a cheaply manufactured transformer and need to buy this extra equipment, where are the savings in that? The university had 10 of these transformers, so they were facing a quarter-million-dollar jump in costs. Now who is going to pay for that? It becomes a big fight.”
Jones also discussed the importance of the iron core material. Pure original—as opposed to recycled—magnetic silicon steel is best. Also, the thinner the core steel pieces, the better.
Commonly used M6 steel has a thickness of 0.014 in. per piece, whereas the M3 steel is only 0.009 in. thick. To cover the same volume or area, you have more pieces with M3. The more pieces, the lower the no-load losses and the higher the efficiency.
“High heat contributes to transformer failures,”
Whether wet- or dry-type, the way coils are wound around the transformer’s core greatly affects its durability. Because of increased axial forces acting at the corners of rectangular-wound transformers, energy gets wasted and noise is created. With round-wound designs, however, voltage stresses are lower, so they stay cooler, run quieter, and present less risk of short-circuit with the sheet wound secondary.
Beyond the improved reliability factor, the round-wound designs further increase efficiencies and save costs in real time as the plant consumes less electricity.
“In the past, they made transformers that were somewhat overdesigned in terms of capacity and durability,”
Tomi Engdahl says:
Thoughtful Board Design Unlocks the Promise of GaN
https://www.powerelectronics.com/power-management/thoughtful-board-design-unlocks-promise-gan?NL=ED-003&Issue=ED-003_20180815_ED-003_332&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=19273&utm_medium=email&elq2=7e2484c5dde44b9ba7081ef86a5827ba
Gallium-nitride (GaN) transistors fabricated on silicon substrates can boost efficiencies and help shrink the footprint of power supplies.
Tomi Engdahl says:
China new fabs to join competition for foundry orders in late 2018
https://www.digitimes.com/news/a20180814PD204.html
As most of the 12-inch wafer foundry fabs built in China in 2016-2017 will kick off commercial run in late 2018, China’s combined monthly foundry capacities at 12-inch fabs will surge over 40% to near 700,000 pieces in 2018 from 2017, posing new competition pressure to non-China foundry houses including United Microelectronics, Vanguard Semiconductor International, Globalfoundries and Taiwan Semiconductor Manufacturing Company (TSMC), according to industry sources.
Tomi Engdahl says:
Old Vs. New Packages
Two packaging technologies are making microchips smaller and more durable.
https://semiengineering.com/old-vs-new-packages/
Two interesting packaging innovations are now being used in the process of miniaturizing microchips and electronics. One is a new concept that combines two tried-and-true technologies. The other is a decades-old technique that is being used in new ways.
Keeping dirt, humidity, air, even atmospheric pressure away from electronics is what hermetic packaging and sealing processes have done almost since the age of dinosaurs–for more than 75 years, predating the transistor and the integrated circuit. The process of hermetic packaging and sealing puts an impenetrable layer around electronics that keeps air (gas) and water vapor away from electronic parts, making them air- and water-tight, thus protecting them from corrosion and other environmental hazards.
New developments in hermetic packaging and sealing are now making faster, lighter, and smaller electronics possible.
Any technology that helps cram in more components without sacrificing functions is also welcome to handset manufacturers. Another technology front in the quest for greater miniaturization is the substrate-like printed circuit board, or SLP. It represents a cross between a flexible substrate and a rigid board.
The SLP shows up only in smartphones now, but it may be used in IoT devices and eventually AI applications, augmented and virtual reality devices, and automobiles. One of the big advantages is the flexibility of not having to choose between a PCB or substrates.
Substrate-like PCBs were employed in assembling the iPhone 8 models and the iPhone X, according to Yole Développement, which describes the technology as “a clash of two worlds,” PCBs and substrates.
SLP will have to contend with other technologies, namely package substrate vs. no substrate with fan-out platforms, along with through-silicon via packaging vs. TSV-less packaging.
Yole forecasts the SLP market will increase from $1.9 billion in 2016 to $2.24 billion by 2023.
“The 28 selected PCB/substrate manufacturers are all believed to have mSAP technology, and some of them can manufacture SLP,”
SLP could mean that outsourced semiconductor assembly and test (OSAT) customers won’t have to choose between PCBs or substrates for their products. He expects Samsung to follow Apple’s example.
SLP is meant for the motherboard of phones, reducing the space needed for such assemblies. Ball grid arrays or flip-chip packages are more typically used for fine-pitch slots in a phone, he noted. Wafer-level packages offer even finer pitches.
He likened SLP to chip-on-board packaging.
While the first noteworthy implementation of SLP is in mobile phones, such advanced semiconductor packaging could also find applications in 5G wireless communications, artificial intelligence, augmented and virtual reality, automotive electronics, and Internet of Things devices.
Hermetic packaging and sealing
Hermetic packaging and sealing, meanwhile, is already ubiquitous. It is used in automotive electronics, aerospace and aviation systems, optical communication components and system for fiber-optic data telecommunications, sensor manufacturing, and other industrial applications. The airbag igniter in automobiles is one example of hermetic packaging.
“It’s hard to pinpoint just one overarching trend,” said Robert Hettler, head of R&D for optoelectronics at SCHOTT Electronic Packaging, a unit of SCHOTT North America and Germany’s SCHOTT AG. “However, there are a number of trends within various markets and applications.”
Higher precision is one of them.
“Faster chips need reliable, high-performance hermetically sealed packaging to achieve ever-faster data rates. The so-called ‘last mile’ to the customer, which covers fiber transmission lines to the home, would be unachievable without a new generation of high-performance, high-precision hermetic packages,”
Tomi Engdahl says:
Where FD-SOI Works Best
https://semiengineering.com/where-fd-soi-works-best/
Experts at the Table, part 2: Why FD-SOI is being used alongside finFETs and other technologies, and what are the key drivers for chipmakers.
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8307-tampereella-kehitetaan-edullisempia-variaineherkistettyja-aurinkokennoja
Tomi Engdahl says:
Silicon Nanowires Used to Create Large-Area Bendable Electronics
https://www.eetimes.com/document.asp?doc_id=1333591
Researchers in the U.K. have demonstrated a dry contact-printing system that enables the transfer of multiple silicon nanowires onto flexible large-area substrates to develop high-performance ultra-thin electronic layers with good control over its electronic properties. This opens up the opportunity for large-scale use of flexible and bendable electronics including in internet of things (IoT) and smart city applications.
“Single-crystal silicon is a brittle material, and the moment you bend it, it cracks,” said professor Ravinder Dahiya, who led the research, in an interview with EE Times. “We’ve developed a new custom, closed-loop contact-printing system in which we have been able to print multiple 100-nm silicon nanowire pins to form an electronic layer on a flexible substrate. The electronic material is in direct contact with the substrate, so it’s dry printing rather than wet printing. We can achieve a high yield of aligned nanowires, which can have a uniform response over a large area.”
Tomi Engdahl says:
Where Would Apple Be Without Taiwan?
https://www.eetimes.com/document.asp?doc_id=1333588
Taiwan dominates the global supply chain from chips to systems. Engineers in Taiwan excel in design and manufacturing.
Tomi Engdahl says:
DRAM Closing in on $100 Billion Mark
https://www.eetimes.com/document.asp?doc_id=1333582
Continuing to ride the wave of rising prices amid part shortages, the DRAM market will grow by more than 30% this year and is well on its way to surpassing the $100 billion mark — becoming the first category of semiconductor to hit that milestone — according to industry analysts.
Tomi Engdahl says:
China Tariffs to Hit the Chip Sector
https://www.eetimes.com/document.asp?doc_id=1333566
Despite intense lobbying by the U.S. semiconductor industry, the next round of tariffs on Chinese imports will include billions of dollars worth of semiconductors.
The Trump administration on Tuesday finalized plans to implement later this month a 25% tariff on a list of Chinese products worth $16 billion annually. It will mark the second group of products to be hit with the tariff as part of the escalating trade war between the U.S. and China — an initial $34 billion worth of Chinese products have been subject to the tariff since July 6.
The Semiconductor Industry Association (SIA) trade group estimates that about $6.3 billion per year worth of semiconductors and related products are in one of the two tariff tranches, with the majority of those on the list released Tuesday. Semiconductor related items on the list Tuesday include equipment used in semiconductor manufacturing, as well as diodes and other types of devices.
Tomi Engdahl says:
YMTC Adds Detail to NAND Plans
Xtacking chips run up to 3.0 Gbits/second
https://www.eetimes.com/document.asp?doc_id=1333563
Yangtze Memory Technologies Co. (YMTC) revealed more details about its 3D NAND plans ahead of a talk on Tuesday at the Flash Memory Summit. The company aims to deliver 256-Gbit chips late next year supporting data rates up to 3.0 Gbits/s, more than twice as fast as the competition.
Tomi Engdahl says:
Hawk eyes, analog equipment trump expensive digital test set
https://www.edn.com/electronics-blogs/tales-from-the-cube/4312498/Hawk-eyes-analog-equipment-trump-expensive-digital-test-set
Tomi Engdahl says:
Do Parallel Tools Make Sense?
https://semiengineering.com/do-parallel-tools-make-sense/
Experts at the Table, part 2: What can be done instead? And why are companies reluctant to do more in the cloud?
Tomi Engdahl says:
Impact Of IP On AI SoCs
https://semiengineering.com/impact-of-ip-on-artificial-intelligence-socs/
Deep learning applications will call for specialized IP in the form of new processing and memory architectures.
Tomi Engdahl says:
Intel in the Cloud Post-Moore’s Law
X86 giant expands its bag of tech tricks
https://www.eetimes.com/document.asp?doc_id=1333575
The decline of Moore’s Law affects the entire semiconductor industry, but perhaps no company more viscerally than the one that Gordon Moore co-founded. Here at its headquarters, Intel projected an upbeat image at a data center event, and it showed how profoundly the company is changing with the times.
The x86 giant is increasingly relying on a basketful of technologies to deliver performance increases that it used to get with a turn of the crank at its fabs. And it is offering its customers a fat cookbook of systems and silicon recipes in place of its old formula of the next big CPU.
These days, what’s most interesting at Intel is its work in memories, machine learning — and some of its rock star engineers like Jim Keller. All three were on vivid display at the event.
Details of the next big processors — Cascade Lake, Cooper Lake, and Ice Lake — were part of the event. But part of that news was their added AI features, and they stood alongside Optane DIMMs now shipping to Google Cloud and plans for smart networking cards.
Wall Street analysts were hungry for information on Intel’s much-delayed 10-nm process.
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/08/13/kudottavaa-optoelektroniikkaa-kestaa-jopa-pesun/
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8287-diodeja-voi-valmistaa-kutomalla
Tomi Engdahl says:
The Rebirth of the Semiconductor Industry
http://blog.semi.org/technology-trends/the-rebirth-of-the-semiconductor-industry
“Software is eating the world … and AI is eating software.” Amir Husain, author of The Sentient Machine, at SEMICON West 2018
We’re living in a digital world where semiconductors have been taken for granted. But, Artificial Intelligence (AI) is changing everything – and bringing semiconductors back into the deserved spotlight. AI’s potential market of hundreds of zettabytes and trillions of dollars relies on new semiconductor architectures and compute platforms. Making these AI semiconductor engines will require a wildly innovative range of new materials, equipment, and design methodologies.
Moore’s Law carried us the past 50-plus years and as we’re now stepping into the dawn of AI’s potential, we can see that the coming Cognitive Era will drive its own exponential growth curve. This is great for the world – virtually every industry will be transformed, and people’s lives will get better – and it’s fantastic for our industry.
Tomi Engdahl says:
Selecting Film or Electrolytic Capacitors for Power-Conversion Circuits
https://www.powerelectronics.com/power-management/selecting-film-or-electrolytic-capacitors-power-conversion-circuits?NL=ED-003&Issue=ED-003_20180802_ED-003_953&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19031&utm_medium=email&elq2=2caf096c93ef413aa432025a90117ed1
Capacitors can provide vital ride-through (or hold-up) energy or mitigate ripple and noise in power-conversion circuits. Choosing the right type can profoundly affect a system’s overall size, cost, and performance.
Tomi Engdahl says:
Optista logiikka ja reititystä
https://www.nanobitteja.fi/uutiset.html?137788
Tomi Engdahl says:
Mentor as a maturing Siemens business: 1. Acquisitions
http://www.techdesignforums.com/blog/2018/08/01/mentor-siemens-acquisitions/?mid=6818270&PC=L&c=2018_08_16_esd_newsletter_update_august_2
At DAC 2018, the message from the company was that those have now been resolved. Senior management was at pains to point out that – true to its word – Siemens has carefully looked at Mentor and taken its integration slowly, surely and sympathetically. On that last point, another key message has been that the ‘Mentor Graphics’ established customers knew is no different from the ‘Mentor, a Siemens business’ of today.
Yet, as the opening quote from CEO Wally Rhines shows, at least one thing has changed in a big way. “We’ve done more acquisitions as a part of Siemens than we have in any year since 2002 and three out of four were in IC design,” he also noted during a keynote DAC interview.
Specifically, Mentor has accessed its parent’s checkbook to buy the following companies:
Austemper Design Systems: A specialist in functional safety implementations in silicon.
Infolytica: A developer of low frequency simulation tools for end applications such as motors.
Sarokal Test Systems: a Finnish provider of test equipment for cellular networks, particularly the emerging 5G market..
Solido Design Automation: A Canadian company focusing on variation-aware design and characterization with a strong position in the deployment of machine learning and AI for EDA.
Tomi Engdahl says:
Taiwan Shows No Sign of Releasing Stranglehold on Chip Foundry Industry
https://www.eetimes.com/document.asp?doc_id=1333595
More than 30 years after it served as the setting for the birth of the semiconductor foundry industry with the founding of Taiwan Semiconductor Manufacturing Co. (TSMC) in 1987, Taiwan shows no sign of relinquishing its stranglehold on the $62 billion global business.
TSMC remains, by far, the world’s largest foundry, with 2017 revenue of $32.2 billion, more than five times that of second-ranked vendor Globalfoundries, according to market research firm IC Insights. TSMC accounted for nearly 52% of the worldwide total for the foundry industry last year.
Taiwan is also home to the world’s third-largest foundry, United Microelectronics Corp. (UMC), and the sixth-largest company in foundry sales, Powerchip Technology Corp. Combined, TSMC, UMC, and Powerchip accounted for 62% of all foundry sales last year.
Tomi Engdahl says:
Probing Systems Run on Their Own
https://www.mwrf.com/test-measurement/probing-systems-run-their-own?NL=MWRF-001&Issue=MWRF-001_20180816_MWRF-001_222&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19287&utm_medium=email&elq2=18c1da332f7a4ac38ae76ef3c1eae996
This company recently introduced its new probing systems, as well as an autonomous RF measurement solution that can perform calibrations and measure RF devices without user intervention.
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8310-nanonauhoilla-tuhat-kertaa-pienempia-transistoreita
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8309-litiumakkujen-teho-kasvaa-kaksinkertaiseksi
Tomi Engdahl says:
Plasmonic Antenna Shines a Light on Terahertz Processors
https://spectrum.ieee.org/tech-talk/semiconductors/optoelectronics/plasmonic-antenna-development-could-shine-a-light-on-terahertz-frequency-processing
Imagine an antenna that could transmit at terahertz frequencies—generally defined as those between 300 gigahertz (GHz) and 3 terahertz (THz). Such an antenna could send and receive data at rates that would be orders of magnitude faster than any device we currently use. Even the 5G networks now being deployed will operate, at best, on frequencies well below 100 GHz.
Tomi Engdahl says:
Arm, the company that designs the chips that power virtually every smartphone and IoT device, published its roadmap for the next two years
Arm wants to power your next laptop
https://techcrunch.com/2018/08/16/arm-wants-to-power-your-next-laptop/?utm_source=tcfbpage&sr_share=facebook
Arm, the company that designs the chips that power virtually every smartphone and IoT device, published its roadmap for the next two years today. That’s the first time Arm has done so and the reason for this move, it seems, is that the company wants to highlight its ambitions to get its chips into laptops.
So far, Arm-based laptops are far and in-between, though Microsoft recently made a major move in this direction thanks to its push for always connected Windows laptops.
Tomi Engdahl says:
China to scale up investment in chip design
http://www.globaltimes.cn/content/1115730.shtml
Chinese chipmakers should scale up investment in chip design and production where they have already made certain breakthroughs, industry insiders said at a forum, noting that such efforts could drive up the growth of the whole industry chain and lend China more bargaining chips amid escalating trade tensions with the US.
“China has built its chip industry from scratch and has made significant progress recently compared to the last two to three decades. Yet the country is still in an average position in the global market” in terms of production capabilities, said Dong Yunting, director of the expert committee under the China Information Technology Industry Federation.
For example, the global mainstream chip design is 20 nanometers, according to Dong. But Chinese Bitcoin mining rig Canaan Creative in early August launched the world’s first 7-nanometer mass-produced crypto mining chip, which will be used in blockchain supercomputer Avalon A9 to achieve increased performance for crypto mining.
The chip was designed on the Chinese mainland and its manufacturing followed the process used by Taiwan Semiconductor Manufacturing Company (TSMC).
In addition, media reports also suggest that the next generation of Huawei’s Kirlin 980, which will be launched within a month, was designed based on the 7-nanometer standard.
Tomi Engdahl says:
The Hidden Cost Of Tariffs
https://semiengineering.com/the-hidden-cost-of-tariffs/
Import/export duties are only part of the picture, and what you can’t see can still hurt.
The impact of tariffs on the semiconductor industry is just now being assessed, but there’s a lot more to this picture than import and export duties.
In fact, the biggest and longest-lasting effects may have less to do with taxing imports than what happens across the global supply chain that includes everything from manufacturing equipment to materials to investment capital.
Last week, the U.S. Trade Representative announced a 25% tariff on $16 billion worth of imports from China. SEMI estimates it will cost its 400 U.S.-based companies more than $500 million annually.
Tomi Engdahl says:
Device Safety and Regulations Questioned in The Bleeding Edge
https://www.mddionline.com/device-safety-and-regulations-questioned-bleeding-edge?ADTRK=UBM&elq_mid=5288&elq_cid=876648
Among the film’s many questions: Is FDA’s 510(k) process adequate for patient safety?
Netflix’s movie, The Bleeding Edge, is about allegedly unsafe medical devices, how they got to market, and how difficult it is to get them off the market. Living in New York, I actually saw it in a movie theater. It has also received a modest amount of press with various radio, print, and online interviews.
The film criticizes the process by which all the devices cited (except Essure and current breast implants) came to market—the 510(k)—for a lack of adequate pre-market testing. It was also noted that a curiosity of the 510(k) process is that a recalled device can serve as a predicate. Also cited is the alleged disconnect between claims that manufacturers often make about safety and what is actually known, especially in the absence of premarket testing and only short term follow-ups.
The adequacy of 510(k) process has received a great deal of attention over the years. In one recent IVC filter court ruling, the judge asserted that “the 510(k) process is not a safety review.”
Despite the process’s limitations, when manufacturers become defendants, they would like it to be the case that 510(k)s carried the same level of liability protection that a PMA does, while also enjoying the relatively low scrutiny that their 510(k)s have enjoyed. This hinges in part on whether “substantial equivalency” is the same as proof of safety and efficacy. I
The film also criticized the postmarket process for tracking medical device problems in part because of the suspected vast underreporting and in part because reporting is voluntary for physicians and often contrary to their self-interest. Better postmarket surveillance is a current topic on FDA’s agenda.
Tomi Engdahl says:
7 of Bleeding Edge’s Most Powerful Moments
https://www.mddionline.com/7-most-powerful-moments-bleeding-edge?ADTRK=UBM&elq_mid=5288&elq_cid=876648
The Bleeding Edge documentary put a spotlight on the darker side of the medical device industry. Here are several of the most powerful moments from the Netflix documentary.
Tomi Engdahl says:
NAND flash market remains in oversupply
https://www.digitimes.com/news/a20180817VL200.html
The global NAND flash market remained in oversupply in the second quarter of 2018, though the market posted a 3.5% sequential increase in revenues, according to DRAMeXchange.
Average NAND flash contract prices fell between 15% and 20% sequentially in the second quarter, but bit shipments bounced back thanks to a pick-up in demand for high-density products from China-based smartphone vendors, said DRAMeXchange. Revenues of the global NAND flash industry came to US$16.29 billion in the second quarter.
Looking forward, DRAMeXchange warned of a nearly 10% sequential decline in NAND flash contract prices for the third quarter, citing the continued oversupply. “There are noticeable signs that the demand growth will be limited despite the contributions from the traditional busy season,” noted DRAMeXchange analyst Ben Yeh. “Shipments of mainstream consumer electronics products such as smartphones and notebooks during 3Q18 are not expected to increase significantly. Also, memory module makers will be carrying high levels of inventory.”
Falling NAN flash prices will also stimulate shipments of high-capacity (8TB, 16TB) SSDs for servers, Yeh indicated.
Tomi Engdahl says:
Memory Startups To Watch
3D memory, FeFETs and MRAM/ReRAM IP are in the works.
https://semiengineering.com/memory-startups-to-watch/
Tomi Engdahl says:
A Twist in Graphene Could Make for Tunable Electronic Devices
https://spectrum.ieee.org/nanoclast/semiconductors/materials/a-twist-in-graphene-could-make-for-tunable-electronic-devices
A single material could be ‘twisted’ into various components of a circuit with distinct electronic properties
Engineering a band gap into graphene has become almost a rite of passage for research groups who work with the material. While many have accomplished this feat, many more have written off graphene in digital logic applications because of the fact that you have to give it a band gap.
It turns out that all of that engineering of graphene has revealed another feature: tunable electronic properties. This is accomplished by combining graphene with another material that has a very large band gap, like boron nitride—so-called heterostructures—or by giving graphene a twist.
Now, an international team of researchers from Columbia University, the National Institute for Materials Science in Tsukuba, Japan and the Centre National de la Recherche Scientifique (CNRS) in France have overcome some of the limitations that previous attempts to twist graphene have faced.
In research described in the journal Science, the group demonstrated proof of principle for a twisting technique using graphene/boron nitride heterostructures. They showed that their technique can control the rotation of the graphene, and demonstrated how the electrical, optical, and even mechanical properties of the device can be dynamically varied with this technique.
Tomi Engdahl says:
Foxconn plans semiconductor operations in China’s Greater Bay Area
https://www.scmp.com/tech/enterprises/article/2160265/foxconn-plans-semiconductor-operations-chinas-greater-bay-area
Foxconn Technology Group, the world’s largest electronics contract manufacturer, plans to establish semiconductor-related operations in Zhuhai under a pact it signed on Thursday with the southern Chinese coastal city’s government.
The Taipei-based company, known formally as Hon Hai Precision Industry, will develop semiconductor design services, and semiconductor equipment and chip design in the city, according to the Zhuhai government’s website. This strategic cooperation was first reported by The Wall Street Journal on Friday.
Tomi Engdahl says:
Inter-chip communication over high-speed serial I/O (HSIO) channels is now the norm, with numerous standardized protocols. With multiple Gbps signal rates, recovered clock jitter limits overall system performance.
High-Speed I/O Verification with Analog FastSPICE
https://www.mentor.com/products/ic_nanometer_design/techpubs/download?id=93003&contactid=1&PC=L&c=2018_08_20_dsm_afs_high_speed_io_wp_v14
Inter-chip communication over high-speed serial I/O (HSIO) channels is now the norm, with numerous standardized protocols, such as PCI Express, HyperTransport, DDR3/4, XDR, GigaBit Ethernet, etc. With multiple…
Inter-chip communication over high-speed serial I/O (HSIO) channels is now the norm, with numerous standardized protocols, such as PCI Express, HyperTransport, DDR3/4, XDR, GigaBit Ethernet, etc. With multiple Gbps signal rates (e.g., 8 Gbps PCI Express v3.0 data rate per lane), recovered clock jitter limits overall system performance. At these rates, accurately verifying total jitter with all contributing physical effects and under all expected conditions is critical. This must include device noise, which is a major contributor to jitter in nanometer process nodes, and parasitics, which contribute to frequency-dependent channel attenuation.
In many such circuits, the serializer contains a re-timer, ensuring that the output data is multiplexed correctly to the output serial stream.
Tomi Engdahl says:
Maailman pienin transistori sopii yhteen atomiin
http://etn.fi/index.php?option=com_content&view=article&id=8327&via=n&datum=2018-08-21_15:09:56&mottagare=31202
Tomi Engdahl says:
Temperature Ruggedness of Passive Components Needs Its Own Perspective
https://www.powerelectronics.com/automotive/temperature-ruggedness-passive-components-needs-its-own-perspective?NL=ED-003&Issue=ED-003_20180820_ED-003_43&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=19358&utm_medium=email&elq2=3aef8d6923bf498eb9aeed11f04ed6a7
For both active and passive devices, the negative of effects of thermal shock can be as detrimental as steady-state operation at extended temperatures.
Ensuring system ruggedness and long-term reliability requires addressing multiple challenges. The factors that adversely affect long-term performance include temperature extremes, vibration, mechanical stresses, electrostatic discharge (ESD), and even harsh and corrosive atmospheres.
Certainly, nearly every circuit engineer is familiar with the issue of temperature, and it’s the first issue that needs to be addressed. In most cases, where there’s power, there’s dissipation, and where there’s dissipation, there’s likelihood of heat buildup and temperature increase. Engineers must deal with the consequences of this unavoidable condition, as it often listed as a significant design constraint.
The designer’s hierarchy of concerns usually starts with changes in performance of active devices.
the first concern is making sure that the component not only stays within its safe operating area (SOA), but also delivers the needed performance
After active devices, it’s time to examine the passive components. These tend to have less-dramatic temperature-related drift than semiconductors. Basic RLC components—resistors, inductors, and capacitors—have well-known shifts in specifications due to temperature coefficient of resistance (or inductance or capacitance), which are easier to assess than the changes that occur in active devices. Further, the raw materials used in passives have fairly high temperature thresholds, making their physical implementation a less-daunting challenge than it is for semiconductors. (“Wet” capacitors are another story, of course, since their basic chemistry is adversely affected.)
Resistors Make Their Own Problems
In some ways, the most troublesome component in the RLC trio is the resistor, due to its self-heating.
Merging high-temperature, thermal-shock, and vibration ruggedness into a “simple” passive component such as a resistor requires sophisticated design and fabrication
Designer’s Options Span Operating Sequence to BOM Selection
What options are available to designers? In some cases, systems are deliberately left powered up, or not turned fully off, to limit thermal shock. (Obviously, this is inefficient and often no longer allowed under strict energy mandates.) For example, high-power vacuum tubes often kept “warm,” and theater spotlights (which are still incandescent in most cases) are cut back to about 10-20% of full power when not in use.
Tomi Engdahl says:
A Review of Silicon Photonics
https://semiengineering.com/a-review-of-silicon-photonics/
Using process simulation to design silicon photonics devices.
Tomi Engdahl says:
3D NAND Flash Wars Begin
https://semiengineering.com/3d-nand-flash-wars-begin/
Market overcrowding, more efficient manufacturing, and growing list of scaling issues create a challenging competitive landscape.
3D NAND suppliers are gearing up for a new battle amid a period of price and competitive pressures, racing each other to the next technology generations.
Competition is intensifying as a new player enters the 3D NAND market—China’s Yangtze Memory Technologies Co. (YMTC). Backed by billions of dollars in funding from the Chinese government, YMTC recently introduced its first 3D NAND technology. The move is fueling concerns that a new entrant could impact a deteriorating market. The 3D NAND business is heading toward a prolonged period of oversupply and price erosion.
3D NAND is the successor to today’s planar NAND flash memory, and is used for storage applications such as smartphones and solid-state storage drives (SSDs).
For NAND in general, average selling prices (ASPs) are expected to fall by 24% in 2018 and 23% in 2019, according to Gartner. In total, NAND revenue is projected to reach $58.7 billion in 2018, up from $53.7 billion in 2017, according to Gartner.
In the long term, though, some forecasts are slightly more upbeat. “If you look at this from a top level, it’s a heathy market,” said Simon Yang, chief executive at YMTC. “If you look at China’s consumption of memory chips, it’s a pretty big number.”
Generally, suppliers are scaling 3D NAND roughly one technology generation every year. In 2018, suppliers are migrating from 64- to 96-layer products. Then, vendors are expected to move from 96 to 128 layers in 2019, followed by 256 layers in 2020/2021, and 512 in 2022/2023, according to Imec.
Scaling 3D NAND
Regardless, to scale 3D NAND, suppliers are taking one of two approaches—single deck or string stacking. Both approaches are viable, but they are different, with various tradeoffs.
“The first way to scale these devices is to go to more and more layers. 96 is happening today. We see a path to do a single deck of pairs up to 256,” said Rick Gottscho, CTO of Lam Research, during a recent presentation. “The second way of scaling these devices is to take one deck and stack another deck on top. That creates a whole other set of challenges.”
Samsung is embracing the single-deck approach. In its latest device, which is actually 92 layers, Samsung stacks all 92 layers in the same monolithic die, analysts said.
Others are taking the string-stacking approach. In a 64-layer device, for example, some developed two separate 32-layer parts. Then, they stacked one on top of the other, enabling a 64-layer chip.
Each approach has some technical and cost issues.
Each vendor uses different materials. For example, Samsung deposits alternating layers of silicon nitride and silicon dioxide on the substrate. “You deposit oxide-nitride or oxide-poly, depending on the kind of device you are fabricating,” Lam’s Gottscho said during the presentation.
It’s possible to stack hundreds of layers on the substrate. But as more layers are added, the challenge is to stack the layers with the exact thickness and good uniformities at high throughputs.
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/08/21/euroopan-komponenttikauppa-kasvaa-mutta-hitaasti/
Tomi Engdahl says:
How AI is decommoditizing the chip industry
https://venturebeat.com/2018/08/16/how-ai-is-decommoditizing-the-chip-industry/
Since the early days of computing, there has always been this idea that artificial intelligence would one day change the world. We’ve seen this future depicted in countless pop culture references and by futurist thinkers for decades, yet the technology itself remained elusive. Incremental progress was mostly relegated to fringe academic circles and expendable corporate research departments.
That all changed five years ago. With the advent of modern deep learning, we’ve seen a real glimpse of this technology in action: Computers are beginning to see, hear, and talk. For the first time, AI feels tangible and within reach.
AI development today is centered around Deep Learning algorithms like convolutional networks, recurrent networks, generative adversarial networks, reinforcement learning, capsule nets, and others. The one thing all of these have in common is they take an enormous amount of computing power. To make real progress towards generalizing this kind of intelligence, we need to overhaul the computational systems that fuel this technology.
The 2009 discovery of the GPU as a compute device is often viewed as a critical juncture that helped usher in the Cambrian explosion around deep learning. Since then, the investment in parallel compute architectures has exploded. The excitement around Google’s TPU (Tensor Processing Unit) is a case in point, but the TPU is really just the beginning. New dedicated AI chip startups raised $1.5 billion in 2017 alone, a CB Insights spokesperson told my team. This is astonishing.
Tomi Engdahl says:
USB vs. Benchtop—The Great Test-Equipment Debate
https://www.electronicdesign.com/test-measurement/usb-vs-benchtop-great-test-equipment-debate
Both form factors have their benefactors. But when making decisions on equipment, it’s essential that you first meticulously evaluate your needs and look at critical specs.
The world will tell you that when it comes to test gear, USB equipment is in a different class than benchtop equipment. It’s not as good. It’s a pretty convenient line to draw—the form factor typically implies certain functionality. However, just like the five-second rule for dropping food on the floor, just because the rule is convenient, doesn’t mean it’s true. I’m all for eating floor-food, but I’m a little more cautious when it comes to making test gear decisions.
The old days where you would consider only one form factor have passed. Why? Designs have changed. The perks and techniques from traditional benchtop equipment are starting to get integrated into benchtop equipment. Plus, the strengths of benchtop equipment have started to move into USB equipment.
The USB Oscilloscope vs. Benchtop Oscilloscope Debate
Why the debate? After all, an oscilloscope is essentially just three parts: front-end conditioning circuitry, an analog-to-digital converter (ADC), and a processor. A similarly naïve assumption can be made for pretty much every other piece of test equipment.
But, anyone who’s ever used an oscilloscope will tell you that it’s so much more. Engineers have a special respect for oscilloscopes, almost a reverence. The little things matter.
This equipment is precious and used regularly, so form factor has a big impact on daily life.
Benchtop oscilloscopes have been around as long as oscilloscopes have been around. Really.
Benchtop oscilloscopes have built-in everything. There’s a dedicated display, an embedded processor, front-panel control knobs/buttons, and a GUI that’s both functional and relatively un-modifiable. You generally don’t need to do any coding or hook up to a PC to get the data you want. If you have power and a probe, you can do at least 95% of what that oscilloscope is capable of performing. The same is true for other pieces of benchtop equipment.
Such capabilities bring you a few key things.
First, they’re darn simple to use.
Second, benchtop oscilloscopes are generally higher performing.
Be warned, though, a lot of budget-level benchtop equipment is known to be buggy and not as responsive as their higher-priced counterparts. So, do your research before buying!
A dedicated start-at-boot UI is also common among lower bandwidth benchtop oscilloscopes (<1 GHz), while higher-end scopes almost exclusively run as a Windows application. This complicates the UI, but due to integrated hardware it doesn’t degrade oscilloscope performance.
Why People Rave About USB Oscilloscopes
Historically, USB oscilloscopes are known as the tool of broke engineering students and garage tinkerers. Like a benchtop oscilloscope, a USB oscilloscope has a front end and an ADC. However, it outsources the processing to a host PC.
There are two key benefits of USB oscilloscopes: bench space and cost.
The world will tell you that when it comes to test gear, USB equipment is in a different class than benchtop equipment. It’s not as good. It’s a pretty convenient line to draw—the form factor typically implies certain functionality. However, just like the five-second rule for dropping food on the floor, just because the rule is convenient, doesn’t mean it’s true. I’m all for eating floor-food, but I’m a little more cautious when it comes to making test gear decisions.
A USB vector network analyzer.
The old days where you would consider only one form factor have passed. Why? Designs have changed. The perks and techniques from traditional benchtop equipment are starting to get integrated into benchtop equipment. Plus, the strengths of benchtop equipment have started to move into USB equipment.
Using oscilloscopes as an example, let’s look at how the classic USB oscilloscope vs. benchtop oscilloscope debate holds up in 2018. Even though we’re going to look at oscilloscopes, the same philosophies apply to a lot of other types of equipment. Recent years have seen a big growth in USB power supplies, DMMs, and even network analyzers.
The USB Oscilloscope vs. Benchtop Oscilloscope Debate
Why the debate? After all, an oscilloscope is essentially just three parts: front-end conditioning circuitry, an analog-to-digital converter (ADC), and a processor. A similarly naïve assumption can be made for pretty much every other piece of test equipment.
A benchtop or USB oscilloscope?
But, anyone who’s ever used an oscilloscope will tell you that it’s so much more. Engineers have a special respect for oscilloscopes, almost a reverence. The little things matter.
I can’t tell you how many discussions I’ve overheard, or forum threads I’ve read, that talk about the feel of the knob detents and the satisfying snappiness of the UI. That’s why this division between the USB and benchtop camps is such a big issue. This equipment is precious and used regularly, so form factor has a big impact on daily life.
Full disclosure: I work for Keysight, and we make awesome test gear. This isn’t a sales pitch to get you to buy more Keysight, though; it’s a genuine attempt to clear up some of the confusion in the USB vs. benchtop debate. We’re also not paying anyone to publish this. However, feel free to buy all of the Keysight gear you want!
The Perks of Benchtop Oscilloscopes
I’ll be quick with this section because, let’s be honest, if you’re reading this article you probably already know what a benchtop oscilloscope is and does.
Benchtop oscilloscopes have been around as long as oscilloscopes have been around. Really. The first oscillograph (an oscilloscope forerunner) was basically a benchtop oscilloscope.
An oscillograph, the precursor of the oscilloscope. (Image source: https://en.wikipedia.org/wiki/File:Hospitalier_Ondograph.png)
Benchtop oscilloscopes have built-in everything. There’s a dedicated display, an embedded processor, front-panel control knobs/buttons, and a GUI that’s both functional and relatively un-modifiable. You generally don’t need to do any coding or hook up to a PC to get the data you want. If you have power and a probe, you can do at least 95% of what that oscilloscope is capable of performing. The same is true for other pieces of benchtop equipment.
Such capabilities bring you a few key things.
First, they’re darn simple to use. Because the built-in GUI is the main method of controlling the scope, it’s (usually) pretty bug-free, intuitive, and fully capable. You can grab it out of your neighbor’s cubicle, turn it on, and get started. That’s what it’s built for.
Second, benchtop oscilloscopes are generally higher performing. While size is always a concern for equipment, there’s a somewhat relaxed space expectation for benchtop oscilloscopes. Because benchtop oscilloscopes are “allowed” to be bigger, the manufacturers can build-in more capabilities.
Higher bandwidth, lower noise, refined processing, and snappy responsiveness are all classic advantages of benchtop oscilloscopes. Be warned, though, a lot of budget-level benchtop equipment is known to be buggy and not as responsive as their higher-priced counterparts. So, do your research before buying!
A dedicated start-at-boot UI is also common among lower bandwidth benchtop oscilloscopes (<1 GHz), while higher-end scopes almost exclusively run as a Windows application. This complicates the UI, but due to integrated hardware it doesn’t degrade oscilloscope performance.
Benchtop equipment tends to be the tool of choice due to its convenience and performance. USB oscilloscopes, though, have their own advantages.
Why People Rave About USB Oscilloscopes
Historically, USB oscilloscopes are known as the tool of broke engineering students and garage tinkerers. Like a benchtop oscilloscope, a USB oscilloscope has a front end and an ADC. However, it outsources the processing to a host PC.
There are two key benefits of USB oscilloscopes: bench space and cost.
If you’re doing electronics work, you probably have a pretty capable PC on your bench. Why waste bench space on a display and what’s essentially another PC when you can use the one you already have? This can save you valuable bench real estate for crowded work areas.
USB oscilloscopes also don’t have a display, which makes them significantly smaller. And, there’s no control hardware (knobs and buttons). With these two things absent, they are much, much smaller than benchtop oscilloscopes.
The size is also super convenient if you work in more than one physical location. USB oscilloscopes can be tossed into a backpack and set up wherever. Typically, you’re already carrying a laptop or going somewhere that has a PC, so the only extra weight is the scope.
The cost to build a USB oscilloscope is much lower, too, so they tend to be priced lower than benchtop oscilloscopes. After all, the manufacturer doesn’t need a display, control hardware, or a processor/motherboard.
There is a downside—the low-cost nature of USB oscilloscopes has given the form factor a bad rap. For a while, it was probably deserved.
USB Oscilloscopes Don’t Have to be Bad
Despite the historical shortfalls, USB oscilloscopes are starting to become a viable option. There are two key trends driving this change.
First, USB oscilloscope companies are starting to refine their designs.
Second, benchtop oscilloscope manufacturers are starting to port their benchtop technology blocks into a USB form factor. For example, our latest USB oscilloscope uses the exact same front end, ADC, ASIC processor, and GUI as our benchtop InfiniiVision oscilloscopes.
Don’t Write Off USB-Based Test Equipment
Today, there’s a lot of bad equipment on the market. There’s some good gear, and a few pieces of great gear. This is true for both benchtop and USB form factors.
Tomi Engdahl says:
Can You Be an EE Without a Degree?
https://www.electronicdesign.com/community-home/can-you-be-ee-without-degree
Jobs are out there to be had, but if you don’t have a certain type of degree, it’s very unlikely you’ll land one. Lou Frenzel says it’s high time to look beyond that vaunted piece of paper.
Tomi Engdahl says:
The “Sputnik Moment” for the Chinese Semiconductor Industry
http://www.ippreview.com/index.php/Blog/single/id/772.html
Starting with the naming of China as a strategic competitor in the US National Security Strategy at the end of 2017, to the full implementation of the presidential order to slap a special duty on Chinese imports worth around USD 50 billion under Section 301 by August 2018, and the subsequent threat to increase the tariff by another USD 200 billion in July, there is an emerging trend in the US of pinning China as the key strategic challenge and the imposition of measures to contain the ascendancy of China, particularly in the high technology arena.
In the new Defense Authorization Act signed by President Trump, the US government will largely prohibit US government agencies and any company wishing to contract with the government on telecommunication systems from using Chinese components or services. The ban will be implemented over a two-year period, and Chinese parts not involved in routing or viewing data are the only exemptions from the ban.
Most of the observers agreed that the first product on the list of the weakest links in the Chinese industrial sector is the semiconductor. The country used more than 45 percent of global semiconductor production, and it only makes 15 percent of worldwide semiconductors locally. The country ran a trade deficit of USD 193 billion in 2017 on semiconductor trade.
China invested heavily in the semiconductor industry in the 2010s, but the results were less than impressive. In 2009, local semiconductor production accounted for less than 8 percent of the market, and by last year this had grown to 15 percent. The chance of China making enough semiconductors to account for 20 percent of market share by 2020 looks good with some foreign-invested factories and local memory factories coming online in the next two years. Despite the slow increase in market share, Chinese semiconductor manufacturers are still considered a third-tier player in the global semiconductor industry. The US is the undisputed leader, with Japan, South Korea, Taiwan, and Europe in the second-tier ladder. The Chinese remain two-three generations behind the leaders.