Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).
The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.
Manufacturing trends
According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.
300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm.
In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so packaging customers may encounter select shortages well into 2018. Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.
Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.
Moore’s law
Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet.
Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.
South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Samsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.
There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.
Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.
Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.
Application markets
Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season. eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.
The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.
Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.
Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.
Power electronics
The power electronics market continues to grow and gain more presence across a variety of markets. 2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.
Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.
According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.
Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.
Memory
Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND. Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.
NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.
Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND. SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.
Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.
There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.
There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.
5G and IoT
5G something in it for everyone. 5G is big. 5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.
Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.
A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.
The Io edge sensor device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.
Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.
The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.
AI
There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.
The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.
Sources:
Battery Market Goes Bigger and Better in 2018
Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows
Wearables Shipments Expected to Double by 2021
The Week In Review: Manufacturing #186
Five technology trends for 2018
NI Trend Watch 2018 explores trends driving the future faster
Creating Software Separation for Mixed Criticality Systems
Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC
Meeting ISO 26262 Software Standards
DRAM Growth Projected to be Highest Since ’94
NAND Market Expected to Cool in Q1
Memory Market Forecast 2018 … with Jim Handy
3D NAND Storage Fuels New Age of Smartphone Apps
$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top
Advanced Packaging Is Suddenly Very Cool
Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018
Rapid SoC Proof-of-Concept for Zero Cost
EDA Challenges Machine Learning
What Can You Expect from the New Generation of Power Supplies?
Optimizing Machine Learning Applications for Parallel Hardware
FPGA-dataa 10 kertaa nopeammin
Chipmakers Look To New Materials
What the Experts Think: Delivering the next 5 years of semiconductor technology
Programmable Logic Holds the Key to Addressing Device Obsolescence
The Battle of AI Processors Begins in 2018
For China’s Memory Firms, Legal Tests May Loom
Predictions for the New Year in Analog & Power Electronics
Lithium-ion Overcomes Limitations
Will Fab Tool Boom Cycle Last?
The Next 5 Years Of Chip Technology
Chipmakers Look To New Materials
Process Window Discovery And Control
Sensors are Fundamental to New Intelligent Systems
Industrial IoT (IIoT) – Where is Silicon Valley
Internet of things (IoT) design considerations for embedded connected devices
How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets
1,325 Comments
Tomi Engdahl says:
The Materials Side Of AI
https://semiengineering.com/the-materials-side-of-ai/
What comes after tungsten fill for contacts and copper for the lowest-level interconnects?
As we enter the foundry 7nm and below technology nodes, tungsten fill for contacts has reached the physical limits of scaling and copper used in the lowest level interconnects is facing challenges on multiple fronts. Solving these issues will require a new conducting material, namely cobalt. This transition can enable continued device scaling and less power consumption per computation.
Materials bottleneck
The contact and lower interconnects are the smallest and most critical wiring layers delivering current to transistors, and due to continued geometric scaling of logic semiconductors, these metal layers now create a bottleneck to transistor performance. Both tungsten (contact) and copper (lower interconnects) require liners, barriers and adhesion layers that make extending these materials to 7nm and beyond challenging due to the total thickness of these stack films. For the tungsten contact, the issues include:
The CVD titanium nitride barrier layer and ALD tungsten nucleation limit cannot be made thinner due to physical limitations.
Inherent to the CVD tungsten fill is a seam that exacerbates electron scattering, which can lead to performance variation within a device or from die to die.
Cobalt contact metallization, as explained in my previous blog, can use a thinner barrier layer and does not require a nucleation layer, allowing for continued dimensional scaling of the contact. In the case of tungsten, without scaling the liner and barrier layers, there would no longer be pure metal in the contact by the 5nm node. But, if we look at a cobalt contact at 5nm, the volume for cobalt is still 6nm for a similar size contact to tungsten, providing more fill material.
Tomi Engdahl says:
2018 Microwaves & RF Salary & Career Report: Satisfaction
https://www.mwrf.com/learning-resources/2018-microwaves-rf-salary-career-report-satisfaction?NL=MWRF-001&Issue=MWRF-001_20180823_MWRF-001_225&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=19412&utm_medium=email&elq2=e4ebac1a02ed4bf69a9f66ae0b0b6ba7
The highest-ranking factors that contribute to job satisfaction are “researching potential design solutions” and “the challenges that accompany the design of new products.” It should also be noted that compensation ranked third. Overall, it does appear that engineers in this industry are satisfied with their work and the challenges that come with it, along with the compensation they receive for what they do.
However, about 40% did say they would consider leaving the engineering profession. The two most popular reasons were to “try something different” and to “pursue other interests or opportunities.”
Would Engineers Recommend Engineering?
If most of today’s engineers are feeling satisfied, would they in turn recommend engineering as a career path to a young person looking to choose a profession? About 89% of respondents said they would. One remarked, “For the right person, engineering offers the opportunity to learn new things for the entire duration of your career and to be creative with that new knowledge.”
Tomi Engdahl says:
CeraLink capacitors open new dimensions for power electronics systems based on SiC and GaN
http://www.electronics-know-how.com/article/2703/ceralink-capacitors-open-new-dimensions-for-power-electronics-systems-based-on-sic-and-gan
TDK CeraLink™ capacitors are a highly compact solution for the snubber and DC links of fast switching converters, ideal for systems based on SiC and GaN semiconductors. These new capacitors are based on a PLZT ceramic material (lead lanthanum zirconate titanate). In contrast to conventional ceramic capacitors, CeraLink™ capacitors have their maximum capacitance at the application voltage.
Two designs are already in mass production:
LP series: Low profile for reflow soldering with capacitances from 0.25 µF up to 1 µF and rated voltages between 500 V DC and 900 V DC
SP series: For THT mounting with capacitances from 5 µF to 20 µF and rated voltages between 500 V DC and 900 V DC
Tomi Engdahl says:
Top 15 Chip Suppliers Outgrew Market in First Half of Year
https://www.eetimes.com/document.asp?doc_id=1333618
Eleven of the top 15 chip suppliers in terms of sales in the first half of this year posted double digit year-over-year growth, with seven of them growing by more than 20%, according to market research firm IC Insights.
Of the seven top 15 companies that grew by more than 20%, five of them were memory suppliers — Samsung Electronics, SK Hynix, Micron Technology, Toshiba and Western Digital (SanDisk) — IC Insights said. Non-memory firms Nvidia and STMicroelectronics also grew by more than 20%, the firm noted.
Overall, sales for the top 15 suppliers in the first half of the year were up 24% in the first half of the year compared with the first half of 2017, IC Insights said. By contrast, the overall semiconductor market was up 20% year-over-year in the first half of 2018, the firm said.
Tomi Engdahl says:
My 50 Years in Power Electronics
https://www.electronicdesign.com/power/my-50-years-power-electronics?NL=ED-003&Issue=ED-003_20180823_ED-003_360&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=19442&utm_medium=email&elq2=6afd107af1634258be8dfa6be70be033
Sometimes referred to as the “father of power electronics,” Slobodan Ćuk relates how it all started for him in the power-electronics world, and how he’s still at it after a half-century.
Tomi Engdahl says:
Architects Firmly In Control
New chips show multiple levels of innovation, with AI thrown in.
https://semiengineering.com/architects-firmly-in-control/
Moore’s Law isn’t dead, but it certainly isn’t what it used to be. While there may be three or four more generations of node shrinks ahead, the power/performance benefits of scaling are falling off.
This is evident in new chip architectures that were introduced at this year’s Hot Chips conference. Originally started to show off the latest CPUs and co-processors, in past years the focus has been about how to build the fastest chips on the planet. Many of those ended up in supercomputers or were being developed for some futuristic technologies.
Tomi Engdahl says:
Bugs That Kill
https://semiengineering.com/bugs-that-kill/
Behind closed doors: Semiconductor executives talk about the bugs they fear the most and the problems solving them.
Shirley painted a picture of the industry as having followed Moore’s Law. “Around the mid-2000s, that changed. We no longer had the frequency scaling and we no longer had the power efficiencies. While we still had transistor density scaling, we had to pivot from synchronous sequential design to parallelism. What has happened on the verification side? We still have simulation and constrained random simulation. We still have emulation. We live in a sequential logic world and simulation. The idea of parallelism is lost on simulation. So we have new-world design but old-world verification. That has created the notion of simulation resistant superbugs that go through simulation undetected.”
Unsurprisingly, because everyone sitting at the table has a bias towards formal methods, a rallying cry went up for greater adoption of formal. “Our goal is to find the most difficult bugs in the fastest time that we can. Formal brings a lot of value, but it has not been recognized in that way.”
Some verification teams set the bar very high. “Our goal for verification is to run zero simulation cycles! We want to have the design completely verified through formal. I believe it is possible, but the challenge is whether we get to that in 5 years, 20 years or 40 years.
The industry has been working on ways to make formal more approachable. One method is to create waveform since this aligns with the designers’ perspective. “They can see, they can visualize the design and then they can pinpoint where problems are. That is where the designers get excited.”
Tomi Engdahl says:
Gaps In Verification Metrics
https://semiengineering.com/whats-missing-in-verification-metrics/
Experts from Arm, Intel, Nvidia and AMD look at what’s missing from verification data and how to improve it.
Tomi Engdahl says:
Big Changes For Mainstream Chip Architectures
https://semiengineering.com/big-changes-for-mainstream-chip-architectures/
AI-enabled systems are being designed to process more data locally as device scaling benefits decline.
Chipmakers are working on new architectures that significantly increase the amount of data that can be processed per watt and per clock cycle, setting the stage for one of the biggest shifts in chip architectures in decades.
All of the major chipmakers and systems vendors are changing direction, setting off an architectural race that includes everything from how data is read and written in memories to how it is processed and managed—and ultimately how various elements that used to be on a single chip are packaged together. While node shrinks will continue, no one is banking on scaling to keep up with the explosion in data from sensors and an increasing amount of traffic between machines.
Among the changes:
New processor architectures are focusing on ways to process larger blocks of data per cycle, sometimes with less precision or by prioritizing specific operations over others, depending upon the application.
New memory architectures are under development that alter the way data is stored, read, written and accessed.
More targeted processing elements are being scattered around a system, with close proximity to memory. Instead of relying on one main processor that best suits the application, accelerators are being chosen by data type and application.
Work is underway in AI to fuse together different data types as patterns, effectively increasing data density while minimizing discrepancies between different data types.
Packaging is now a core component of architectures, with an increasing emphasis on the ease of modifying those designs.
Tomi Engdahl says:
Understanding space-grade semiconductor reliability and qualification
https://www.edn.com/electronics-blogs/out-of-this-world-design/4461007/Understanding-space-grade-semiconductor-reliability-and-qualification–From-NewSpace-to-traditional
To deliver the next generation of satellite services, spacecraft manufacturers are exploiting the integration, on-board processing, and power consumption advantages of ultra deep-sub-micron semiconductors.
Many NewSpace companies are baselining commercial-grade semiconductors typically fabricated for producing high yields with large densities, fast speed, and low power for consumer applications within a terrestrial environment, e.g. a lifetime between five to ten years and an operating temperature range from 0 to +70°C.
To provide better reliability, some NewSpace companies are using industrial or automotive-grade semiconductors with an extended temperature range from −40 to +110°C.
To provide further product assurance and traceability for space users, Enhanced Plastic guarantees parts from −55 to +125°C as well as batch management, e.g. no variation between foundries, lots, and wafers. Some silicon vendors also offer QCOTS and COTS+ components which have been up-screened to a higher level of reliability to address known failure mechanisms for plastic parts. Burn-in tests identify and eliminate juvenile rejects, and there are checks for humidity and out-gassing, as well as X-ray and C-SAM inspection to verify the integrity of the construction of the microchip. Formal standards exist for each of these assessments and some are carried out on a complete lot, whereas destructive investigation such as radiation testing is performed on a small sample.
Tomi Engdahl says:
Using AI In Chip Manufacturing
https://semiengineering.com/using-ai-in-chip-manufacturing/
Coventor’s CTO drills down into predictive maintenance, the impact of variation, and what this means for yield and future technology.
Tomi Engdahl says:
TSMC 7nm, 5nm to enjoy strong demand for AI chips
https://www.digitimes.com/news/a20180822PD205.html
Taiwan Semiconductor Manufacturing Company (TSMC) has landed new orders for mainly advanced AI solutions requiring its 7nm and 5nm process capacities in 2019, according to industry sources.
TSMC has started commercial production of 7nm chips for smartphone SoCs, and is gearing up for 5nm chip production next year. The foundry has secured new 7nm and 5nm chip orders for 2019 from mainly AI chip developers, the sources indicated.
TSMC is expected to see demand for 7nm and 5nm chips from AI chip companies stronger than that from other chip firms in 2019, given that AI solutions demand greater computing performance and lower power consumption, the sources said. AI chip developers’ ability to attract additional capital is also encouraging the firms to pursue sub-10nm node technologies, the sources continued.
Instead of smartphone SoCs, orders for AI chips are set to be the key driver of demand for TSMC’s 7nm and 5nm process technologies, the sources believe.
Tomi Engdahl says:
Nantero Details DRAM Alternative
NRAM roadmap leads to 256G devices
https://www.eetimes.com/document.asp?doc_id=1333622
Nantero made its case at Hot Chips here that its design based on carbon nanotubes (CNTs) is poised to become a replacement for DRAM. As a first step, partner Fujitsu aims to ship next year a DRAM alternative using the technology.
DRAM represents the largest sector of the semiconductor market, expected to surpass $100 billion in sales this year in part thanks to spiking prices. The technology behind it is expected to hit a wall around the 64-Gbit device, driving suppliers such as Micron to explore alternatives such as phase-change memories.
Nantero’s non-volatile NRAMs use electrostatic charge to activate stochastic arrays of CNT cells it claims are relatively easy to sputter on to any CMOS process. It claims it will outstrip the DRAM roadmap starting with a 100mm2 die made in a 28nm process stacking 4-Gbit CNT layers into 8- and 16-Gbit devices.
Tomi Engdahl says:
Talent shortage hampers China’s IC sector
http://www.ecns.cn/news/sci-tech/2018-08-20/detail-ifyxccrz0968595.shtml
There is a huge talent gap in the domestic integrated circuit (IC) industry, a sector the country has been striving to promote recently, but experts believe the gap could be overcome by offering more competitive salaries, strengthening related education and cultivating interdisciplinary talent.
According to an industry white paper released on Saturday, the talent pool for China’s IC industry was about 400,000 at the end of 2017, but China needs 320,000 more to fill the gap and meet the development demand in the domestic IC industry.
However, only around 30,000 students who graduated in related areas would choose to work in the IC industry after graduation, the paper said.
Tomi Engdahl says:
Mouser – EFDs provide efficient storage for mobile AR and IoT applications (SanDisk SDINDDH4-256G)
https://www.electropages.com/2018/08/mouser-efds-provide-efficient-storage-mobile-ar-iot-applications/?utm_campaign=2018-08-23-Electropages&utm_source=newsletter&utm_medium=email&utm_term=article&utm_content=Mouser+-+EFDs+provide+efficient+storage+for+mobile+AR+and+IoT+applications
The iNAND 8521 embedded flash drives (EFDs) from SanDisk are now stocked at Mouser. Built with 3D NAND technology and the fast UFS 2.1 interface, EFDs provide excellent read and write performance, fulfilling a storage solution for the most data-intensive mobile devices, as well as thin-and-light compute devices.
The EFDs are 11.5mm x 13mm x 1mm storage solutions based on the company’s latest 3D NAND technology. With a fast UFS 2.1 Gear 3 two-lane interface, the EFDs afford energy-efficient, plug-and-play integration in devices with demanding data-centric applications.
Tomi Engdahl says:
GaN technology aiding power supply miniaturisation
https://www.electropages.com/2018/08/gan-technology-aiding-power-supply-miniaturisation/?utm_campaign=&utm_source=newsletter&utm_medium=email&utm_term=article&utm_content=GaN+technology+aiding+power+supply+miniaturisation
The development of GaN (Gallium Nitride)-based electronic devices is allowing for the construction of more compact, lighter and cheaper power converters. And in the coming years, growth in the GaN semiconductor device market is expected to have a major effect on power supply miniaturisation.
According to a recent report, the GaN power semiconductor device market will achieve a CAGR of 4.6 percent between 2017 and 2023 to reach $22.47 billion by 2023, from $16.50 billion. The key drivers include the vast consumer electronics and automotive market with optoelectronic devices holding the largest market share.
However, GaN devices will also have success in innovative military, defence and aerospace applications. This summer, Northrop Grumman delivered the first US Marine Corps (USMC) AN/TPS-80 Ground/Air Task Oriented Radar (G/ATOR) fitted with GaN radar technology. It is designed to replace five ageing and legacy radars. All subsequent G/ATOR production systems will now incorporate GaN. The full rate production programme is scheduled to begin in early 2019.
Tomi Engdahl says:
Amp-Free Photodiodes Promise New Wearables
https://www.eetimes.com/document.asp?doc_id=1333630
Imagine a photodiode that does not require an amplifier. In theory, with no need to surround itself with complex analog circuits to boost signals, a photodiode can be simply dropped into a wearable SoC and connect straight to digital circuits, saving both size and the cost of silicon.
ActLight, a startup founded in 2011 in Lausanne, Switzerland, has devised “Dynamic Photodiode (DPD)” technology and is offering its IP under license to other companies.
According to a program now available online, ActLight will boast that the DPD sensor can deliver “high optical performance, which is especially important in the mobile applications where emitted light power is limited.”
Translation: ActLight, at the event, appears ready to talk about DPD’s competitive advantages compared to existing Avalanche Photo Diodes (APDs) and Single Photon Avalanche Diodes (SPADs) in the context of the ToF-based 3D sensing cameras that are slotted to soon go inside smartphones.
Tomi Engdahl says:
Samsung Maintains Chip Sales Lead Over Intel
https://www.eetimes.com/document.asp?doc_id=1333631
Samsung Electronics maintained its No. 1 position in semiconductor sales over rival Intel in the second quarter, as the South Korean giant continued to benefit from from a sustained chip memory boom.
Samsung’s second quarter share of chip market stood at 15.9%, compared with Intel’s 13.9%, according to market research firm IHS Markit. However, Intel closed the gap somewhat during the quarter, outgrowing Samsung by nearly 3 percentage points as the market for NAND flash memory cooled significantly, IHS said.
Samsung reported second quarter sales of $19.2 billion, up 3.4% compared to the first quarter and up by 33.7% compared to the second quarter of 2017. Intel, meanwhile, had second quarter sales of 16.7 billion, up 6.3% from the first quarter and up 14.9% compared with the first quarter of 2017, according to IHS.
Tomi Engdahl says:
ST & Apple, through Thick and Thin
https://www.eetimes.com/document.asp?doc_id=1333620
Since the first iPhone launch in 2007, Apple has exerted significant influence over semiconductor companies — small, medium and large. The economy of scale Apple has achieved with its popular portables placed the Cupertino, Calif. giant on the throne as new emperor of the tech world.
STMicroelectronics, a Geneva-based chip company, knows Apple too well, including the good, the bad and the ugly.
While ST today — with big design wins inside iPhone X — is viewed as something of a comeback kid, its business has suffered dramatically. It has experienced a huge slip from 2007 (when the iPhone was launched) to 2015 (two years after its mobile joint venture ST-Ericsson was shut down). ST’s revenue in 2007 was $10 billion, but that went down to $6.9 billion in 2015.
Tomi Engdahl says:
The “Sputnik Moment” for the Chinese Semiconductor Industry
http://www.ippreview.com/index.php/Blog/single/id/772.html
Starting with the naming of China as a strategic competitor in the US National Security Strategy at the end of 2017, to the full implementation of the presidential order to slap a special duty on Chinese imports worth around USD 50 billion under Section 301 by August 2018, and the subsequent threat to increase the tariff by another USD 200 billion in July, there is an emerging trend in the US of pinning China as the key strategic challenge and the imposition of measures to contain the ascendancy of China, particularly in the high technology arena.
In the new Defense Authorization Act signed by President Trump, the US government will largely prohibit US government agencies and any company wishing to contract with the government on telecommunication systems from using Chinese components or services. The ban will be implemented over a two-year period, and Chinese parts not involved in routing or viewing data are the only exemptions from the ban.
The trade dispute and the US denial of export privileges of semiconductors to ZTE in April and the subsequent paralysis of ZTE’s operations until the ban was lifted in July have given rise to concerns that China has technological shortcomings in some critical areas. The possibility of restricting access to the technology and products in these vital areas from the US is increasing.
Tomi Engdahl says:
https://semiengineering.com/week-in-review-manufacturing-test-8/
The United States and China have escalated the ongoing trade war. Both sides have implemented 25% tariffs on $16 billion worth of each other’s goods, according to a report from Reuters. The U.S. and China have slapped a combined $100 billion in tariffs on products since early July, according to the report.
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8345-yhden-atomin-transistori-kuluttaa-aarimmaisen-vahan
Tomi Engdahl says:
GlobalFoundries scuttles 7nm chip plans claiming no demand
AMD promptly dumps it and hires TSMC for next-gen chips
https://www.theregister.co.uk/2018/08/27/globalfoundries_scuttles_7nm/
GlobalFoundries is putting its pursuit of 7nm chips on hold indefinitely.
CEO Tom Caulfield said the chip fab would be shifting its resources (including an R&D restructure) to the 14 and 12nm FinFET efforts, where he says most of GlobalFoundries chip customers are focusing.
In announcing the move, Caulfield said companies don’t seem to have much interest in the planned 7nm architecture. Rather, they are planning to stay with the current-gen architectures and squeeze performance out by other means.
“The vast majority of today’s fabless customers are looking to get more value out of each technology generation to leverage the substantial investments required to design into each technology node,” Caulfield claims.
Tomi Engdahl says:
GlobalFoundries Halts 7nm Work
Next FinFET node would have cost $2-4B
https://www.eetimes.com/document.asp?doc_id=1333637
The race to drive semiconductor technology to the bleeding edge has narrowed to three companies.
Globalfoundries suspended work on a 7nm node. It will lay off less than 5% of its workforce and make its ASIC group a wholly-owned subsidiary so it can partner with one of the remaining 7nm foundries.
It would have cost GF $2-4 billion to ramp up the 40-50,000 wafers/month capacity needed to have a chance of making a return on the node. “The financial investment didn’t make as much sense as doing something else,” said Tom Caulfield, the former general manager of Fab 8 named chief executive of GF in March.
In an interview in May, Caulfield said GF’s owners the Mubadala Investment Company in the United Arab Emirates, wanted improved financial performance. In June, the company announced a 5% layoff without cutting any products, affecting about 900 of its 18,000 employees.
“The lion’s share of our customers…have no plans for” 7nm chips. Industry-wide demand for the 14/16 node was half the volume of 28nm, and 7nm demand may be half the level of the 14/16nm node, Caulfield said.
Tomi Engdahl says:
IDT Teams with Startup on Radar Imaging Chips
https://www.eetimes.com/document.asp?doc_id=1333642
Integrated Device Technology (IDT) has announced a strategic partnership with Bangalore, India-based startup Steradian Semiconductor to deliver its first ultra-high-resolution 4D mmWave imaging radar chip for industrial, security, medical, and autonomous vehicle markets.
The chip is developed by a team of ex-Qualcomm and Texas Instruments alumni based in India who have over 50 patents between them ranging from GPS to LTE-Advanced.
Tomi Engdahl says:
Amp-Free Photodiodes Promise New Wearables
https://www.eetimes.com/document.asp?doc_id=1333630
Imagine a photodiode that does not require an amplifier. In theory, with no need to surround itself with complex analog circuits to boost signals, a photodiode can be simply dropped into a wearable SoC and connect straight to digital circuits, saving both size and the cost of silicon.
ActLight, a startup founded in 2011 in Lausanne, Switzerland, has devised “Dynamic Photodiode (DPD)” technology and is offering its IP under license to other companies.
Serguei Okhonin, Actlight’s CEO, told EE Times that his company recently picked up “one of the top five semiconductor companies” as its first licensee. Okhonin, however, is not yet disclosing the chip vendor’s name.
Tomi Engdahl says:
Apple-TSMC Sole-Source Embrace Holds Risk for iPhone Maker
https://www.eetimes.com/document.asp?doc_id=1333615
Apple is likely to keep TSMC as its sole supplier of application processors for at least two years as other foundries fail to meet expectations, according to industry analysts.
The world’s biggest electronics company and the world’s biggest foundry have their arms around each other, yet both may find the intimacy a bit uncomfortable. Apple will be risking the regular launch of new iPhones and iPads by counting on TSMC for production of follow-up processors to the A11 without a backup supplier. TSMC, on the other hand, will depend on Apple to fill up nearly 80 percent of its leading-edge 7nm capacity, entering production this year.
Tomi Engdahl says:
The Case for Heterogeneous Integration
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333636
Interest in on-package heterogeneous integration (HI) has grown substantially in recent years. HI offers computing and communications devices enhanced functionality, faster time to market and silicon yield resiliency.
The package is the ideal heterogeneous integration platform because it provides short, power efficient, high bandwidth connections between components in a compact form factor. HI itself is not a new idea and a number of examples of on-package heterogeneous integration can be found in the past.
The trend towards increasing adoption of heterogeneous integration in mobile computing, automotive, high performance computing, medical devices, aerospace, defense and other demanding applications will continue. System-in-Package (SIP) architectures that integrate digital, analog, RF, optical and discrete devices for the high-performance, low-power, low-cost products of the future, are of great interest. These SIP technologies require a focused effort on feature size reduction to enable form-factor and component density scaling.
Planar and 3D architectures will be utilized. Efficient power delivery and enhanced thermal management will be needed to enable the successful evolution of these SIP architectures. SIP CAD flows that support of efficient heterogeneous design and verification will be essential.
Heterogeneous integration of many diverse components from different sources brings unique design, process, materials, test, reliability, equipment and security challenges.
Tomi Engdahl says:
Why I’m Involved With the HI Roadmap
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333635
As Moore’s Law – which has driven exponential economic and industry growth – reaches its limits, the semiconductor, IC and microelectronics industries need another exponential growth driver that can bring additional breakthroughs on function, performance and power features.
The heterogeneous integration (HI) of various technology and design blocks (i.e., silicon and/or non-silicon components) in continuously shrunken form-factors (such as a single package or module) will be the most effective and powerful growth driver, transcending monolithic (homogeneous) integration (MI), which has been used to create many system performance and form-factor breakthroughs in the last six decades of ICs.
Tomi Engdahl says:
Memory Forecast to Account for 53% of Semiconductor Capex
https://www.eetimes.com/document.asp?doc_id=1333644
Capital spending for memory chips is expected to account for 53% of total industry capex of $102 billion this year, nearly twice the percentage that memory accounted for just five years ago, according to market research firm IC Insights.
With all NAND flash vendors ramping up 3D NAND capacity, NAND-related capital expenditures are forecast to total more than $31 billion, 31% of the semiconductor industry total, according to the latest edition of IC Insights’ McClean Report. The total for NAND capex would represent an increase of 13% over 2017, when NAND flash capex grew by 91%.
Meanwhile, the report forecasts that capital spending for DRAM and SRAM will increase more than any other industry segment, growing 41% in 2018 after an 82% increase last year. DRAM/SRAM capex is expected to total $22.9 billion, 22% of the industry-wide total, according to the report.
Tomi Engdahl says:
GlobalFoundries Halts 7-Nanometer Chip Development
https://spectrum.ieee.org/nanoclast/semiconductors/devices/globalfoundries-halts-7nm-chip-development
In a major shift in strategy, GlobalFoundries is halting its development of next-generation chipmaking processes. It had planned to move to the so-called 7-nm node, then begin to use extreme-ultraviolet lithography (EUV) to make that process cheaper. From there, it planned to develop even more advanced lithography that would allow for 5- and 3-nanometer nodes. Despite having installed at least one EUV machine at its Fab 8 facility in Malta, N.Y., all those plans are now on indefinite hold, the company announced Monday.
Tomi Engdahl says:
Huge Performance Gains Ahead
Where the next boosts will come from and why.
https://semiengineering.com/huge-performance-gains-ahead/
Rambus Chief Scientist Craig Hampel talks about what will drive the next big performance gains after Moore’s Law, from the data center to the edge.
Tomi Engdahl says:
Energy-Efficient AI
How to improve the energy efficiency of AI operations.
https://semiengineering.com/energy-efficient-ai/
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8366-mooren-laki-tulossa-tiensa-paahan
Tomi Engdahl says:
Uusia yllätyksiä kaksiulotteisista
https://www.nanobitteja.fi/uutiset.html?138826
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8361-valoa-sahkoksi-piita-tehokkaammin
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/08/31/valo-kulkemaan-mikrosiruissa-kamera-ilman-optiikkaa/
http://www.etn.fi/index.php/13-news/8368-uusia-keinoja-valon-manipulointiin
Tomi Engdahl says:
New Battery Chemistries Offer Alternatives for EVs and Grid Applications
https://www.designnews.com/electronics-test/new-battery-chemistries-offer-alternatives-evs-and-grid-applications/126102941759320?ADTRK=UBM&elq_mid=5490&elq_cid=876648
Materials scientists at Argonne National Laboratory are studying magnesium, lithium-sulfur, and flow batteries.
A trio of new battery advancements could one day serve to boost energy density and cut cost in applications ranging from electric cars to grid storage systems, a materials scientist will tell attendees at the upcoming Battery Show.
Lynn Trahey of Argonne National Laboratory will say that scientists are studying magnesium and lithium-sulfur chemistries that could one day offer the potential to replace lithium-ion, as well as flow batteries with inexpensive membranes that could eventually act as alternatives to today’s vanadium redox batteries. Such batteries, if successful, would improve on the weaknesses of today’s existing chemistries and offer a vast new set of applications, she added.
Tomi Engdahl says:
Analysis: The Growing Impact of Rare Earth Elements
https://www.designnews.com/electronics-test/analysis-growing-impact-rare-earth-elements/175978578959272?ADTRK=UBM&elq_mid=5273&elq_cid=876648
Trouble may be brewing as China’s monopoly of the critical materials needed for electric vehicles and national security may be impossible to break.
Tomi Engdahl says:
3D Stretchable Electronics Could Make Wearables as Advanced as Smartphones
https://blog.hackster.io/3d-stretchable-electronics-could-make-wearables-as-advanced-as-smartphones-585d0134c14f
Tomi Engdahl says:
Nikkei:
Renesas, Japan-based automotive chip company, is in late stage talks to acquire US-based wireless chip maker Integrated Device Technology, sources say for $6B+
Renesas chases $6bn deal for IDT to enhance self-driving chips
https://asia.nikkei.com/Business/Business-Deals/Renesas-chases-6bn-deal-for-IDT-to-enhance-self-driving-chips
Once-troubled Japanese chipmaker is on the hunt in US
TOKYO — Japanese semiconductor manufacturer Renesas Electronics wants to acquire U.S.-based Integrated Device Technology in a deal that could total well over $6 billion, hoping to expand its global footprint in automotive chips.
The companies are in the final stages of talks and are to meet at the beginning of next week. The prospects for striking an agreement remain unclear, but Renesas is expected to make a tender offer for all of IDT’s shares at a premium.
Tomi Engdahl says:
Can’t Afford an Atomic Clock? Get a Molecular One!
https://www.electronicdesign.com/analog/can-t-afford-atomic-clock-get-molecular-one
Using the THz-range resonance of a molecule rather than of atoms led to the development of a clock with nearly the performance of atomic clocks but fabricated as an IC.
Atomic clocks based on stimulated resonance of cesium 133 or rubidium atoms are the most accurate clocks in relatively widespread use (there’s one in each GPS satellite), but they’re costly and relatively large. Even the chip-scale atomic clocks for specialty applications such as military-mission synchronization in the field cost on the order of $1,000.
However, a team at MIT’s Department of Electrical Engineering and Computer Science (EECS) working with their Terahertz Integrated Electronics Group (TIEG) has developed a clock that’s almost as good. It’s built as an IC, with corresponding reduction in size, power, and cost.
Their “molecular” clock relies on measuring the rotation of molecular carbonyl sulfide (OCS), when exposed to certain frequencies; that’s why it is called “molecular” and not “atomic.” (Note: carbonyl sulfide—more formally, 16O12C32S—is a chemical compound with other often-used designations and abbreviations as well.)
OCS and Terahertz Frequencies
To create the needed molecular resonance, which is the basis for the approach, they attached a “gas cell” filled with OCS. The IC generates and sweeps a variable-frequency terahertz (THz) signal across the cell that incites the molecules to start rotating. At the same time, a THz receiver measures the energy of these rotations and adjusts the THz oscillation frequency via a closed-loop arrangement. The OCS molecules reach peak rotation and show a sharp signal response very close to 231.060983 GHz, which is their “natural” resonance frequency. The THz source clock at this resonance frequency is then divided down to generate standard one-pulse-per-second timing pulses.
Tomi Engdahl says:
A Guide to Wireless Connectors
https://www.electronicdesign.com/power/guide-wireless-connectors?NL=ED-003&Issue=ED-003_20180831_ED-003_408&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=19617&utm_medium=email&elq2=a33cf759f8dd4fe1983323f348804e23
Wireless-power-transfer (WPT) technology using near-field magnetic coupling (NFMC) has been gaining a lot of attention, primarily in the area of wireless charging for applications like smartphone applications. However, there exists another class of products commonly referred to as “wireless connectors” (WiCo), or “wireless couplers,” that utilize the same physical principles.
Wireless connectors are important for applications where conventional mechanical connectors may not be reliable, or in some cases not even possible to use. Examples of the issues that connectors may face include intrusion from liquid, dirt, and/or corrosive environments. In addition, physical electrical connections become challenging when a situation demands freedom of movement between two or more systems.
WPT as Applied to Connectors
Most devices in the market that currently use wireless power for battery-charging applications follow an established standard (such as Qi1 or AirFuel2) to satisfy interoperability and performance requirements. However, these standards are primarily for consumer electronics applications.
While repurposing of the hardware could allow for some wireless-connector applications, limitations will be imposed, for example, on coupling, data rates, BOM, range, etc. Furthermore, for WiCo, interoperability may not necessarily be needed since the system is typically “closed,” meaning there will always be a known transmitter and corresponding receiver (“a mated pair”). This gives the designer options for customization and cost optimization.
That being said, it’s conceivable that some classes of wireless connectors may evolve as standards, similar to USB for wired connectors. For this to happen, the solution(s) will need to address a common problem across an industry or industries.
NFMC and Communication
For NFMC applications, antenna (coil) size is wide-ranging, typically greater than about 25 mm in diameter. Preferred frequencies range from 10 kHz to about 13.56 MHz.
Both magnetic induction (MI) and magnetic resonance (MR) use the same physical principle, i.e., a time-varying current in the transmitter antenna is used to create a time-varying magnetic field that induces a voltage in a receiver antenna. The “generally accepted” distinction between MI and MR lies in the use of reactive components to reduce the reactive impedance looking into the antenna—MI doesn’t use it; MR uses it. In reality, all systems known to the authors use capacitive components to alter the effective impedance looking into the antennas, both on the receiver side and the transmitter side.
Unlike most mechanical connectors, wireless connectors offer the benefit of freedom of movement, which is particularly advantageous in harsh environments.
Tomi Engdahl says:
HiSilicon Announces The Kirin 980: First A76, G76 on 7nm
by Andrei Frumusanu on August 31, 2018 8:30 AM EST
https://www.anandtech.com/show/13298/hisilicon-announces-the-kirin-980-first-a76-g76-on-7nm
This year at IFA, instead of suddenly finding the new silicon on the show floor, Huawei’s CEO Richard Yu announced this year’s new Kirin 980 during the company’s keynote speech. For readers who’ve been attentively following our articles over the last few months, today’s news should hopefully not come at too big of a surprise, as I’ve been heavily hinting at the timing of the first new 7nm Cortex A76 silicon designs coming later this year in commercial devices, with HiSilicon being the prime candidate for being the first vendor on the market with the their new generation SoC.
Huawei’s silicon design division HiSilicon has been a key strategic component for the company’s products, as it enables it to differentiate itself in a more drastic way than what we usually see from other vendors who simply rely on established open-market SoC vendors such as Qualcomm
Tomi Engdahl says:
https://www.edn.com/electronics-blogs/tales-from-the-cube/4314585/Solid-state-physics-convinces-customers?utm_source=newsletter&utm_campaign=ad&utm_medium=EDNFunFriday-20180831
Tomi Engdahl says:
Can Hot Hot Glue Cause Short Short Circuits?
https://www.eeweb.com/profile/max-maxfield/articles/can-hot-hot-glue-cause-short-short-circuits?utm_source=Aspencore&utm_medium=EDN
Tomi Engdahl says:
https://semiengineering.com/week-in-review-manufacturing-test-9/
GlobalFoundries said that it is putting its 7nm finFET program on hold indefinitely and has dropped plans to pursue technology nodes beyond 7nm.
To be sure, it was a tough decision by GF to put 7nm on hold. But generally, analysts believe that GF made the right decision. “There’s only a handful of semiconductor companies that will require high-volume 7nm technology right when the process is rolled out,”
Others agreed. “GF made a very rational decision. The cost of having an alternate source for a design at 7nm is $200 million to $300 million and payback is low unless there is some type of disaster,” said Handel Jones, chief executive of International Business Strategies (IBS). “(For GF), there is the ability to have good financial returns from having access to specialty wafer processes such as 22FDX and 12FDX.”
In his IFA 2018 keynote, titled “The Ultimate Power of Mobile AI,” Huawei Consumer Business Group CEO Richard Yu introduced the Kirin 980, a 7nm, system-on-a-chip (SoC) for use in the company’s future smartphones. As the world’s first commercial SoC manufactured with TSMC’s 7nm process, Kirin 980 will feature a “Dual NPU AI” processing capability.
Renesas is considering buying Integrated Device Technology (IDT), according to various reports.
Tomi Engdahl says:
IPUs? These New Chips Are Minted For Marketing
https://www.wired.com/story/ipus-these-new-chips-minted-for-marketing/
IPU
n. Short for intelligence processing unit, a new kind of computer chip optimized for AI.
Way back in the early 2000s, when the first Xbox came out, researchers discovered they could hack videogame consoles for scientific uses.
Today, researchers still use GPU chips, not just for modeling but for artificial intelligence. Since each one contains lots of mini brains that crowdsource the work in parallel, they’re good at big-data jobs like image recognition. Good, but not awesome. So companies are taking that idea and racing to create a new generation of chips just for AI.
A startup called Graphcore (which recently built a 2,000-teraflop AI supercomputer the size of a gaming PC) calls them IPUs. Get it? I for intelligence.
As a name, IPU, unlike its bland _PU predecessors, seems minted for marketing. And for good reason.
If Moore’s Law taps out soon, as many think it could, future gains in speed will come from specialization: niche chips designed for narrow uses. In a business ruled by lumbering giants, that’s a bonanza for newbies, and the VC money is flying.
Tomi Engdahl says:
There Is A Cost To Extended Lifetime Products. It’s 7.5%.
https://hackaday.com/2018/09/03/there-is-a-cost-to-extended-lifetime-products-its-7-5/
Silicon and integrated circuits come and go, but when it comes to extended lifetime support from a company, it’s very, very hard to find fault with Microchip. They’re still selling the chip — new — that was the foundation of the Basic Stamp. That’s a part that’s being sold for twenty-five years.
While the good times of nearly unlimited support for products that are decades old isn’t coming to an end, it now has a cost. According to a press release from Microchip, the price of these old chips will increase. Design something with an old chip, and that part is suddenly going to cost you 7.5% more.
“For all orders received after 31 August, pricing for the products listed will be subject to an increase of 7.5%”
covers the low-end ATtinys, ATMegas, and PICs that are used in thousands of tutorials available online. The ATtiny85 is not affected, but the ATMega128 is. There are a number of PICs listed
Tomi Engdahl says:
Yimou Lee / Reuters:
China is luring senior semiconductor engineers from Taiwan with fat salaries and perks, in a drive to reduce its dependence on overseas firms for prized chips — TAIPEI (Reuters) – A huge pay rise, eight free trips home a year and a heavily subsidized apartment.
China lures chip talent from Taiwan with fat salaries, perks
https://www.reuters.com/article/us-china-semiconductors-taiwan-insight/china-lures-chip-talent-from-taiwan-with-fat-salaries-perks-idUSKCN1LK0H1
A huge pay rise, eight free trips home a year and a heavily subsidized apartment. It was a dream job offer that a Taiwanese engineer simply could not refuse.
The engineer joined a growing band of senior Taiwan professionals working in China’s booming and fast-developing semiconductor industry.
Attracting such talent from Taiwan has become a key part of an effort by China to put the industry into overdrive and reduce the country’s dependence on overseas firms for the prized chips that power everything from smartphones to military satellites.
China imported $260 billion worth of semiconductors in 2017, more than its imports of crude oil. Home-made chips made up less than 20 percent of domestic demand in the same year
More than 300 senior engineers from Taiwan have moved to Chinese chipmakers so far this year, joining nearly 1,000 others who have relocated since Beijing set up a $22 billion fund to develop the chip industry in 2014
China’s semiconductor plans accelerated this year after the United States banned sales of chips to the Chinese phone vendor ZTE
Tariffs imposed by Washington on $16 billion worth of China’s imports have hit Chinese semiconductors, which are now subject to tariff rates of 25 percent.