Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).
The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.
Manufacturing trends
According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.
300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm.
In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so packaging customers may encounter select shortages well into 2018. Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.
Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.
Moore’s law
Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet.
Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.
South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Samsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.
There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.
Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.
Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.
Application markets
Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season. eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.
The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.
Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.
Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.
Power electronics
The power electronics market continues to grow and gain more presence across a variety of markets. 2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.
Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.
According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.
Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.
Memory
Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND. Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.
NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.
Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND. SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.
Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.
There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.
There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.
5G and IoT
5G something in it for everyone. 5G is big. 5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.
Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.
A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.
The Io edge sensor device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.
Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.
The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.
AI
There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.
The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.
Sources:
Battery Market Goes Bigger and Better in 2018
Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows
Wearables Shipments Expected to Double by 2021
The Week In Review: Manufacturing #186
Five technology trends for 2018
NI Trend Watch 2018 explores trends driving the future faster
Creating Software Separation for Mixed Criticality Systems
Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC
Meeting ISO 26262 Software Standards
DRAM Growth Projected to be Highest Since ’94
NAND Market Expected to Cool in Q1
Memory Market Forecast 2018 … with Jim Handy
3D NAND Storage Fuels New Age of Smartphone Apps
$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top
Advanced Packaging Is Suddenly Very Cool
Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018
Rapid SoC Proof-of-Concept for Zero Cost
EDA Challenges Machine Learning
What Can You Expect from the New Generation of Power Supplies?
Optimizing Machine Learning Applications for Parallel Hardware
FPGA-dataa 10 kertaa nopeammin
Chipmakers Look To New Materials
What the Experts Think: Delivering the next 5 years of semiconductor technology
Programmable Logic Holds the Key to Addressing Device Obsolescence
The Battle of AI Processors Begins in 2018
For China’s Memory Firms, Legal Tests May Loom
Predictions for the New Year in Analog & Power Electronics
Lithium-ion Overcomes Limitations
Will Fab Tool Boom Cycle Last?
The Next 5 Years Of Chip Technology
Chipmakers Look To New Materials
Process Window Discovery And Control
Sensors are Fundamental to New Intelligent Systems
Industrial IoT (IIoT) – Where is Silicon Valley
Internet of things (IoT) design considerations for embedded connected devices
How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets
1,325 Comments
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8592-atomikalvoista-elektroniikkaa-nopeasti
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/10/24/eurooppalainen-verkkokauppa-kierrattamaan-sahko-ja-elektroniikkajatteen/
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/10/22/kahden-tuuman-2d-kiekoilla-elektroniikkaa/
Tomi Engdahl says:
Improve cost, efficiency and savings with custom-spooled component reels
https://www.eetimes.com/document.asp?doc_id=1333876
Investing in surface-mount technology unlocks substantial cost savings via automated component placement and increased density of PCB layout. To achieve the best production performance, the component delivery system must be capable of feeding parts at high speeds positively indexed to the demands of the machine. The preferred packing material available today for these demands is tape and reel.
Often, when developing a new product or component, manufacturers need to make limited-production runs. And because a vast majority of electronic board assembly is fully automated, manufacturers require the necessary components supplied on a reel for the loading machines.
A common problem for short-production runs is that most distributors hold only reels with sizeable pre-defined quantities, making it difficult to order the exact number of components needed.
Tomi Engdahl says:
Imec, ASML Team on Post-3nm Lithography
https://www.eetimes.com/document.asp?doc_id=1333896
Research organization Imec and lithography equipment manufacturer ASML plan to establish a joint research lab to explore printing nanoscale devices towards the post-3nm logic node.
The collaboration is part of a new five-year program that builds on a near 30-year relationship between imec and ASML and will have two phases. The first is to develop and accelerate the adoption of EUV lithography for high-volume production, including the latest available equipment for EUV.
The second phase will explore the potential of next-generation high-NA (numerical aperture) EUV lithography to enable printing of even smaller nanoscale devices advancing semiconductor scaling beyond 3nm.
Tomi Engdahl says:
Linting With ALINT-PRO Within Active-HDL
A look at a new approach called unit linting.
https://semiengineering.com/linting-with-alint-pro-within-active-hdl/
Active-HDL suggests an early-bug-detection flow via the integration with ALINT-PRO. The Active-HDL user has an access to both different linting methodologies supported by ALINT-PRO: full chip-level linting and unit linting. Both methods complement each other and are usually applied at different stages of the design cycle.
Tomi Engdahl says:
Opinion: Texas Instruments says semiconductor demand is slowing, sending ripples of fear across the sector
https://www.marketwatch.com/story/texas-instruments-says-semiconductor-demand-is-slowing-sending-ripples-of-fear-across-the-sector-2018-10-23
Texas Instruments execs see ‘softer market,’ unsure of the extent of the downturn
The semiconductor industry has been struggling on Wall Street amid signs that a slowdown was coming. On Tuesday afternoon, doubters seemed to receive confirmation.
Texas Instruments Inc. TXN, -8.22% TXN, -8.22% said it is seeing a slowdown in demand, its first since 2015, in a third-quarter earnings report after the bell. Chief Executive Rich Templeton, in his first comment in the announcement, proclaimed, “demand for our products slowed across most markets.”
TI execs did not believe it was just a problem in the third quarter, as the company’s guidance was lower than expected
“We’re heading into a softer market, and we plan to execute as we have in the past,” Chief Financial Officer Rafael Lizardi said, adding that the company plans to be disciplined with its operating plan and reduce its number of wafer starts, meaning that it will build fewer semiconductor wafers.
TI shares slumped 6% in the after-hours session and extended those losses slightly in premarket trade Wednesday. And while TI execs tried to be careful not to bring the entire industry into its forecast — “We believe this is mostly driven by a slowdown in semiconductors, meaning we really can’t speak to any macro-driven event,”
Tomi Engdahl says:
Is 3D IC The Next Big Profit Driver?
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333893
Changes occurring in the 3D-IC landscape may be just the beginning of a significant inflection point in the IC industry.
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8613-piille-loytyi-korvaaja-optoelektroniikassa
Tomi Engdahl says:
11 Myths About Custom Silicon
https://www.electronicdesign.com/analog/11-myths-about-custom-silicon?NL=ED-003&Issue=ED-003_20181024_ED-003_763&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=20936&utm_medium=email&elq2=7da1b43429594cf99277b6357581453e
Preconceptions about custom chip design are that it’s costly and takes up too much time. But what’s the real story in today’s semiconductor industry climate?
When it comes to designing electronic products, custom silicon really is the gold standard. Having custom SoCs designed specifically for your application delivers an optimized solution in terms of power efficiency, performance, board space, and bill-of-materials (BOM) costs. Taking the custom approach also enables solutions with unique capabilities that would be difficult to achieve using off-the-shelf hardware, and it creates devices that are difficult to reverse-engineer, giving IP security.
However, ASICs are notoriously expensive to create and time-consuming to design—or are they?
In fact, recent changes in the semiconductor industry mean many of the preconceptions about custom chip design are no longer true. So, let’s bust these myths!
Tomi Engdahl says:
Reducing Idle Losses While Meeting IEC 62368-1
https://www.eeweb.com/profile/power-integrations/articles/reducing-idle-losses-while-meeting-iec-62368-1
Manufacturers today are under pressure to improve energy efficiency and finding ways to reduce system losses when the system is idle (no load) has become an important consideration. In equip- ment ranging from televisions and computers to microwave ovens, fridges, air conditioning sys- tems and printers, every milliwatt saved when the device is waiting idle between operations is vital.
A significant amount of idle power is consumed by the power supply, especially in the EMI filter section. A good example is the energy consumed by the safety discharge resistor placed across the X capacitor. Another contributor to losses is any high-voltage resistor divider network, such as a feedback resistor network. These networks still operate during standby mode and their impact on power consumption can be significant.
To calculate this impact, consider a 1 MΩ discharge resistor. If 230 VAC RMS is applied across it, the loss is equal to the square of the RMS voltage across the resistor divided by the resistor value – in this case 53 mW. This is a common scenario for a 90 W notebook computer, for example. In a 200 W power supply where larger X-capacitors are required, the loss can go up to around 125 mW.
One of the standard circuit techniques to eliminate such idle losses is to open a path during standby mode using an electronically-controlled switch which takes the network offline. ICs are available to perform this function, such as the CapZero-2 two-terminal X capacitor discharge IC from Power Integrations.
The standalone devices can be simply dropped into the circuit, in series with the discharge resistor on the board and losses are immedi- ately reduced. CapZero-2 ICs are already safety certified so all that is needed is an update to the safety file, and one part covers a broad range of X capacitor values.
When AC voltage is applied, it blocks current flow in the X capacitor safety discharge resistors, reducing the power loss to less than 5 mW at 230 V AC. When AC voltage is disconnected, it au- tomatically discharges the X capacitor by connecting the series discharge resistors.
Tomi Engdahl says:
From Physics To Applications
eSilicon’s CEO zeroes in on the impact of AI and advanced packaging on ASIC design.
https://semiengineering.com/from-physics-to-applications/
Tomi Engdahl says:
EDA Cloud Adoption Hits Speed Bumps
https://semiengineering.com/cloud-adoption-hits-speed-bumps/
What problems are prohibiting semiconductor design moving into the Cloud? Steps are being taken to overcome them.
If moving semiconductor design to the Cloud was easy and beneficial, everyone would be doing it. But so far, few have done more than dip a toe.
The level of difficulty associated with migrating to the Cloud varies, depending upon who you talk to. The reality is that not everyone makes it as easy as it could be, or is not willing to put the necessary effort into making it easier. There is certainly a chicken-and-egg problem.
Tomi Engdahl says:
Goblins in the Tech Market: Tariffs
https://www.sealevel.com/2018/10/16/goblins-in-the-tech-market-tariffs/
It’s Spooktober, but year-round, our fears are what we do not know or understand. However, some things are easier to learn about than others, which means saving space for the things that are actually terrifying.
One such scary thing can be government policies, especially economic ones. This has become true for the tariffs levied by President Trump this year, which have directly affected technology hardware companies, as well as other industries and personal consumption. However, they don’t have to be scary, maybe just annoying.
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8621-perovskiitti-voi-korvata-piin-aurinkokennoissa
https://www.uusiteknologia.fi/2018/10/26/aurinkokennojen-materiaali-voi-vaihtua/
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/10/26/kaytetyt-alkaliparistot-muuttuvat-lannoitteeksi/
Tomi Engdahl says:
The Good, the Bad, and the Weird: 3 Directions for Moore’s Law
https://spectrum.ieee.org/semiconductors/design/the-good-the-bad-and-the-weird-3-directions-for-moores-law
Tomi Engdahl says:
Miten suunnitella ohjelmoitava osuus ASIC-piirille?
http://www.etn.fi/index.php/13-news/8630-miten-suunnitella-ohjelmoitava-osuus-asic-piirille
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/10/29/joustavaa-elektroniikkaa-vientituotteisiin/
Tomi Engdahl says:
TSMC enhances backend CoWoS technology
https://www.digitimes.com/news/a20181025PD212.html
Taiwan Semiconductor Manufacturing Company (TSMC) has made progress in enhancing its backend chip-on-wafer-on-substrate (CoWoS) technology to support diverse high-performance computing (HPC) applications. The pure-play foundry is expected to begin volume production of chips using its fourth-generation CoWoS process in 2019, according to industry sources.
TSMC is also expected to introduce the fifth generation of its CoWoS process in 2020, the sources indicated. The fifth-gen CoWoS process is expected to support much larger interposer designs with up to 3X the reticle size to respond to advances in HPCs for artificial intelligence (AI) applications, the sources said.
TSMC’s CoWoS packaging has already attracted orders from US-based GPU and FPGA suppliers, and major China-based fabless IC firms, the sources noted.
TSMC has disclosed most of CoWoS products are built using 16nm process technology currently. It has started developing CoWoS for 7nm since 2018.
Tomi Engdahl says:
3D NAND: Challenges Beyond 96-Layer Memory Arrays
https://semiengineering.com/3d-nand-challenges-beyond-96-layer-memory-arrays/
Bottlenecks in stacking memory layers and new opportunities for solutions.
Tomi Engdahl says:
Intel Gives Bullish Outlook on Surprising Jump in PC Demand
https://www.bloomberg.com/news/articles/2018-10-25/intel-forecast-beats-estimates-on-surprising-jump-in-pc-demand
Intel Corp., the world’s second-biggest semiconductor maker, gave bullish forecasts that demonstrate growth is back in a personal-computer market many thought was dying.
Revenue in the fourth quarter will be about $19 billion and profit will be $1.16 per share, Intel said in a statement Thursday. Both projections beat analysts’ average estimate. Intel also lifted its revenue prediction for 2018 to $71.2 billion, $6 billion more than it was forecasting at the beginning of the year.
The company, whose processors are at the heart of most of the world’s laptops, desktops and servers, has been raking in cash this year as companies have spent on upgrading their hardware. Intel reported revenue from its PC-centric business, its largest unit, rose 16 percent in the third quarter to $10.2 billion.
“After seven years of decline — and some belief that it was in perpetual decline — what we’ve seen this year is some stabilization,”
Tomi Engdahl says:
IC chip output growth to slow in 2019: center
http://www.taipeitimes.com/News/biz/archives/2018/10/26/2003703027
RISKS TO GROWTH:The US-China trade war and intensifying pricing competition from China in mid-to-low end products pose a threat to Taiwanese makers’ growth next year
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8636-proteiinin-nanolangoista-voidaan-tehda-elektroniikkaa
Tomi Engdahl says:
11 Myths About Custom Silicon
https://www.electronicdesign.com/analog/11-myths-about-custom-silicon?NL=ED-003&Issue=ED-003_20181026_ED-003_941&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=21045&utm_medium=email&elq2=4f8f2d9d73924acfa36b44dc931aa058
Preconceptions about custom chip design are that it’s costly and takes up too much time. But what’s the real story in today’s semiconductor industry climate?
Tomi Engdahl says:
The Impact of Moore’s Law Ending
https://semiengineering.com/the-impact-of-moores-law-ending/
Chips will cost more to design and manufacture even without pushing to the latest node, but that’s not the whole story.
Tomi Engdahl says:
EDA Cloud Adoption Hits Speed Bumps
https://semiengineering.com/cloud-adoption-hits-speed-bumps/
What problems are prohibiting semiconductor design moving into the Cloud? Steps are being taken to overcome them.
Tomi Engdahl says:
Micron opens DRAM backend fab in Taiwan
https://www.digitimes.com/news/a20181029PD214.html
Tomi Engdahl says:
Bust Looms Over $60 Billion Splurge by Korean Chip Giants
https://www.bloomberg.com/news/articles/2018-10-29/bust-looms-over-60-billion-chip-splurge-by-samsung-sk-hynix
South Korean producers investing in plants, memory capacity
Companies counting on new demand from AI, Internet of Things
Samsung Electronics Co. and SK Hynix Inc., the biggest makers of the memory chips used in mobile devices, have announced about $60 billion of investments in facilities that each year could pump out millions of silicon wafers — the building blocks of semiconductors.
Tomi Engdahl says:
Micron’s Chinese DRAM antagonist hit with US export boycott
Chip maker Fujian Jinhua labelled ‘national security’ risk
https://www.theregister.co.uk/2018/10/30/fujian_jinhua_dram_export_ban/
The US department of commerce has issued an edict that effectively bans American companies exporting technology to Chinese DRAM maker Fujian Jinhua Integrated Circuit Company.
The order was issued on Monday, US time.
The Chinese company was caught up in the legal battle between Micron and UMC.
Tomi Engdahl says:
Samsung Electronics Projected to Rise to No. 2 in Global Foundry Market This Year
http://www.businesskorea.co.kr/news/articleView.html?idxno=26125
Samsung Electronics is expected to secure the second place in the global foundry market this year with sales of more than $10 billion (about 11.4 trillion won). In a recent paid report, which was not disclosed to the public, market research firm IC Insights put Samsung Electronics after TSMC, a Taiwanese company that leads the market.
For Samsung, which sold memory semiconductors worth 74 trillion won (US$66 billion) last year, foundry has become one of the three main sources of income together with memory semiconductors and system LSI. Last year, the company’s foundry business posted sales of US$4.6 billion, ranking 4th in the industry with a market share of 6%.
Samsung’s market share is believed to have exceeded 14% this year, as the foundry division’s production of Exynos mobile processors for the smartphone division are counted as sales. Samsung Electronics separated the foundry business division from the system LSI division in May last year.
Tomi Engdahl says:
Intel to outsource entry-level processor, chipset production
https://www.digitimes.com/news/a20181030PD205.html
As its processor supply continues to fall short of demand, Intel reportedly has begun planning to outsource production for its entry-level Atom processors and some of its chipsets while keeping its high-margin Xeon and Core CPU production in-house, according to sources from the upstream supply chain.
Among the available foundry houses, Taiwan Semiconductor Manufacturing Company (TSMC) is the only one capable of handling such rush orders, the sources noted.
However, Intel declined to comment on “market rumors.”
Intel’s CPU shortages grew worse in the second half of 2018 and the problem has gradually expanded from the traditional PC market to the industrial PC sector with Intel’s high-end server CPUs also reportedly experiencing tight supply, the sources stated.
To ease the shortages, Intel earlier in October announced that it will invest an additional US$1 billion in 2018 expanding its 14nm manufacturing sites. The budget is expected to be spent mainly on the production of its Xeon and Core processors for servers and premium PCs with higher margins, the sources noted.
For demand from entry-level PCs and Internet of Things (IoT) devices, Intel is planning to outsource its entry-level Atom processors and 14nm chipsets to outside makers and expects the shortages to be resolved by the first quarter of 2019, the sources said.
Tomi Engdahl says:
Samsung slashes capex, calls end to chip boom after record third quarter
https://www.reuters.com/article/us-samsung-elec-results/samsung-electronics-posts-record-third-quarter-profit-but-warns-of-weaker-earnings-ahead-idUSKCN1N431G
SEOUL (Reuters) – Samsung Electronics Co Ltd slashed 2018 capex by more than a quarter on Wednesday and warned of lower profit until early next year, calling an end to a two-year boom in memory chips that fueled record third-quarter profit.
Tomi Engdahl says:
Ideal Diode Supports Battery Protection to 7 A
https://www.electronicdesign.com/automotive/ideal-diode-supports-battery-protection-7?sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=21119&utm_medium=email&elq2=1f189bc2f5fa4ef08a2f766337c585e8
By using an ideal diode IC in place of a simple Schottky diode, the voltage drop and dissipation of the Schottky can be almost entirely eliminated, allowing for higher currents and lower losses in battery protection and related applications.
Tomi Engdahl says:
Helium can Stop Your iPhone — Maybe Other MEMS, Too
https://hackaday.com/2018/10/31/helium-can-stop-your-iphone-maybe-other-mems-too/
The best theory — and it seems plausible to us — is that Apple stopped using quartz crystals for the phone’s internal clocks. Instead, they are using MEMS oscillators from a company called SiTime. Supposedly the MEMS oscillators are smaller and work better at temperature extremes. If the mechanical clock element got gummed up with helium, that would explain all the observed evidence.
[Erik Wooldrige] reading about the issue on Reddit, did an experiment where he subjected an iPhone to helium in a plastic bag.
It turns out if you read the iPhone user’s guide it reportedly says:
“Exposing iPhone to environments having high concentrations of industrial chemicals, including near evaporating liquified gasses such as helium, may damage or impair iPhone functionality. … If your device has been affected and shows signs of not powering on, the device can typically be recovered. Leave the unit unconnected from a charging cable and let it air out for approximately one week. The helium must fully dissipate from the device, and the device battery should fully discharge in the process. After a week, plug your device directly into a power adapter and let it charge for up to one hour. Then the device can be turned on again.”
Apparently, SiTime also is aware of this problem and says its newer devices are “impervious to all small-molecule gasses.” But they admit older parts were not immune.
Tomi Engdahl says:
US Accuses China, Taiwan Firms With Stealing Secrets From Chip Giant Micron
https://www.securityweek.com/us-accuses-china-taiwan-firms-stealing-secrets-chip-giant-micron
US Attorney General Jeff Sessions announced charges Thursday against Chinese and Taiwan companies for theft of an estimate $8.75 billion worth of trade secrets from US semiconductor giant Micron.
Sessions said the case was the latest in a series that are part of a state-backed program by Beijing to steal US industrial and commercial secrets.
“Taken together, these cases and many others like them paint a grim picture of a country bent on stealing its way up the ladder of economic development and doing so at American expense,” Session said.
“This behavior is illegal. It is wrong. It is a threat to our national security. And it must stop.”
Tomi Engdahl says:
Leading Edge Chip and Packaging Technology Propels TSMC
The Oct 12th issue of the McLean report, issued by IC Insights, reveals that the average revenue generated from processed wafers among the big four foundries (TSMC, GlobalFoundries, UMC, and SMIC) is $1,138 in 2018 (200mm-equivalent wafers), which is flat from $1,136 in 2017.
https://www.3dincites.com/2018/10/iftle-397-malicious-embedded-chips-and-tsmc-rides-the-leading-edge/
Tomi Engdahl says:
DARPA Seeks To Engage With MEMS Industry
Pentagon agency wants industry input on its RIPM program.
https://semiengineering.com/darpa-seeks-to-engage-with-mems-industry/
DARPA is looking for a few good members of the MEMS industry to offer advice and help to the agency’s Rapid Innovation for Production MEMS (RIPM) concept.
Tomi Engdahl says:
AI Begins To Reshape Chip Design
https://semiengineering.com/ai-begins-to-reshape-chip-design/
Technology adds more granularity, but starting point for design shifts as architectures cope with greater volumes of data.
Artificial intelligence is beginning to impact semiconductor design as architects begin leveraging its capabilities to improve performance and reduce power, setting the stage for a number of foundational shifts in how chips are developed, manufactured and updated in the future.
AI—and machine learning and deep learning subsets—can be used to greatly improve the functional control and power/performance of specific functions within chips. For those purposes it can be layered on top of existing devices, as well as incorporated into new designs, allowing it to be applied across a wide swath of functions or targeted at a very narrow one.
There are a number of benefits AI provides. Among them:
It adds increasing granularity for speeding up performance and reducing power by varying the accuracy of specific functions through sparser algorithms or data compression.
It provides the ability to process data as patterns rather than individual bits, effectively raising the abstraction level for computing and increasing the density of the software.
It allows processing and memory read/writes to be done as a matrix, greatly speeding up those operations.
But AI also requires a significant rethinking of how data moves—or doesn’t move—across a chip or between chips. Regardless of whether it is applied at the edge or in the data center, or whether it involves training or inferencing, the amount of data being processed and stored can be enormous.
Tomi Engdahl says:
Addressing the Twin Pains of the Modern Chip Engineer
https://www.eeweb.com/profile/romanyankevych/articles/addressing-the-twin-pains-of-the-modern-chip-engineer
The pressure to develop cutting-edge devices in line with end-user expectations is exacerbating two particular pain points that are increasingly making life harder for engineers
Looking at the IoT and smart device landscape today, you’d think that there is no better time to be a chip engineer than now. Devices are getting smaller, packing more functions into smaller form factors. From phones to wearables to smart sensors laced throughout your home, car, and workplace, 2018 just screams cutting-edge. Innovative. Futuristic.
That future, though, does not come easy. Just ask any modern chip engineer. In fact, the pressure to develop these cutting-edge, innovative devices in line with what their end users expect of them is exacerbating two particular pain points that are increasingly making life harder for engineers.
Those pains? Chip flexibility and the ever-shrinking size of the devices that house those chips.
Tomi Engdahl says:
https://hackaday.com/2018/10/23/sidney-darlington/
Tomi Engdahl says:
Brightening the future with invisible light ― Stanley continues to add new value with ultraviolet and infrared LEDs
https://www.eetimes.com/document.asp?doc_id=1333795
Invisible ultraviolet and infrared light holds great promise as a key to resolving many social and environmental problems. Stanley Electric is contributing to the expansion in applications of ultraviolet and infrared light LEDs. This article introduces Stanley’s high-power ultraviolet and infrared LEDs designed to take on challenges faced by cities and the natural environment.
Tomi Engdahl says:
Cracking ferrite cores
https://www.edn.com/electronics-blogs/living-analog/4461232/Cracking-ferrite-cores?utm_source=newsletter&utm_campaign=link&utm_medium=EDNFunFriday-20181102
If there is one thing I really dislike, it’s being told that some unacceptable product failure is somehow ‘par for the course.’ This guy was either pretending to be stupid, so he could simply slough off the issue thereby leaving us high and dry while not having to extend any effort to help us in any way, or his apparent stupidity might have been genuine. Of the two explanations, I tend to favor the former.
The RTV-11 potting material was exhibiting a thermal coefficient of expansion. When the material would swell, it would push against the ferrite that was being restrained by the mounting hardware and sometimes, the ferrite would crack. The remedy was to trim the RTV-11 back so that it would not impinge on the ferrite.
By allowing the RTV-11 some room to expand without impinging on the ferrite, core cracking was prevented. Also, while this was indeed a high voltage application, we were fortunate that the approximately 1.5 kV maximum winding voltage wasn’t high enough to make corona an issue in the air spaces.
Tomi Engdahl says:
Supercapacitors: Past, Present, and Future
https://www.powerelectronics.com/alternative-energy/supercapacitors-past-present-and-future?NL=ED-003&Issue=ED-003_20181101_ED-003_652&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=21161&utm_medium=email&elq2=724d01e0679246838b654e0c114e4a2f
Though the idea of supercapacitors has been around since the 19th century, current technologies are finally realizing the advanced energy storage that was always deemed possible.
Tomi Engdahl says:
Understanding Amplifier Operating “Classes”
Class A through H, what do they mean?
https://www.electronicdesign.com/analog/understanding-amplifier-operating-classes?PK=UM_Classics10218&utm_rid=CPG05000002750211&utm_campaign=20791&utm_medium=email&elq2=9678664977d1440d8a2e609b5164206f
Tomi Engdahl says:
Five Things Every Engineer Should Know About Bode Plots
https://www.powerelectronics.com/power-electronics-systems/five-things-every-engineer-should-know-about-bode-plots?PK=UM_Classics11118&utm_rid=CPG05000002750211&utm_campaign=21136&utm_medium=email&elq2=53ae13bd87974668aa571ac834884408
During the early 1980s, Dean Venable popularized the Bode plot with the introduction of a low-cost frequency response analyzer (‘FRA’) that allowed power engineers to directly measure the phase margin using Bode plots. Since then, most power supply engineers have relied on the Bode plot for the assessment of stability.
Tomi Engdahl says:
Large-size silicon wafer supply to stay tight through 2020, says GlobalWafers chairperson
https://www.digitimes.com/news/a20181101PD209.html
Tight supply of 8-inch and 12-inch silicon wafers will persist into 2020 thanks to strong market demand despite the US-China trade conflicts, but customers have shown mixed demand for 6-inch and smaller wafers in recent two months
demand for 8-inch and 12-inch wafers has been quite strong
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8669-viime-vuoden-puolijohde-ennatys-menee-komeasti-rikki
Tomi Engdahl says:
http://www.etn.fi/index.php/13-news/8667-silkista-voi-valmistaa-nanoputkia-elektroniikkaan
Tomi Engdahl says:
Panel Fan-out Ramps, Challenges Remain
https://semiengineering.com/panel-fan-out-ramps-challenges-remain/
Cost and the lack of a panel-size standard gives fan-out a slower start.
After years of R&D, panel-level fan-out packaging is finally beginning to ramp up in the market, at least in limited volumes for a few vendors.
However, panel-level fan-out, which is an advanced form of today’s fan-out packaging, still faces several technical and cost challenges to bring this technology into the mainstream or high-volume manufacturing. Moreover, several companies are developing the technology using different panel sizes, but there is a need for a standard format. The lack of a panel-size standard makes it difficult for equipment makers to commit resources and develop systems for panel fan-out.