jtag: analog/mixed signal ics

[sharanbr]

Hi,

I was looking at few datasheets for analog ICs. I see that quite a few of them do not provide Jtag pins. Is there a reason for this?
After all, most of these ICs do sit on board and interface with a lot of other ICs. So how is board connectivity test done?

Regards,

[Tomi Engdahl]

Joint Test Action Group (JTAG) is the common name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary-Scan Architecture for test access ports used for testing printed circuit boards using boundary scan. JTAG is often used as an IC debug or probing port.

Devices communicate to the world via a set of input and output pins. By themselves, these pins provide limited visibility into the workings of the device. However, devices that support boundary scan contain a shift-register cell for each signal pin of the device. These registers are connected in a dedicated path around the device's boundary (hence the name). The path creates a virtual access capability that circumvents the normal inputs and provides direct control of the device and detailed visibility at its outputs.

During testing, I/O signals enter and leave the chip through the boundary-scan cells. The boundary-scan cells can be configured to support external testing for interconnection between chips or internal testing for logic within the chip.

To provide the boundary scan capability, IC vendors add additional logic to each of their devices, including scan registers for each of the signal pins, a dedicated scan path connecting these registers, four or five additional pins, and control circuitry. The overhead for this additional logic is minimal and generally well worth the price to have efficient testing at the board level.

Information source: http://en.wikipedia.org/wiki/Joint_Test_Action_Group


As you can see from this, the JTAG system is specifically designed only for digital ICs in mind.
I don't see how it would coviently fit to the analogue ICs.
And if it would fit to them somehow, then the overhead of adding JTAG to analogue IC design would be very much higher than addding it to digital IC. That's probably the reasons why you don't see JTAG interfaces on analogue ICs.

[sharanbr]

Hi Tomi,

One of the primary motivation for Jtag was (and it still probably is) to enable board connectivity testing.
The other areas for which the JTAG is used came up only later as by products.
So whether the ASIC is digital or not, if it does not have support Jtag support then the issues that were
present pre-Jtag era would still be present. But I do understand that having a digital logic in a pure
analog IC might be challenging, though I am not an expert in this area.

Regards