| Name: | TimingTool |
| Description: | TimingTool is a free to use timing diagram editor that is built around the Si2 TDML standard. VHDL or Verilog can be automatically generated from saved TDML. |
| Type: | 0 |
| OS: | |
| Distribution: | Freeware |
| Download: | http://www.timingtool.com |
| Documentation: |