The Internet of Everything is coming. The Internet is expanding into enterprise assets and consumer items such as cars and televisions. Very many electronics devices needs to be designed for this in mind. The Internet of Things (IoT) will evolve into the Web of Things, increasing the coordination between things in the real world and their counterparts on the Web. Gartner suggests that the “the smart machine era will be the most disruptive in the history of IT.” Intelligent systems and assistive devices will advance smart healthcare.
Software-defined anything (SDx) is coming more into use. It means that many proprietary systems are being replaced with commonly available standard computer hardware and software running in them.
PC market: ABANDON HOPE all ye who enter here. Vendor consolidation ‘inevitable’. Even Intel had to finally admit this that the Wintel grip which has served it and Microsoft so well over the past decades is waning, with Android and iOS coming to the fore through smartphones and tabs. The market conversion to tablets means that consumers and businesses are sweating existing PC assets longer. Tablets to Make Up Half of 2014 PC Market.
The Rise, Fall, and Rise of Electronics Kits article mentions that many older engineers first became interested in electronics through hobbies in their youth—assembling kits, participating in amateur radio, or engaging in other experiments. The 1970s and 1980s were great times for electronics hobbyists. But whenever it seems that there’s nothing left for the hobbyist, a new motif arises. The Raspberry Pi has become a best seller, as has a similar experimental board, the Arduino microcontroller. A great number of sensors, actuators, cameras, and the like have quickly become available for both. Innovative applications abound in such domains as home automation and robotics. So it seems that now there is much greater capacity for creativity in hobby electronics then there ever was.
E-Waste: Lack of Info Plagues Efforts to Reduce E-Waste article tells that creation of trade codes is necessary to track used electronics products according to a recent study concerning the waste from growing quantities of used electronics devices—including TVs, mobile phones and computers. High levels of electronic waste are being sent to Africa and Asia under false pretenses.” StEP estimates worldwide e-waste to increase by 33 percent from 50 million tons in 2012 to 65 million tons by 2017. China and the U.S. lead the world as top producers of e-waste. America produces about 65 pounds of e-waste per person every year. There will be aims to reduce the waste, for example project like standardizing mobile phone chargers and laptop power supplies.
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Tomi Engdahl says:
Hot DRAM! Samsung splurges $15 BILLION on Korean chip fab
Could be logic, could be memory
http://www.theregister.co.uk/2014/10/06/sammy_splurging_on_semiconductor_fab/
Samsung Electronics has decided to spend a massive $15bn building a memory fab in South Korea.
Samsung is the world’s largest DRAM chip maker, followed by Micron and SK Hynix. It also leads the NAND chip market, being ahead of Toshiba, SanDisk, Micron and SK Hynix. Toshiba and SanDisk are partners in flash fabrication.
The new plant will be in Pyeongtaek, some 50 miles south of Seoul, and could create up to 150,000 jobs. The plant’s output could be either logic (processor) or memory chips.
Tomi Engdahl says:
Power supplies combine linear and switching
http://edn.com/electronics-products/electronic-product-reviews/other/4435469/Power-supplies-combine-linear-and-switching?_mc=NL_EDN_EDT_EDN_productsandtools_20141006&cid=NL_EDN_EDT_EDN_productsandtools_20141006&elq=cb365fa4e2e24d1d956d335e550a944c&elqCampaignId=19517
Picotest’s P9610A and P9611A power supplies use a combination of switching and linear regulation to deliver 108 W (36V, 7A) and 150 W (60 V, 6 A), respectively.
Both models can withstand continuous short circuits on their outputs plus repetitive shorts at up to 13 times per second. Overvoltage, overcurrent, and over-temperature detection protect both the power supply and the device under test.
Tomi Engdahl says:
MAX10 broadens the FPGA field
http://edn.com/electronics-products/electronic-product-reviews/other/4435186/MAX10-broadens-the-FPGA-field?_mc=NL_EDN_EDT_EDN_productsandtools_20141006&cid=NL_EDN_EDT_EDN_productsandtools_20141006&elq=cb365fa4e2e24d1d956d335e550a944c&elqCampaignId=19517
Altera’s MAX series used to be branded as CPLDs, even though – except for the original MAX3000 series – they have always used an FPGA fabric internally. With the advent of larger and more capable devices in the MAX10 family, the series is now being marketed as FPGAs. And as you’ll see, FPGAs with some unique differentiators.
The MAX series is considered to be flash-based, though the exact definition of this has changed.
A unique attribute of MAX10 is the inclusion of two flash configurators on-chip. Altera’s main goal here is to support failsafe remote configuration updates, but presumably, enterprising users could find other uses, like instantly changing the behaviour of the chip.
Another feature making this series unique is the inclusion of up to two 12-bit 1MSa/s ADCs (including mux, S/H, and a temperature sensor). Despite being Altera’s entry-level FPGA, MAX10 sports big-boy features, like block RAM, user flash (a rarity in FPGAs), multipliers, PLLs, and support for DRAM up to DDR3. Other interesting features include an on-chip linear voltage regulator, and an RC oscillator that will save you the cost and space of an external part if you can live with the lower accuracy.
Device sizes will range from a utilitarian 2kLE to a substantial 50kLE, with 8kLE being the first size available – today. Performance is similar to the Cyclone IV series, meaning a NiosII 32-bit processor can run at 100MHz.
Tomi Engdahl says:
Power management for wearables: Designer options
http://edn.com/electronics-products/electronic-product-reviews/other/4435272/Power-management-for-wearables–Designer-options?_mc=NL_EDN_EDT_EDN_today_20141006&cid=NL_EDN_EDT_EDN_today_20141006&elq=706eaac162f442e890bede1eb5b3591c&elqCampaignId=19513
A circuit or system designer’s job is a difficult one. Fraught with design compromises to be made and challenges to overcome that are sometimes seemingly insurmountable. That’s why our personalities are programmed to solve problems and “Think outside the box”. The best designers don’t even know there is a box!
The wearables sector of our industry is growing wildly and designers need small, low-power/efficient and flexible functional solutions with which to craft their architectures.
Let’s take a look at some really useful and diversified solutions that offer low power and flexible choices for designers in the very challenging wearables arena.
DC/DC power conversion solutions in this market need to extend the battery as long as possible.
Finally, for designers who prefer wireless power charging for their design, we have an efficient Qi compliant wireless power receiver—the bq51003. This product is especially for portable designs, hand-held, battery operated. It pairs up with the bq51003 transmitter controller.
Tomi Engdahl says:
Design and Fabrication of a Radio Frequency Grin Lens Using 3D Printing
http://www.aerodefensetech.com/component/content/article/923-adt/tech-briefs/manufacturing-and-prototyping/19763
Microwave lenses are used in a variety of applications such as electromagnetic wave collection and imaging.
Engineered electromagnetic materials and meta-materials have been researched to explore devices that enable access to electromagnetic properties that are not available in nature. This new class of devices can not only open the door to new functionality, but also be effectively utilized to improve the overall performance of existing systems with respect to electromagnetic performance, cost, size, weight, and repeatability.
This work focuses on the design, fabrication, and characterization of a 3D meta-material implementation of a focusing GRadient INdex (GRIN) lens with an operational frequency of 12 GHz that is capable of focusing a uniform plane wave to a point outside the lens
In the microwave bands, GRIN lenses are often made of polystyrene. Currently, focusing lenses with homogenous refractive index are curved. Their size and weight can make them prohibitive in applications such as airborne systems where these constraints are crucial to efficient operation. These issues can be addressed by designing a lens based on meta-material structures and manufactured with 3D printing. The GRIN lens operates at radio frequency (RF) frequencies, and is not polarization constrained.
Microwave lenses such as GRIN lenses are used in a variety of applications such as electromagnetic wave collection and imaging. These lenses are major contributors to system size, weight, and cost, which forces tradeoffs between system parameters such as focal length, field of view, resolution, bandwidth, reflectivity, and range.
The 3D printing approach was chosen to show how such methods can be used to efficiently and accurately fabricate such devices and electromagnetic materials. This allows for building truly 3D electromagnetic structures, as opposed to stacked layer approaches.
Tomi Engdahl says:
TSMC Overtakes Samsung in FinFET
Despite rivalry, both lag behind Intel
http://www.eetimes.com/document.asp?doc_id=1324211&
TSMC, which has more than half the global foundry business, has overtaken Samsung in the FinFET race to commercial production that the South Korean company was leading this year, according to industry analysts. Both companies lag Intel, which is making FinFET chips internally.
“Recent developments suggest TSMC has taken the lead over Samsung at developing [16/14nm] FinFET manufacturing technology,” Mehdi Hosseini, a San Francisco analyst who covers TSMC and Samsung for Susquehanna Financial analyst, said in an Oct. 1 report.
Checks with industry experts suggest Samsung’s foundry has experienced a setback with its 14nm FinFET project, while TSMC’s 16nm pilot line is gaining incremental confidence among prospective customers,
Tomi Engdahl says:
Building New Microarchitecture for Microcontrollers
http://www.eetimes.com/author.asp?section_id=93&doc_id=1324210&
It’s not too often there’s a completely new microarchitecture for an embedded controller, so the launch of the Cortex-M7 is particularly interesting. This has been designed from the ground up, rather than extending previous architectures from the M3 to the M4, for the Internet of Things and other applications.
“It’s a clean sheet and so it doesn’t look like anything we have built before,”
All of this is aimed at applications that need both higher CPU performance and higher DSP performance, such as high quality audio, speech recognition and connectivity, putting more channels of sound in a TV sound bar, or more motors on a quad copter.
For the first time there is also early silicon available. ST Microelectronics’ F7 family shows that the higher performance hasn’t hit the power budget — the run mode and low-power modes (STOP, STANDBY, and VBAT) consume current at the same low levels as the STM32 F4 with 7 CoreMarks/mW in Run mode from the DSP enhancements available in the architecture. The low-power modes go down to 120 uA typical in STOP mode with all context and SRAM content saved, 1.7uA typical in STANDBY mode, and 0.1uA typical in VBAT mode. This compares to the predicted base throughput of 5 CoreMarks/MHz, or 2,000 CoreMarks at 400 MHz in a 40nm LP process, rising to 4,000 CoreMarks in a 28nm process.
Tomi Engdahl says:
Cx: A New Language for Hardware Design & Verification
http://www.eetimes.com/author.asp?section_id=36&doc_id=1324212&
Why is a new language necessary? Because most hardware designers are still stuck with RTL, and because today’s High-Level Synthesis (HLS) does not live up to its promises.
Register Transfer Level (RTL) is pretty self-explanatory — you think in terms of registers and how data flows from one register to the next. This closely matches what happens physically, which is another way of saying that it is a very thin layer of abstraction. In turn, this means that you spend a lot of time dealing with implementation-level details that would not concern you if you were working at a higher level of abstraction.
VHDL and Verilog are the two main historical languages for describing RTL designs. Both date back to the 1980s and — in the grand scheme of things — have seen little evolution since then. Recent efforts to improve on these two relics include open-source initiatives like MyHDL (RTL in Python) and Chisel (RTL in Scala). MyHDL is led by Jan Decaluwe, while Chisel was created at UC Berkeley with the goal of facilitating processor design.
At the other end of the spectrum, we have HLS. We can think of today’s HLS as your manager’s solution. It was sold to her or him (at a premium) as a way to increase productivity and obtain the same performance as RTL. The problem is that this is not what engineers see in practice. Outside of HLS’s comfort zone (regular loop-and-array DSP code), you need to be a seasoned hardware designer to succeed in obtaining a good implementation.
The promise of HLS is that you describe your system using a software language, and you get good hardware. The reality is that you write this software representation either using a hardware-oriented framework or with hardware-specific pragmas, directives, types, and other tricks, in which case it’s no longer software. All of this leads us to the question: “Why use software languages at all?”
Cx (formerly C~) is a new language for hardware design and verification.
Cx is close enough to C in terms of syntax that it is easy to learn, and anyone with notions of the C-like “curly” syntax should be able to read and understand Cx code. This is a huge advantage over alternatives like SystemC that look nothing like normal code, which may explain why typical engineers need months of training before they can write good SystemC designs.
But it’s more than syntax — Cx is at an intermediate level of abstraction between RTL and HLS. By being higher-level than RTL, Cx makes it easier to go from specification to implementation in hardware. At the same time, it allows designers to retain enough control to create efficient designs.
Because Cx is a standalone language, rather than a subset or an extension of C/C++, the designer does not have to deal with things that do not make much sense in hardware, like pointers to access data or memory allocation. It also comes with good defaults
Tomi Engdahl says:
Isolated Digital Input Translator/Serializer
http://www.eeweb.com/company-blog/maxim/isolated-digital-input-translatorserializer/
The Corona (MAXREFDES12#) is a translator/serializer that provides the front-end interface circuit of a programmable logic controller (PLC) digital input module. It helps reduce the number of optocouplers needed for isolation. This reference design is a great addition for designers on the fields of automation.
In industrial control, industrial automation, motor control, and process automation applications, binary/digital sensors and switches are frequently required. Systems often need many optocouplers for isolating each sensor channel.
The MAX31911 (U1) industrial interface serializer translates, conditions, and serializes the 24V digital output of sensors and switches used in industrial, process, and building automation to CMOS-compatible signals required by microcontrollers. It provides the front-end interface circuit of a PLC digital input module. The device features integrated current limiting, lowpass filtering, and channel serialization. Input current limiting allows a significant reduction in power consumed from the field voltage supply as compared to traditional discrete resistor-divider implementations. Selectable on-chip lowpass filters allow flexible debouncing and filtering of sensor outputs based on the application. On-chip serialization allows a large reduction in the number of optocouplers used for isolation.
Tomi Engdahl says:
Mixed Signal MCUs with Bluetooth
http://www.eeweb.com/company-news/mouser/mixed-signal-mcus-with-bluetooth/
Mouser Electronics, announced the availability of the Mixed Signal Microcontrollers featuring ultra low-power consumption and low supply voltage. It is designed for use with CC2560 TI Bluetooth Based Solutions with a flexible power management and unified clock system.
This low power 25MHz microcontroller has a high performance 12‑bit analog to digital converter (ADC) and is designed to be used with the TI CC256x Bluetooth® 4.0 Controller. A
Tomi Engdahl says:
Radial-Leaded Device on Video Ports
http://www.eeweb.com/company-news/te_circuit_protection/radial-leaded-device-on-video-ports/
TE Circuit Protection introduces the RUEF series of radial-leaded polyswitch devices. It has a maximum interrupt voltage of 30 V, maximum interrupt current of 100 A, and resistance range of 0.07 Ω to 0.100 Ω. It is commonly used as a circuit protection on most Video Ports.
Tomi Engdahl says:
Chip Makers Face Scaling Hurdles
http://www.eetimes.com/author.asp?section_id=36&doc_id=1324214&
The 2014 SPIE/BACUS photomask symposium in September reinforced the importance of industry collaboration to enable cost-effective high-volume manufacturing solutions to overcome technical and business challenges in advanced design node patterning technologies.
At this year’s SPIE Advanced Lithography conference, Jack Chen, the manager of TSMC’s next-generation lithography department, discussed the slow progress on source power improvement for a newly installed EUV scanner. This generated increased attention on directed self-assembly and alternative patterning technologies.
As design nodes shrink even further, mask design complexity increases using low-K, 193nm lithography.
Tomi Engdahl says:
Cortus to Target Security to Win 32-Bit Processor Race
The company competes with ARM in deeply embedded market
http://www.eetimes.com/document.asp?doc_id=1324215&
In a microprocessor and microcontroller IP core market that is dominated by ARM’s massive IP portfolio, the relevance — even survival — of a competing 32-bit processor IP company is no cakewalk.
Cortus, a 32-bit microprocessor IP vendor based in Montpelier, France, has successfully battled ARM Cortex M0 in the deeply embedded market for nine years. Moreover, Cortus believes its “minimalist” approach is the key to a strong foothold in the emerging market of connected devices.
On Tuesday, Cortus is rolling out a new family of products based on its second-generation (v2) instruction set. The company says its increased code density will meet the power and size requirements of new connected devices.
Tomi Engdahl says:
Sharp Developing LCD Screens In Almost Any Shape
http://hardware.slashdot.org/story/14/10/07/2153205/sharp-developing-lcd-screens-in-almost-any-shape
Traditional LCD panels are rectangular because the tiny chips that drive each pixel of the display are fitted along the edge of the glass panel on which the screen is made. But in a new breed of screens from Sharp, the chips are embedded between the pixels so that means a lot more freedom in screen shape
Sharp’s new LCDs can be almost any shape, could be in your next car
The company is targeting use in car dashboards and instrument consoles
http://www.itworld.com/hardware/440505/sharps-new-lcds-can-be-almost-any-shape-could-be-your-next-car
Tomi Engdahl says:
he new iPhone 6 -kännykän A8 processor is manufactured in 20-nanometer process. Even years after the is seen as the first 10-nanometer mobile chips.
The companies have entered into a new multi-year agreement, which will ARM’s mobile phone circuits A-architecture adapted to TSMC’s future 10 nnaometrin finfet process. This is no surprise, as the ARM + TSMC is the current cell phone circuits de facto standard.
What is new is the rapid development schedule. The companies now believe that one of the first functional 10-nanometer ARM chips could get out of the lines as early as next year in the fourth quarter.
Currently, some customers are already receiving the first test circuits which are made of 16nanometer-finfet transistors. ARM, the chips are A53- the Cortex-A57 and Cortex-type.
Source: http://etn.fi/index.php?option=com_content&view=article&id=1876:kannykkapiirit-10-nanometriin&catid=13&Itemid=101
Tomi Engdahl says:
Peregrine Semiconductor has presented the first one-chip switch circuit that operates the DC region. True DC switch operates 0-8000 MHz range.
Peregrine that it is the first single-chip switch circuit at such low frequencies. The company’s own UltraCMOS technology-based chip needed for extreme precision in all areas, such as for example measurement, and testing.
The switch circuit to maintain linearity throughout its territory up to eight gigahertz. S is capable of switching of direct and alternating current peaks +10 to -10 volts at 80 milliamps scale up.
Peregrine novelty manages to shorten the switching time of 10 microseconds.
Source: http://etn.fi/index.php?option=com_content&view=article&id=1884:ensimmainen-kytkinpiiri-dc-alueelle&catid=13&Itemid=101
Tomi Engdahl says:
Sharp Developing LCD Screens In Almost Any Shape
http://hardware.slashdot.org/story/14/10/07/2153205/sharp-developing-lcd-screens-in-almost-any-shape
Sharp’s new LCDs can be almost any shape, could be in your next car
The company is targeting use in car dashboards and instrument consoles
http://www.itworld.com/hardware/440505/sharps-new-lcds-can-be-almost-any-shape-could-be-your-next-car
Conventional LCD panels are rectangular — something that’s required because the tiny chips that drive each pixel of the display are fitted along the edge of the glass panel on which the screen is made. In Sharp’s new screens, the chips are embedded between the pixels so that means a lot more freedom in screen shape.
There’s still a requirement for a single straight edge but the rest of the screen can be cut with, say, curved sides so the display completely fills the dashboard area in front of the driver.
Sharp is showing off several prototype displays at this week’s Ceatec expo in Japan.
Another advantage of the technology is that because the driver chips are embedded alongside the pixels, the space between the edge of the screen and the edge of the glass is very thin, allowing the screen image to go almost right up to the edge.
Sharp, which is a major manufacturer of liquid crystal displays, said the technology is ready for mass production — it’s just waiting for orders from car makers.
The automotive industry has been a major focus for electronics companies in the last few years as cars become more high-tech. It’s not just the growing use of flat panel displays instead of conventional instrument displays but innovations like all-round view cameras, Internet-connected navigation services and advanced safety systems.
Tomi Engdahl says:
Failure modes of wearable electronics
http://www.edn.com/design/consumer/4435684/Failure-modes-of-wearable-electronics?elq=053339b449e844418cbabab7d1879ccf&elqCampaignId=19570
The wearables market is perhaps $3 billion to $5 billion today, rising to perhaps $30 billion to $50 billion over the next three to five years, the analysts forecast, adding that there may be upward of 15% of smartphone owners who end up buying a wearable.
The question is will the wearable electronics be reliable? Reliability is defined as the measure of a product’s ability to perform its specified function, in the customer’s use environment, over the required or desired lifetime. From this perspective we need to think about what the product is supposed to do, where is it going to be used, and how long should it last?
Wearable electronics falls into the categorization of “Next Generation Technologies.” DfR defines these technologies as those the supply chain or the user will implement because they are cheaper, faster, stronger, etc.
One of the most common drivers for failure is inappropriate adoption of new technologies. As most of us have little or no influence over the packaging technologies chosen for implementation we need to be aware of the pitfalls and what actions need to be taken to assure that the new technologies are reliable. As typically occurs with new markets of electronics, there are several issues that need to be addressed from a reliability perspective to assure these new applications are safe and reliable.
Market studies and mobile phone markets can skew the reality of market adoption as annual sales of >100 million may be due to one or two customers. As such, mobile phone requirements may not match the needs of wearable electronics.
A good example of this issue is the 0201-size ceramic capacitor. Initially, “the smaller the better,” was the mantra for electronics
Attempts to integrate 0201 capacitor technology into more demanding applications, such as medical implants, resulted in quality issues, unexpected degradation, and major warranty returns.
Similarly, the durability of the wearable products must be examined. The compact fluorescent lamp (CFL) is a perfect example of what can happen if durability becomes an issue.
Two different studies (1, 2) indicated that the failure rate for CFLs was between 2% and 13%, with returns from thermally challenging environments being higher. The consumer was impacted by the failure levels and moved over to LED lighting which is even newer.
Tomi Engdahl says:
Faster integration verification for test vehicles using formal techniques
http://www.edn.com/design/integrated-circuit-design/4435372/Faster-integration-verification-for-test-vehicles-using-formal-techniques?elq=053339b449e844418cbabab7d1879ccf&elqCampaignId=19570
Formal verification is widely used in SoC design for pin muxing verification, as it reduces the effort to make directed test cases for individual muxing. In this paper, we extend the concept to interconnect verification for a test vehicle.
Tomi Engdahl says:
Ultrasonic flow meter runs for 20 years on a single battery
http://edn.com/design/design-tools/reference-designs/4435703/Ultrasonic-flow-meter-runs-for-20-years-on-a-single-battery
With the MAXREFDES70# reference design from Maxim Integrated Products, utility engineers can create a customized ultrasonic flow meter that not only improves water- and heat-metering accuracy by an order of magnitude, but also operates for up to 20 years on a single A-size battery.
At the heart of the design is the MAX35101, a time-to-digital converter with an integrated analog front-end that performs time-of-flight difference measurements on upstream and downstream ultrasonic pulses.
Tomi Engdahl says:
Is FPGA power design ready for concurrent engineering?
http://edn.com/design/integrated-circuit-design/4435122/Is-FPGA-power-design-ready-for-concurrent-engineering-
When designers address the power requirements and constraints for an FPGA-based design earlier in the development process, it can yield significant competitive advantage in the final implementation of the system. However, based on the repetitive invocation of this self-evident statement throughout the technical literature, is there something in today’s FPGA-based system that is making it impractical or too difficult to fully follow this advice? Despite ready access to a variety of development tools such as early power estimators and power analyzers specifically targeting FPGA-based projects, it is beneficial for power designers to consider a worst-case, rather than an optimal-case, power system early in the design process because there is still too much uncertainty in how the dynamic load requirements will fluctuate between a static, low current condition to a full processing state until the hardware design is completed and power can be measured.
Tomi Engdahl says:
The five instrument standards that rule our industry
http://edn.com/electronics-blogs/test-cafe/4435696/The-five-instrument-standards-that-rule-our-industry
If you are integrating a test system, you will need to communicate between the test system controller and the instruments. The days where GP-IB was the default choice are long gone, and five new standards now reign.
LAN, based on the LXI protocols
PXI
VXI
AXIe
software drivers managed by the IVI Foundation
Tomi Engdahl says:
Concurrent Engineering
http://www.edn.com/design/integrated-circuit-design/4435122/3/Is-FPGA-power-design-ready-for-concurrent-engineering-
A description of concurrent engineering appeared in a 1988 report from the Institute for Defense Analysis saying that it is a systematic approach to the integrated, concurrent design of products and their related processes, including manufacture and support. This approach is intended to cause the developers, from the outset, to consider all elements of the product life cycle from conception through disposal, including quality, cost, schedule, and user requirements (Reference 1). Concurrent engineering is similar to and overlaps with other terms such as collaborative engineering, simultaneous engineering, and integrated product development.
For every project in history that involved two or more people working together, concurrent engineering in some form has been practiced, but modern concurrent engineering relies on information and communication technology to enable larger and multi-disciplinary development teams to work together and share new project information at a faster rate than ever before.
Aerospace projects were among the earliest groups to adopt modern concurrent engineering practices in an attempt to discover disconnects between the teams that were responsible for prototyping, manufacturing, and repairing the product. Many of the earliest discoveries of where disconnects of assumptions occur is between upstream and downstream activities during the design cycle.
In each of these cases, the extra effort to coordinate and communicate early and frequently with the other members of the system development team was offset by a larger benefit of discovering errors and disconnects in assumptions when they were much less expensive to negotiate and resolve.
Tomi Engdahl says:
AMD Falls 6%: Operating Chief Su Named CEO; OpCo Questions Timing
http://blogs.barrons.com/techtraderdaily/2014/10/08/amd-rising-names-operating-chief-lisa-su-ceo/
Shares of chip maker Advanced Micro Devices (AMD) are up two cents at $3.30, in late trading, after the company this afternoon announced it named chief operating officer Lisa Su as its CEO, replacing Rory Read, effective immediately.
Tomi Engdahl says:
As power electronic equipment switching frequencies continue to increase, conduction loss due to power device on-resistance (Ron) is no longer the principal factor determining overall efficiency. Instead, power device switching delays due to device capacitance and drive loss due to gate charging/discharging dominate overall circuit power loss
Unfortunately, measuring power semiconductor device capacitance (Ciss, Coss and Crss) and gate charge (Qg) at the thousands of volts that power devices experience in an actual circuit is not easy.
Source: http://link.pentonelec.com/YesConnect/HtmlMessagePreview?a=wCzZSeuPo35anYGrOyLjB5
Tomi Engdahl says:
Increasingly complex digital designs require a better collaboration and decision-making platform. A sustainable platform based solution must help managers track design progress and see problems early, as well as help engineers see the big picture and get their jobs done. Without both these capabilities, designs will have a higher risk and a difficult time meeting schedules
Source: http://www.techonline.com/electrical-engineers/education-training/webinars/4435371/Managing-the-Chaos-of-Design-Closure–How-to-regain-control-of-your-development-schedule
Choosing Remote-Collaboration Software
Hardware development requires more than general-purpose tools
http://spectrum.ieee.org/at-work/innovation/choosing-remotecollaboration-software
Hardware development, like many engineering projects, is typically a group effort, with contributors increasingly working from home or across multiple buildings, organizations, states, countries, and continents rather than face-to-face. And as a new wave of hardware start-ups are finding out, coordinating those contributors often requires more sophisticated tools than just e-mail and phone calls.
Many general-purpose remote-collaboration platforms are currently available and in use by engineers, such as Dropbox for file sharing, Basecamp for project management, Google Docs for collaborative document sharing and editing, and WebEx for screen sharing. But the nature of engineering often requires more specialized systems, such as the Git platform, which is designed for managing changes to source code and documentation.
Originally developed for managing the source code of Linux, Git has found broader use, often in conjunction with other tools.
But Git isn’t always well suited to hardware.
One company that’s trying to provide better support for distributed hardware tools for EEs is Altium.
“Hardware development follows specific rules and sequences to produce high-quality, stable products in the quantity you need,” agrees Lucas Wang, CEO of HWTrek, another company founded to develop software for hardware collaborators.
Part of the challenge is a lack of domain knowledge, adds Wang: “Large buyers like Dell and HP know how to work with larger manufacturers like Foxconn and have project managers to handle communication, scheduling, and following details. But many hardware developers today are small start-ups, working on smaller projects—and don’t have the in-depth knowledge of manufacturing, logistics, or other details involved in producing hardware.”
Tomi Engdahl says:
Chip Options Sought as Costs Rise
SOI gets upgrade amid consolidation
http://www.eetimes.com/document.asp?doc_id=1324225&
BURLINGAME, Calif. — Rising cost and complexity of making chips is fueling a record year for semiconductor mergers and a search for alternative technologies. Engineers heard about emerging options in silicon-on-insulator, sub-threshold voltage design, and monolithic 3D integration, as well as industry consolidation, at the IEEE S3S Conference
Chip companies executed 23 acquisition deals so far this year, more than the last two years combined, said Mark Edelstone, global head of investment banking in semiconductors for Morgan Stanley. Before the year is out, the total worth of M&A transactions will likely rise from $17.4 billion to nearly $30 billion, Edelstone predicted in a keynote talk here.
Chip companies executed 23 acquisition deals so far this year, more than the last two years combined, said Mark Edelstone, global head of investment banking in semiconductors for Morgan Stanley. Before the year is out, the total worth of M&A transactions will likely rise from $17.4 billion to nearly $30 billion, Edelstone predicted in a keynote talk here.
The low cost of capital is fueling M&A across all industries, and the rising cost and complexity of making chips is pouring gas on the fire in semiconductors. It could cost $53 million to make a 20 nm chip, up from $36 million for a 28 nm part, and cost will take another leap with the 16/14 nm node, Edelstone told the crowd.
The 14/16 nm FinFET node represents the mainstream path forward, but fully depleted and extremely thin SOI processes also have an opportunity, said Michael Mendicino, a product manager from GlobalFoundries.
Mendicino estimated the SOI alternatives might grab a 10 percent share of the foundry business over the next three years, but emphasized that was only a guess.
Tomi Engdahl says:
SOC Verification: Can We Stop the Stampede?
http://www.eetimes.com/author.asp?section_id=93&doc_id=1324247&
In the stories of the Wild West from the 1800s, the image of a cattle drive often is depicted. A small team of cowboys deliver thousands of heads of cattle to market. The cowboys spend many days crossing open land until they reach their destination — one with stock yards to accept their precious herd, and a rail station to deliver it quickly to market. Along the way there are dangers, including losses by predators and mad stampedes by cattle rushing blindly when frightened or disturbed. The primary job of the cowboys is to keep the herd on track and settled as they move to ship-out.
I see immediate parallels between the cowboys of the Wild West and today’s system-on-chip (SoC) design and verification engineers. Cowhands struggle to control and move a big herd. Similarly, today’s design teams grapple with how to keep a project on target and converging to tape-out, and successful when the gate count of SoCs has become so large it can stretch and even overwhelm their ability to stay on track. How big are these new SoCs?
With each smaller semiconductor node foundries provide, more gates can be squeezed into the same die size. In parallel, many different kinds of design blocks and intellectual property (IP) are employed, usually created by third-parties, to accelerate the implementation of the design objectives. The interaction of the various blocks across various power and timing conditions adds a new kind of complexity to the design. The result is a “herd” of interfaces with thousands of different crossings that must be checked and verified to ensure the design does not run off into a fatal operating condition.
Tomi Engdahl says:
The Solution to Your Analog Meter Woes
http://www.eetimes.com/author.asp?section_id=216&doc_id=1324246&
Finally I came across a meter repair place that said they would try to make them work again. I sent them off via priority mail and a few days later they came back as good as new (and more accurate than I could ever remember). Here is the name of the repair place […] Instrument Meter Specialties 339 E. Ave. K8 STE 105 Lancaster, CA 93535.
Well, I immediately bounced over to Instrument Meter Specialties’ website at Multimeter.com
It turns out that Jason and his colleagues are experts in anything and everything to do with both antique and modern meters. This includes repairing and restoring the little beauties. With regard to the antique models, having someone who can keep these little scamps up and running can be mission-critical for industrial and military facilities. And then there’s the Maker Movement, which is growing exponentially. I think that my Maker companions are going to be very interested to learn about the services offered by the guys and gals at Instrument Meter Specialties.
Tomi Engdahl says:
Panasonic’s tiny battery fits wearables
http://edn.com/electronics-products/other/4435863/Panasonic-s-tiny-battery-fits-wearables
Panasonic has developed a pin-shaped lithium-ion battery with a diameter of 3.5 mm and a weight of 0.6 g—about one-twentieth the size of an AAA battery—suitable for powering small devices, such as wearable electronics and hearing aids.
Panasonic’s CG-320 provides a nominal capacity of 13 mAh, a nominal voltage rating of 3.75 V
Tomi Engdahl says:
Understanding Polymer and Hybrid Capacitors
Advanced capacitors based on conductive polymers maximize performance and reliability
http://www.pidtechinsights.com/Capacitors/Capacitors_files/Panasonic_Capacitors_WP_final.pdf
Tomi Engdahl says:
Microchip Forecast Dip Triggers Debate
Has ‘another industry correction’ begun?
http://www.eetimes.com/document.asp?doc_id=1324265&
Microchip’s downward revision in its September quarter revenue forecast, issued last week, spooked flocks of investors, driving down stock prices, not only for Microchip, but also for Intel and Texas Instruments.
The announcement appears to have caught semiconductor industry analysts by surprise. In a microcontroller market where Microchip is strong, the market research firm IC Insights is forecasting a 5% increase in 2014 to about $16 billion after no change in 2013.
Tomi Engdahl says:
The Multibillion-Dollar Deals Reshaping Medtech
http://www.eetimes.com/document.asp?doc_id=1324263&
While big medtech merger deals in the past few years have been in the billions of dollars, there are a number of purchases in 2014 that have been industry-transforming mega deals in the tens of billions.
Some single out Obamacare in the United States as the main driver of this trend.
Medical device companies need to be larger to thrive.
It is interesting to note that the consolidation of the medical device industry under Obamacare has been mirrored by a wave of hospital mergers.
Tomi Engdahl says:
Hybrid Solar Cells Promise More Than 95% Efficiency
http://www.eetimes.com/document.asp?doc_id=1324264&
Researchers at the University of Cambridge Cavendish Laboratory say their new kind of hybrid solar cell could boost efficiency to 95% or more. The UK researchers are working on an organic formulation that can be layered on top of standard silicon solar cells to achieve its hard-to-believe goal of nearly 100% efficiency.
Today’s silicon solar cells have a theoretical maximum efficiency of 33.7%; the rest of the incident light is wasted by heating up the cell.
Tomi Engdahl says:
Intel Reports Better-Than-Expected Q3 Revenue Of $14.55B On Strength Of Recovering PC Market
http://techcrunch.com/2014/10/14/intel-reports-better-than-expected-q3-revenue-of-14-55b-on-strength-of-recovering-pc-market/
Tomi Engdahl says:
Qualcomm buys CSR for $2.5bn in bid to dominate the Internet of Things
Comes after British firm rejects Microchip takeover bid
http://www.theinquirer.net/inquirer/news/2375712/qualcomm-buys-csr-for-usd25bn-in-bid-to-dominate-the-internet-of-things
CHIP DESIGNER Qualcomm has acquired Cambridge-based chipmaker CSR for a cool $2.5bn (£1.6bn), as it looks to push further into the Internet of Things (IoT).
The buyout, which comes two months after CSR rejected a takeover bid from Microchip Technology, will see Qualcomm using the British company to push further into the IoT, automotive and mobile communications markets.
CSR’s board unanimously accepted Qualcomm’s offer
Steve Mollenkopf, Qualcomm CEO, added: “The addition of CSR’s technology leadership in Bluetooth, Bluetooth Smart1 and audio processing will strengthen Qualcomm’s position in providing critical solutions that drive the rapid growth of the Internet of Everything, including business areas such as portable audio, automotive and wearable devices.
Tomi Engdahl says:
Digitally controlled power supplies are to be standardized
As long as the power supplies were mainly analogue, their standardization was pretty straightforward. Mainly needed mechanical specifications for enclosures. When power supplies are imported digital intelligence, they become much more complex devices.
CUI, Ericsson Power Modules, and Murata intend to facilitate the design of power supplies by developing a digitally controlled power own configuration. To this end, they have formed a new AMP consortium (Architects of Modern Power).
AMP’s goal is to create an entire circuits, equipment, software and support ecosystem.
Source: http://etn.fi/index.php?option=com_content&view=article&id=1915:digitaalisesti-ohjatut-powerit-standardoidaan&catid=13&Itemid=101
Tomi Engdahl says:
Three digital power-houses create a new consortium
http://www.edn.com/electronics-blogs/powersource/4435980/Three-digital-power-houses-create-a-new-consortium-
The Architects of Modern Power (AMP) was created today on October 14 (This year is the 10th anniversary of the Distributed-power Open Standards Alliance or DOSA, a mechanical, footprint-compatible alliance). AMP takes this mechanical compatibility to a new level since Digital Power is in ever growing demand now and these systems need compatible software formats and configuration files for programming the modules at the manufacturing level.
Kudos to these companies for their cooperation to foster new sets of standards for digital Point-of-Load (POL) and advanced bus DC/DC converters plus a technology roadmap for 2015 and beyond to be out in front of the fast evolving market needs for next-gen equipment that will need distributed bus power systems. Working with Digital Controller partners, the AMP Group can influence that roadmap and insure alignment of the future market needs to create the most advance power supply modules.
Power-per-board was 300 W in the 1980s and is projected to climb to 3 kW by the end of 2015 and to 5 kW by 2020.
Efficiency is power management is no longer a nice feature to have but a critical feature to be met by all designers. Digital Power increases efficiency and reduces emissions and cost.
Customers have always demanded multi-sourcing of leading-edge power conversion products plus with digital power a level of software compatibility will be required in order to achieve a true multi-source solution, including compatibility of PMBus commands, proprietary controller commands, and configuration files. The AMP Group will address this challenge.
In summary, this consortium will provide:
Supply chain security
Customer choices
Cooperation to avoid re-inventing the wheel for new products
Accelerated innovation
Accelerated efficiency advancements.
For more information, visit http://www.ampgroup.com
Tomi Engdahl says:
Samsung Develops Flexible, Rollable Batteries For Wearables
http://www.gforgames.com/gadgets/samsung-develops-flexible-rollable-battery-45476/
During the ongoing InterBattery 2014 exhibition held in Korea, Seoul, Samsung SDI unveiled the next generation of flexible batteries which can actually be “rolled”. Using structural design and improved materials (the Indonesian media reports), Samsung SDI has created flexible batteries that can function even when rolled up in the shape of a paper cup.
It sounds impressive to say the least, but sadly the technology is not yet ready for the masses. Samsung SDI intends on improving the reliability of its flexible batteries in the coming years, and reports claim that the units will be commercially available within the next three years.
It’s also quite interesting to note that Samsung SDI also showcased a pin-type battery measuring only 20 x 3,6 mm, boasting a capacity of 10 mAh. The battery is roughly the size of the smallest pill capsule, and it has also been designed for future wearable devices.
Tomi Engdahl says:
Intel sold more than 100 million processors in one quarter
Intel did in the third quarter, several new records sales were $ 14.6 billion, or 8 percent a year ago more. Earnings increased by almost one-third of 4.5 billion dollars.
The company set a record for PCs, servers, tablets, phones, and the Internet of Things deliveries. Intel delivered the first time in more than 100 million microprocessor during the quarter.
The company’s only big problem is found in cell phone circuits: cell phone circuits still cause significant losses
Source: http://etn.fi/index.php?option=com_content&view=article&id=1920:intel-myi-yli-100-miljoonaa-prosessoria&catid=13&Itemid=101
Tomi Engdahl says:
Software bottlenecks necessitate innovative development tools
http://www.edn-europe.com/en/software-bottlenecks-necessitate-innovative-development-tools.html?cmp_id=7&news_id=10004914#.VD9o3hZsUik
As the complexity of modern embedded systems continues to rise at an almost exponential rate, the exacting demands placed onto engineering teams are piling up. More sophisticated memory systems with varying sizes and access latencies are now starting to be incorporated into designs. Multi-core processors are also becoming more commonplace. The question is – are developers adequately equipped to take on the challenges that lie ahead?
Producing a working software system within project timescales and budget constraints is of paramount importance. These aren’t the only challenges of course. Engineers also need to maximise the efficiency of their design to gain a competitive advantage. They must undertake optimisation in relation to a variety of key parameters, such as:
- Completeness and feature set of their design
- Hardware cost
- Code size
- Performance level
- Power budget
The way in which optimisations are applied is still relatively crude in comparison to the cutting-edge embedded systems being designed. Existing code generation tools make optimisations using processor-focused instructions, but these are, as a result, inadequate for anything but the most rudimentary of sequences. The numerous interactions between the processor/memory have the greatest influence over the performance of an embedded system, so these should be appropriately addressed. Traditional tools try to identify the most common control flows through a program then optimise for this dynamic behaviour at the expense of other, seemingly less important control flows.
In reality there is a considerable gap between hardware’s theoretical performance, and new hardware features such as high performance tightly-coupled memories, and what can be achieved with traditional software development tools. This is starting to cause major issues
Programmers should concentrate on optimising the overall algorithm and architecture of their software. The fundamental problem at the heart of the software development tools’ inadequacies is their inability to control low level hardware/software interactions and the requirement that there is still a “human in the loop” trying to optimise fundamental aspects of the software’s execution by altering the source code.
Such efforts to remove execution bottlenecks using current optimisation techniques are poorly coordinated and lead to new problems being created elsewhere. This is akin to “balloon squeezing” – rather than making the balloon smaller it just pushes air around and causes bulges elsewhere. Even seasoned engineers will struggle to coordinate their efforts under such circumstances.
It has become clear that the current approach taken is not capable of furnishing engineers with the level of functionality that they require. The tools available only encourage development and optimisation procedures which are both unpredictable and time consuming. Engineers desperately need development tools which are more sophisticated, supporting hardware/software interactions and whole-program optimisations which can’t be expressed in the source code, whilst also being much less labour intensive to use.
The items discussed in this article all point to a compelling need within the industry for a new breed of software development tools which are ‘device aware’ and where both the code generation and data sequencing processes are automated in their entirety. Through efficient and deterministic optimisation, as proposed here, engineers can make much better use of the hardware they have at their disposal – so they can achieve more with less.
Tomi Engdahl says:
Preparing PLC designs for the “Industry 4.0” future
http://www.edn-europe.com/en/preparing-plc-designs-for-the-industry-4.0-future.html?cmp_id=7&news_id=10004986&vID=44#.VD9tSBZsUik
Maxim Integrated has published a white paper which asserts, “We need to talk about the analogue aspects of your design,” – especially as it relates to programmable logic controllers (PLCs). To meet the ambitions of the “Internet of Things”, and “Industry 4.0”, designs need to physically shrink to enable sensing-everywhere and control-everywhere.
However, argues the Maxim paper, reality is not matching up to these goals; there is an “integration divide”. The company says its researches indicate that 30% of systems designers say their next design will be smaller; 50% of engineers say they look to digital circuitry to achieve space savings; however, 85% of PLC module board space is consumed by analogue circuitry and discrete devices.
“In today’s highly competitive global economy, small improvements in manufacturing processes can yield huge competitive advantages. This mindset is driving fundamental transformations across the factory floor.”
Manufacturers are deploying the latest sensor technologies, adopting new control architectures, and starting to discover the potential of “big data” and analytics. Often called Industry 4.0, what’s happening in manufacturing is nothing short of a revolution.
For equipment OEMs, this represents a massive opportunity. The number of sensors used to track environmental and process variables continues to increase. This is accelerating the transition to a distributed control architecture, as plant operators seek to reduce bottlenecks and shorten control loops by moving PLCs closer to the processes they control.
This poses a considerable challenge for PLC engineers. To win in this market, system designers will need to pack more I/O and more functionality into enclosures that keep getting smaller.
Tomi Engdahl says:
IC Industry Slowdown: True or False?
Is it ‘a cycle’ but not a correction?
http://www.eetimes.com/document.asp?doc_id=1324295&
Did Microchip Technology get ahead of itself last week by suggesting that its downward revenue forecast was a negative bellwether for the whole semiconductor market? Or is there a macro-economic weakness, foreshadowed by Microchip, that bodes ill for the chip industry?
Some in the industry are now describing signs of decline in the current quarter as “seasonal.” Others are calling it “a cycle” but not a correction.
Intel Corp. and Linear Technology both stressed during their earnings calls this week that they see nothing out of the ordinary that might signal an emerging industry correction predicted by Microchip CEO Steve Sanghi.
Tomi Engdahl says:
Fast Super-Junction MOSFETs: Driving and Layout
http://www.eeweb.com/company-blog/fairchild_semiconductor/fast-super-junction-mosfets-driving-and-layout/
Power MOSFET technology has been developed towards higher cell density for lower on-resistance. There are, however, silicon limits for significant reduction in the on- resistance with the conventional planar MOSFET technology because of its exponential increase in on- resistance according to the increase of blocking capability. One of efforts to overcome the silicon limit is super- junction technology in high-voltage power MOSFETs. The super-junction technology can dramatically reduce both on- resistance and parasitic capacitances, which usually are in trade-off.
The power losses of the switching device can be broken into four parts: conduction losses, switching losses, turn-off state losses due to leakage current, and driving losses. In most switching power applications utilizing high-voltage switching devices, the last two parts can be neglected.
Tomi Engdahl says:
What about Intel? That’s according to some calculations invested in a mobile 15-year period up to 20 billion dollars and makes this very moment billion in losses every quarter.
- Intel does not have the possibility to stay away from mobile. The market is going mobile, and have a choice, Hinckley says.
Source: http://etn.fi/index.php?option=com_content&view=article&id=1929:oulu-edelleen-mobiilitekniikan-keskus&catid=13&Itemid=101
Tomi Engdahl says:
Semiconductor industry capital spending to grow 11 percent in 2014
Up to $64.5bn in 2014 from $57.8bn in 2013, says Gartner
http://www.theinquirer.net/inquirer/news/2376137/semiconductor-industry-capital-spending-to-grow-11-percent-in-2014
PINSTRIPED INDUSTRY ANALYST OUTFIT Gartner forecasts that capital spending in the global semiconductor industry will increase by more than 11 percent in 2014.
The firm predicts that worldwide semiconductor capital spending will grow by 11.4 percent from $57.8bn in 2013 to $64.5bn this year.
In addition, capital equipment spending will increase 17.1 percent to $39.2bn in 2014 from $33.5bn in 2013, driven by higher demand for consumer devices and strong memory prices.
Wafer fab equipment spending is expected to increase 17.6 percent from $27.3bn in 2013 to $32.1bn in 2014, while wafer-level manufacturing equipment spending is expected to increase 17.5 percent from $28.8bn in 2013 to $33.8bn in 2014.
Tomi Engdahl says:
TSMC Capex to Exceed $10B in FinFET Ramp-Up
http://www.eetimes.com/document.asp?doc_id=1324299&
Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest chip foundry, said Thursday, Oct. 16, that it aims to increase its capital expenditures next year to more than US$10 billion as it accelerates its ramp-up to commercial production of 16 nm FinFET chips.
“Sixteen-nanometer has achieved the best technology and maturity compared to all TSMC’s previous nodes.”
TSMC’s 16 nm program “looks very smooth,” said Rick Hsu, an analyst with Nomura Securities, speaking after the earnings event. “It’s going to be about a quarter ahead of schedule.”
TSMC expects to have 60 tapeouts for 16 nm chips by the end of 2015, said Wei. “Strength in increasing market share will continue in 2015.”
Tomi Engdahl says:
AMD Plans 7% Layoffs
Revenues expected to fall 13% in Q4
http://www.eetimes.com/document.asp?doc_id=1324307&
Advanced Micro Devices will lay off 7 percent or about 700 of its 10,149 staff by the end of the year in a $70 million restructuring effort to save an estimated $94 million over the next 15 months.
The news comes as the company reported a third quarter in which it edged into the black with a $17 million profit on revenues that fell slightly to $1.49 billion. However, the company also reported it expects its fourth quarter revenues to fall 13%.
The layoffs will come mainly from the “go-to-market” part of AMD’s client computer and graphics division. It will not involve cutting any product lines.
Tomi Engdahl says:
Nanotube Field Emitters Beat OLEDs
http://www.eetimes.com/document.asp?doc_id=1324304&
A lighting panel powered by carbon nanotube field emitters stimulating a phosphor to glow will be less expensive than light-emitting diode (LED) lighting and brighter than organic light emitting diode (OLED) panels, according to Prof. Norihiro Shimoi, lead researcher at Tohoku University in Japan.
So far, Shimoi’s lab has demonstrated a prototype — similar in design to a flat version of the cathode ray tubes (CRTs) of old — that achieves the goal of low power but has yet to be optimized to reach 60 lumens per watt.
“This prototype is designed as a lighting (illumination) lamp with very low power consumption of 1/100 against LED devices, and it will not be released until 2019,” Shimoi told us.
As such, the prototype has already proven that it is possible to use very little power compared to LEDs, which are all the rage today because of their advantages over incandescent and fluorescent lighting. Unfortunately, for large-scale lighting, many LEDs have to be used together, whereas the nanotube design can be formed into panels of any size.
Tomi Engdahl says:
IBM, GF Strike Historic Fab Deal
IBM values total assets and cash at $4.7 billion
http://www.eetimes.com/document.asp?doc_id=1324321&
IBM struck a historic and much-anticipated deal to transfer its chip fabs to GlobalFoundries, but the complex deal has its share of regulatory twists that could take well into 2015 to conclude.
The deal is sweeter in several respects for GlobalFoundries than anticipated, but the foundry will have its hands full sorting out technical details of the implications for its roadmap.
The news came as IBM came under pressure from “disappointing” third quarter results. Revenues fell 4% from the same period last year, and IBM said it would not hit in 2015 a long held target of $20 in earnings per share.
Here’s a snapshot of the proposed deal:
IBM will take a $4.7 billion charge in its current quarter to represent the transfer of its fabs and about $1.3 billion in cash to GlobalFoundries.
The two primary fabs had losses of about $700 million in the past 12 months.
GF plans to make offers to employ virtually all the more than 5,000 IBM fab and ASIC design employees indentified in the sale.
GF also gets ownership of more than 10,000 IBM semiconductor patents
No layoffs or plant closures are anticipated by either company.
GF gets an exclusive 10-year deal to supply all IBM’s 22, 14, and 10 nm chips.
Overall, the deal could expand by more than 10 percent GlobalFoundries’ current capacity, to produce more than 2 million wafers a year.
“It would appear that IBM gave in on both the price as well as the IP in order to get rid of the operations,”