Electronics trends for 2015

Chip designs that enable everything from a 6 Gbit/s smartphone interface to the world’s smallest SRAM cell will be described at the International Solid State Circuits Conference (ISSCC) in February 2015. Intel will describe a Xeon processor packing 5.56 billion transistors, and AMD will disclose an integrated processor sporting a new x86 core, according to a just-released preview of the event. The annual ISSCC covers the waterfront of chip designs that enable faster speeds, longer battery life, more performance, more memory, and interesting new capabilities. There will be many presentations on first designs made in 16 and 14 nm FinFET processes at IBM, Samsung, and TSMC.

There is push to go to even smaller processes, and it seems that next generation of lithography equipment are started to being used. Earlier expectation was for chipmakers to use traditional immersion lithography for production of 10 nm chip, but it seems that extreme ultraviolet (EUV) scanners that allows allow scaling to 10 nm or even smaller is being used. TSMC to Use EUV for 7nm, Says ASML. Intel and TSMC have been injecting money in ASML to push process technology.

2015 promises to see initial FPGA product releases and (no doubt) a deluge of marketing claims and counter-claims. One thing is certain: 2015 will not be boring. There will be FPGA products that use processes beyond 20nm, for example Altera and  Xilinx have committed to use the TSMC 16nm FinFET technology. There is  publicized (and rumored) race to get to production at 14nm has seen time frames for initial samples move into 2015. However, with both FPGA companies reporting gross margins of close to 70 percent, it would be possible for either company to take an initial hit on margin to gain key socket wins.

It seems that the hardware becomes hot again as Wearables make hardware the new software. Apple invest its time when it released the Apple Watch last quarter, going up against the likes of Google’s Android Wear and others in the burgeoning wearables area of design. Once Apple’s bitten into a market, it’s somewhat a given that there’s good growth ahead and that the market is, indeed, stable enough. As we turn to 2015 and beyond  wearables becomes an explosive hardware design opportunity — one that is closely tied to both consumer and healthcare markets. It could pick up steam in the way software did during the smartphone app explosion.

There will be more start-up activity within hardware sector. For recent years, the software has been on the main focus on the start-ups, and the hardware sector activity has been lower. Hardware sector has seem some start-up activity with many easy to use open hardware platforms became available (make development of complex devices easier and reachable for smaller companies). The group financing (Kickstarter, Indiegogo, etc.) have made it possible to test of new hardware ideas are market-worthy and get finance to get them to production.

EEs embrace hackathons aand accelerators. Design 2.0 is bubbling up in the engineering community, injecting new energy into the profession. In many ways, it’s the new Moore’s Law. Easy to use open hardware development platforms have made it possible to design working hardware device prototypes within hackathons.

Silicon Startups Get Incubator article tells that there will be new IC start-up activity as semiconductor veterans announced plans for an incubator dedicated to helping chip startups design their first prototypes. Keysight, Synopsys, and TSMC have signed exclusive deals to provide tools and services to the incubator. Silicon Catalyst aims to select its first batch of about 10 chip startups before April.

1,206 Comments

1. June 1, 2015 at 10:16 am

   Tomi Engdahl says:

   Intel/Qualcomm: The Last Big Move
   http://www.eetimes.com/author.asp?section_id=36&doc_id=1326723&

   In the chip game, two big dominoes are waiting to fall.

   The glorious, storied semiconductor industry has many more moves to play. But for the foreseeable future yesterday’s news about the new Broadcom reminds us that everyone is playing one big game of consolidation.

   In that game there is one last really big move. A combination of Intel and Qualcomm could be the last of the big time mergers in semiconductors. There will no doubt be lots more combinations, but none as large or significant.

   The Intel/Qualcomm merger makes sense for a number of reasons. Intel owns computing from the data center down to the notebook but has been unable to establish a position in smartphones. Qualcomm owns the smartphone space but has no real prospects in today’s other huge growth market, cloud computing.

   The merged company would be a leader in computing from head to toe. Intel could scrap its loss-making efforts to drive the x86 into mobile and IoT and Qualcomm could end or at least scale back its efforts to design ARM-based server SoCs, which have a very small market for the foreseeable future.

   Reply
2. June 1, 2015 at 10:20 am

   Tomi Engdahl says:

   Micron Bullish On Coming Year
   http://www.eetimes.com/document.asp?doc_id=1326701&

   The president of Micron Technology is optimistic about the coming year for the company, which he said has diversified its market opportunities. “Our best times are in front of us.”

   Mark Adams said despite the difficulties in the PC DRAM market for the first half of 2015, Micron has a solid foundation in place to capitalize on its strengths and improve in other areas.

   “Overall the industry is doing well.”

   Adam acknowledged general market pressures, especially the weak PC market, but for Micron specifically, the company is seeing its products in more diverse markets, with mobile surpassing expectations, as well opportunities in the enterprise and automotive markets.

   Most people didn’t think mobile devices would need a gigabyte of DRAM, Adams noted, but now some devices boast three. Meanwhile, the NAND market has stabilized, and he said the PC DRAM market can’t be any worse in the remaining six months of the year than they were in the first.

   “We’re pretty bullish on NAND,” Adams said. “Mobile NAND growth has been phenomenal for us.”

   Adams said that as the memory business diversifies, elements such as firmware and packaging are becoming just as critical. “Software, firmware and controllers are just as important as raw NAND.”

   Last year, Micron was digesting Japanese memory chip maker Elpida

   Reply
3. June 1, 2015 at 10:21 am

   Tomi Engdahl says:

   Avago, Broadcom Combo Praised
   Deal would create $13B mobile/cloud giant
   http://www.eetimes.com/document.asp?doc_id=1326711&

   SAN JOSE, Calif. – If Avago bids to buy Broadcom as reported it would be the largest of an escalating set of deals for the company and the consolidating semiconductor industry. The combination would have little product overlap, a few areas of synergy and would no doubt squeeze out plenty of savings in layoffs and spin-outs.

   Ironically, Avago is the smaller of the two companies

   Reply
4. June 1, 2015 at 10:36 am

   Tomi Engdahl says:

   Google Unveils Smart Fabric Program
   ATAP group wants to mass manufacture conductive yarns
   http://www.eetimes.com/document.asp?doc_id=1326725&

   Members of Google’s Advanced Technology and Projects (ATAP) team unveiled Project Jacquard, a conductive thread initiative, at its annual developer conference (May 29). Jacquard has been in development since early 2014 and makes it possible to weave touch and gesture interactivity into any textile using standard, industrial looms.

   “The structure of a capacitive touch sensing device is very similar to that of a woven fabric,” ATAP Design Lead Carsten Schwesig told EE Times. “The core of what we’re doing is replacing some of these yarns with conductive yarns.”

   Jacquard yarns combine thin, metallic alloys with natural and synthetic yarns to create a strong yarn with 0.1 ohm resistance in a variety of colors.

   https://www.google.com/atap/project-jacquard/

   Reply
5. June 1, 2015 at 12:17 pm

   Tomi Engdahl says:

   Intel Nears Agreement to Buy Altera for About $54 a Share
   Deal valuing Altera at roughly $17 billion likely to be announced Monday
   http://www.wsj.com/articles/intel-nears-agreement-to-buy-altera-for-about-54-a-share-1433095451

   Reply
6. June 1, 2015 at 1:08 pm

   Tomi Engdahl says:

   A Case Study – RF ASIC Validation of a satellite transceiver
   http://www.edn.com/design/analog/4439558/A-Case-Study—RF-ASIC-Validation-of-a-satellite-transceiver-?_mc=NL_EDN_EDT_EDN_analog_20150528&cid=NL_EDN_EDT_EDN_analog_20150528&elq=65d6a80d50e04d0ab9d35631fb7a4346&elqCampaignId=23183&elqaid=26116&elqat=1&elqTrackId=fd15e1b1bc2d4546842dc32d460178bd

   Editor’s note: This white paper is an excellent tutorial and guide for any design that an engineer might create. Even though it is specific to ASIC development, test and validation, these steps point very clearly to methods that can be used for any type of design application. The pitfalls and challenges are also very helpful tutorials to design engineers in the industry. Most of all, the article speaks loudly about S3’s capabilities and expertise in creating a product and bringing it successfully to production—a good lesson in itself.

   The validation PCB design focussed on impedance matching and shielding RF signals from noise sources. We built up an efficient, automated test harness based on LabVIEW, MATLAB and python. This unified test framework facilitated instrument set-up, test-case running, data collection, traceability, plotting of measurements, waveform generation and analysis.

   Reply
7. June 2, 2015 at 6:26 am

   Tomi Engdahl says:

   Intel to buy Altera for $16.7 billion in its biggest deal ever
   http://www.reuters.com/article/2015/06/01/us-altera-m-a-intel-idUSKBN0OH2E020150601

   Intel Corp (INTC.O) agreed to buy Altera Corp (ALTR.O) for $16.7 billion as the world’s biggest chipmaker seeks to make up for slowing demand from the PC industry by expanding its line-up of higher-margin chips used in data centers.

   By combining with Altera, Intel will be able to bundle its processing chips with the smaller company’s programmable chips, which are used, among other things, to speed up Web-searches.

   Intel said on Monday it would offer $54 per share for San Jose, California-based Altera, a 10.5 percent premium to Altera’s close on Friday.

   Reply
8. June 2, 2015 at 12:56 pm

   Tomi Engdahl says:

   Google Gestures at 60 GHz
   Researchers demo consumer radar-on-chip
   http://www.eetimes.com/document.asp?doc_id=1326726&

   Google showed at its annual developer conference a 60 GHz device that acts as a radar-on-chip for controlling with gestures small-screen devices. The technology isn’t yet authorized by the FCC, but Google’s ATAP research team believes its Soli will find use in wearables.

   “We propose to use the vocabulary of hand motions for [device] interactions,” creating a generic input device that eliminates the need to interact with a smartphone,” said Project Lead Ivan Poupyrev in a talk at Google I/O here. “It doesn’t have to be a virtual touch pad…your hand can become a variety of controls — a virtual dial, a slider,” he said.

   The team has developed two Soli chips, a 9mm 2 device using pulse radar an 11mm 2 chip using continuous signal radar. Both run at 60 GHz with sub-millimeter accuracy.

   “From the signal representations, we can extract features that directly measure my hands characteristics and dynamics,”

   Reply
9. June 2, 2015 at 12:57 pm

   Tomi Engdahl says:

   MediaTek to Stay with TSMC for Finer-Node Chips
   http://www.eetimes.com/document.asp?doc_id=1326737&

   MediaTek Inc. said it will continue to use Taiwan Semiconductor Manufacturing Co. (TSMC) as its foundry for leading edge chips, laying to rest rumors that the world’s third-largest chip designer might shift orders to TSMC rival Samsung.

   MediaTek will use TSMC’s 16nm FinFET Plus and 10nm process technology for its next-generation chips, according to MediaTek Chief Financial Officer David Ku

   “TSMC’s support has been excellent,” he said.

   TSMC and Samsung have been in a neck-and neck race to develop leading-edge FinFET process technology at the 16nm and 14nm nodes.

   Reply
10. June 4, 2015 at 10:40 am

    Tomi Engdahl says:

    Intel, Altera: Math in Question
    Co-packaged x86, FPGAs ship late 2016
    http://www.eetimes.com/document.asp?doc_id=1326741&

    The math on Intel’s $16.7 billion bid to buy Altera doesn’t add up although the merged companies could see gains, analysts said. The deal raises more questions than others in a string of recent mega-mergers for a semiconductor industry that is consolidating as it matures.

    Analysts questioned Intel’s claim it could ride to seven percent revenue growth thanks to the merger. The x86 giant could give Altera the clout to take share from its traditional FPGA rival, Xilinx. However, Intel’s poor track record in mergers made some skeptical about that prospect.

    In a conference call, Intel chief executive Brian Krzanich said the combined companies will ship integrated products starting in late 2016 for servers and some still-undetermined embedded systems. Initial products will pack x86 and FPGA die in a single package, followed “shortly” by products that merge both on SoCs.

    Intel targets a bigger opportunity than current estimates of a $1 billion annual market for stand-alone FPGAs as server co-processors, said Krzanich.

    With such chips, Web giants such as Google or Facebook could rapidly shift from running on the same servers their algorithms for facial search or encryption, Krzanich suggested. “They want to do multiple workloads [and] the workload will change over time, [so an integrated chip] is ideal for this,” he said.

    “I don’t see that as a fundamental strategy for the server business,” said Linley Gwennap, principal of market watcher The Linley Group (Mountain View, Calif.) and a veteran Intel analyst. “We’ve seen some experimentation using FPGAs in the data center and there have been some promising results, but we haven’t seen much deployment,” Gwennap said.

    Reply
11. June 4, 2015 at 10:46 am

    Tomi Engdahl says:

    IoT Needs New MEMS Approache
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1326768&

    New approaches to MEMS are needed to drive growth in sensors and the Internet of Things, according a panel of speakers at the upcoming Semicon West event.

    If the Internet of Things (IoT) is going to drive the next round of electronics industry growth, it will depend in large part on the MEMS and sensor technology that will enable all those smart objects to interact with the real world. But the ramp of new MEMS designs to volume production may take too long and cost too much to meet IoT market expectations, unless the industry figures out ways to accelerate MEMS development.

    New applications for existing MEMS devices are driving healthy 12% annual growth in the MEMS sector, but the difficulty of ramping disruptive new products to volume production may slow down growth unless the sector figures out how to smooth the translation of mechanical devices to silicon

    Incremental innovation in smaller, higher performance, lower-cost devices has continued to spur strong growth both in the sensors and the systems they enable, by ever-wider adoption of established MEMS devices into more applications.

    The IC industry has found ways to collaborate on pre-competitive research, and has a well-developed commercial support infrastructure that has supported continued growth, he noted. “Some things need to happen in the MEMS industry to simplify and speed the process of design and ramp to volume.”

    “I think the growth of the MEMS industry is really just now starting, with the demand for sensors everywhere for the Internet of Things, for contextual awareness, and especially for new kinds of bio-chemical and bio-medical sensors,”

    Reply
12. June 4, 2015 at 10:52 am

    Tomi Engdahl says:

    Intel, Altera: Math in Question
    Impact on Xilinx and overall growth
    http://www.eetimes.com/document.asp?doc_id=1326741&page_number=3

    Some analysts questioned how Intel would hit its target of achieving seven percent compound annual growth rates with the merger. “How do you make the math work?”

    “We view the acquisition of Altera as a good strategic asset for Intel, albeit at a very high price,” said Ross Seymore, analyst for Deutsche Bank.” By our math, the deal appears ~3% accretive in 2016…the accretion is meaningfully less than if Intel had used the same amount to repurchase its shares (~10% accretion),” he wrote in a report.

    “That’s good in the short term, but we don’t agree with it,”

    “We thought Broadcom was a better acquisition — that would have given them additional capabilities,” Jones said adding that the the $16.7 billion price tag for Altera was “a rich price to pay.”

    “Now Intel has the challenge of getting the value out of Altera …[but] Intel won’t be able to make significant cuts and increase gross margins because Altera is well managed,”

    The deal “gives Altera more resources to get ahead of Xilinx, so Altera could start really taking share from Xilinx,” said Hung of Gartner.

    “Xilinx should be proactive in competing with Intel in the data center,” said Jones. Specifically, the FPGA maker should bolster its development and licensing in areas such as Ethernet, fiber optics, and serdes and court data center partnerships with the likes of AMD, Broadcom/Avago and Nvidia, he said.

    Reply
13. June 4, 2015 at 10:54 am

    Tomi Engdahl says:

    JEDEC Announces Support for Hybrid NVDIMM Modules
    http://www.eetimes.com/document.asp?doc_id=1326739&

    JEDEC Solid State Technology Association has approved the first standards for support of hybrid DDR4 memory modules.

    The standards work is being done by JEDEC’s JC-45 Committee for Memory Modules, which developed the non-volatile DIMM (NVDIMM) taxonomy in collaboration with Storage Network Industry Association’s NVDIMM Special Interest Group (SIG), a sub-committee of SNIA’s Solid State Storage Initiative.

    The new standard defines hybrid DDR4 memory modules as those that plug into standard DIMM sockets and appear like a DDR4 SDRAM to the system controller, yet contain non-volatile memories such as NAND flash on the module. These hybrid module families may share the memory channel with other standard DDR4 DIMMs. Publication of the standard is expected later this year

    The JEDEC standards cover two versions of hybrid modules: the NVDIMM-N, which combines DRAM and NAND flash where the flash provides backup and restore of all DRAM for reliable data persistence in the event of a power failure; and the NVDIMM-F, which provides directly addressable NAND flash that is accessed as a block oriented mass storage device.

    Although the standards work for NVDIMM is still in its early days, there are already products available.

    Reply
14. June 4, 2015 at 11:10 am

    Tomi Engdahl says:

    Semiconductors steady growth for three years

    Semiconductor Industry Association, or SIA Semiconductor Industry Association predicts a steady growth in the coming years. This year, the market size will grow by 3.4 per cent, as well as next year. In 2017 the growth rate will reach yet equally into three.

    In April, semiconductors sold 27.6 billion dollars. The year before growth came to 4.8 percent.

    Europe, April was poor, as sales fell by 5.6 per cent reading in April 2014.

    This year, the semiconductors will be the current forecast, sell 347.2 billion dollars.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2928:puolijohteisiin-tasaista-kasvua-kolmeksi-vuodeksi&catid=13&Itemid=101

    Reply
15. June 5, 2015 at 8:11 am

    Tomi Engdahl says:

    2015 Top 25 Global Franchised Distributors
    http://www.ebnonline.com/author.asp?section_id=3219&doc_id=277631

    EBN’s list of the top 25 global franchised distributors is like any A-list party: at first glance, it’s clear that all the right people are in attendance. In fact, little has changed on the list, as the top five winners have remained stable, and the list welcomed only a single newcomer (Macnica).

    The price of entry to the 2015 Top 25 acclaim has risen pretty substantially, with the bottom of the list capturing $69.7 million in sales for calendar year 2014, compared to the bar of just $43.24 million set last year. As in the 2014 ranking, the top ten distributors all report well over a billion dollars in annual sales.

    Reply
16. June 5, 2015 at 8:16 am

    Tomi Engdahl says:

    The world’s smallest 20-amp power supply

    Exar has introduced a power module, which it boasts the world’s smallest 20-amp power with module dimensions are only 12 x 14 x 4 mm. XR79120 module contains all components required, power from 4.5 to 22 volt range.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2932:maailman-pienin-20-ampeerinen&catid=13&Itemid=101

    Reply
17. June 5, 2015 at 8:28 am

    Tomi Engdahl says:

    Researchers have now developed an OLED panel with a resolution of 640 pixels per inch reach.

    The achieved accuracy is in many ways important. 4K TV screen should distinguish between 200 dots per inch, but the mobile phone FullHD-resolution already requires 500 pixels per inch.

    Belgian microelectronics research center IMEC researchers in conjunction with Fujifilm developed a method that can produce up to 640 pixel density. Pixels are the size of 20 microns in thickness.

    Conventional lithography is poorly suited to the production of organic electronics, because the plastic-based materials can not withstand the process.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2929:taipuisa-naytto-yltaa-jo-640-pikseliin-tuumalla&catid=13&Itemid=101

    Reply
18. June 5, 2015 at 2:39 pm

    Tomi Engdahl says:

    Embedding PCBs In 3D Prints
    http://hackaday.com/2015/06/04/embedding-pcbs-in-3d-prints/

    The folks over at Lunchbox Electronics are working on a very cool prototype: embedding LEDs inside standard 1×1 Lego bricks. Being a prototype, they needed a cheap way to produce Lego bricks stuffed with electronics. It turns out a normal 3D printer has okay-enough resolution, but how to put the electronics in the bricks? Gcode wizardry, of course.

    The electronics being stuffed into the bricks isn’t much – just a small PCB with an LED. It does, however, need to get inside the brick. This requires stopping the 3D printer at the right layer, moving the print head out of the way, inserting the PCB, and moving the head back to where it stopped.

    How to embed electronics into a 3D Print
    http://www.lunchboxelectronics.com/how-to-embed-electronics-into-a-3d-print

    Reply
19. June 9, 2015 at 6:32 am

    Tomi Engdahl says:

    The Membrane Potentiometer
    http://www.edn.com/design/analog/4439446/The-Membrane-Potentiometer

    This new whitepaper, by Hoffman + Krippner Inc, introduces the advantages and disadvantages of the membrane potentiometer’s special design, and also outlines its possible applications including industrial controls, robotic systems, forklifts, doors and gates, and even gaming. This essential guide for design engineers also covers the important technical parameters of membrane potentiometers including the various types such as PET, Kapton, magnetic and hybrid.

    Reply
20. June 9, 2015 at 6:33 am

    Tomi Engdahl says:

    Power module enables compact inverter designs
    http://www.edn.com/electronics-products/other/4439573/Power-module-enables-compact-inverter-designs

    nfineon’s MIPAQ Pro intelligent power module integrates IGBTs, gate drivers, heat sink, sensors, digital control electronics, and digital bus communication into a single device to allow compact and scalable inverter designs to be implemented in wind, solar, and industrial drive applications.
    According to the manufacturer, the MIPAQ Pro increases power density by up to 35% compared to previous platforms, like the ModSTACK C.

    The unit comes in a half-bridge configuration with blocking voltages of 1200 V or 1700 V and a nominal current of up to 2400 A. In addition, it is equipped with either a liquid-cooled or air-cooled heat sink. Up to four modules can be connected in parallel to cover power ranges of up to 7 MW, facilitated by adjustable delay settings that ensure a balanced setup of the overall inverter.

    http://www.infineon.com/cms/en/product/promopages/mipaq-pro/

    Reply
21. June 9, 2015 at 7:48 am

    Tomi Engdahl says:

    Samsung’s Mid-Power flip-chip LEDs foreshadow a larger battle ahead
    http://www.edn.com/electronics-products/electronic-product-reviews/other/4439617/Samsung-s-Mid-Power-flip-chip-LEDs-foreshadow-a-larger-battle-ahead-?_mc=NL_EDN_EDT_EDN_productsandtools_20150608&cid=NL_EDN_EDT_EDN_productsandtools_20150608&elq=3324d8a1e5c24354b89b6aa2e9d08535&elqCampaignId=23344&elqaid=26308&elqat=1&elqTrackId=57c18ae7f8ac40bd965f25fd6c107656

    Samsung’s recently-announced family of flip-chip mid-power LEDs and aggressive roadmap for its chip scale packaging (CSP) technology are both signs that the Korean electronics giant intends to defend its market share against growing competition. Like Osram, Philips and other incumbent LED makers, Samsung has been encountering growing competition from upstart Chinese manufacturers who seem to be willing to buy market share with pricing that’s rumored to barely cover their operating costs.

    But unlike Philips and several of its other counterparts who’ve folded their hands and sold out, Samsung has chosen to take a stand. Rather than try to win a price war with their existing products, Samsung’s thrown its resources at getting a generation or two ahead of Chinese manufacturers’ packaging and process technologies with two new generations of LEDs.

    For the short term, they’ve introduced a 2nd-generation chip-scale package (CSP2) manufacturing process for their GaN on Sapphire (4”) fab line to produce smaller, more efficient LEDs which offer improved optical and thermal properties and a highly-competitive Lm/$ ratio.

    The CSP2 process enables Samsung to produce LED die which are roughly 30 percent smaller than its 1.4×1.4mm first generation CSP, while offering a 10 percent improvement in light performance. It also provides higher light quality with advanced multifaceted phosphor coating technology, which covers the top and four sides of an LED package with phosphor.

    Reply
22. June 9, 2015 at 7:52 am

    Tomi Engdahl says:

    LDO regulator squeezes into wearables
    http://www.edn.com/electronics-products/other/4439585/LDO-regulator-squeezes-into-wearables?_mc=NL_EDN_EDT_EDN_productsandtools_20150608&cid=NL_EDN_EDT_EDN_productsandtools_20150608&elq=3324d8a1e5c24354b89b6aa2e9d08535&elqCampaignId=23344&elqaid=26308&elqat=1&elqTrackId=57d04ff5d1c34ecba67672aa98ee1c63

    Housed in a tiny 1.6×1.2-mm, 0.6-mm thin package suitable for wearable electronics and other space-constrained battery-operated applications, the SC563 low-dropout regulator from Semtech provides two regulated outputs at up to 300 mA each, while its fixed output voltages eliminate the need for external resistor divider networks.

    The SC563 accepts an input supply voltage of 2.3 V to 5.5 V. It has separate input, output, and enable pins for each LDO channel

    Offering fixed 1.8-V and 3.3-V outputs in an 8-pin MLPD, the SC563 LDO regulator costs $0.25 each in lots of 3000 units.

    http://www.semtech.com/power-management/linear-regulators/sc563/

    Reply
23. June 9, 2015 at 9:23 am

    Tomi Engdahl says:

    IBM intends to revolutionize the electronics design tools offer. The company has imported EDA tools for lease through a cloud service. For other EDA vendors IBM’s business can be a tough blow.

    Tools license price will be US data show that less than half of the commercial tools, license prices. Tools for rent a very flexible model: one day, one application or one per processor.

    In practice, IBM will charge you the use of tools based on usage. The provision of tools, IBM uses its own Soft Layer-technique and the cloud service takes care Sicad.

    The large EDA houses IBM’s solutions differ in such a way that fully entire flow from concept to silicon, it does not provide. Even in their own planning, it will have to rely on some external tools. IBM says to cover about 70-90 per cent of a typical digital circuit design flow.

    Available in upcoming tools include the Library Characterization Tool (mostly synthesis and power planning), Logic Verification Tool VHDL and very rapid revision of Verilog coding and analysis, as well as IBM’s own Spice simulator.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2942:ibm-vuokraamaan-suunnittelun-tyokalujaan&catid=13&Itemid=101

    Reply
24. June 9, 2015 at 9:31 am

    Tomi Engdahl says:

    Intel manufactures the largest programmable circuits

    Intel’s 14-nanometer process is Altera’s new Stratix 10 districts in the back. 3D-type Tri-Gate process will double the performance and up to 70 percent lower power consumption of an FPGA-circuits. At the same time Stratix 10 is by far the largest market for monolithic programmable circuit.

    Altera’s Stratix 10 of the boast the world’s largest monolithic FPGA.

    The chip has as many as 5.5 million logic elements.
    DSP blocks reach up to 10 teraflop performance.
    The circuit has four ARM Cortex-A53 cores that operate at a clock frequency of 1.5 gigahertz

    Altera’s new flagship is primarily intended for data communications applications. Telecommunications currently imports about half of Altera’s revenues

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2946:intel-valmistaa-suurimmat-ohjelmoitavat-piirit&catid=13&Itemid=101

    Reply
25. June 9, 2015 at 9:33 am

    Tomi Engdahl says:

    American Micro has presented made ​​of 16-nm line width TLC flash circuit having the same cell is stored in three bits. NEW technology allow the preparation of almost a third of the denser memories.

    The circuit is suitable for 16 gigabytes of data and based on that produced by, for example, SSD hard drives.

    TLC-type flash has quickly captures the mass of the NAND circuit market.

    Micron intends to bring your new TLC-circle SSD discs on the market as early as this autumn. Many other manufacturer Micron intends to use the new chips on their SSDs.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2937:uusi-muisti-selvasti-tiheampi-kiintolevy&catid=13&Itemid=101

    Reply
26. June 9, 2015 at 9:35 am

    Tomi Engdahl says:

    DRAMs manufactured by this year by over $ 40 billion. NAND flashien markets approach even those 30 billion limit.

    But in how many factories these circuits are made?

    DRAM factories are currently in use 48, NAND circuits manufactured in 32 factories.

    SEMI’s data show that this year the introduction of 36 new production lines.

    Next year, production capacity will increase by 20 new plant.

    Source: http://etn.fi/index.php?option=com_content&view=article&id=2936:muistipiireja-valmistetaan-pian-yli-sadassa-tehtaassa&catid=13&Itemid=101

    Reply
27. June 9, 2015 at 9:48 am

    Tomi Engdahl says:

    NRAM’s Time Is Here, Says Startup Nantero
    http://www.eetimes.com/document.asp?doc_id=1326794&

    Nantero is coming out of stealth mode and announcing a round of financing because it believes its proprietary NRAM is ready to take its place as a storage class memory and replacement for flash and DRAM.

    NRAM is based on carbon nanotubes, cylinders made out of carbon atoms, explained said Nantero CEO Greg Schmergel in a telephone interview with EE Times. Stronger than steel, these nanotubes have a diameter of one to two nanometers, and are better conductors of electricity than other known materials used in chips.

    Although Nantero was founded in 2001, it is still very much in a startup phase.

    NRAM technology offers a number of advantages, said Schmergel, including read and write that is the same as DRAM but one-hundred times faster than NAND flash used in mobile devices and SSDs, as well as better endurance. “The endurance is unlimited because carbon nanotubes never wear out.”

    Tests have been done to demonstrate that NRAM remains stable in extreme temperatures, and was even tested by Lockheed Martin and NASA on the space shuttle Atlantis by being bombarded with radiation.

    Back on Earth, NRAM’s commercial appeal is that is also lower power consumption as compared to DRAM and flash, and the small size of carbon nanotubes means more data in a smaller footprint. This makes it appealing for laptops and mobile devices, said Schmergel, as well as suitable for wearables or Internet of Things devices. “There are applications we can’t predict.”

    Nantero won’t make the NRAM itself, Schmergel said. Instead it will license the technology to device makers and manufacturers. He said the first chips will be DRAM-compatible modules that fit into memory slots, and device makers will be able to place carbon-nanotube storage on top of NAND flash circuitry.

    Niebel said carbon nanotubes are attractive because of their endurance, and if Nantero is able to reduce costs as it claims, NRAM becomes very interesting technology, especially if it as universal as the company portends.

    Reply
28. June 9, 2015 at 9:49 am

    Tomi Engdahl says:

    IBM Renting Its EDA Tools
    On-line Access Half-the-Price of Licensing
    http://www.eetimes.com/document.asp?doc_id=1326801&

    By moving its electronic design automation (EDA) suite of chip-designing tools to the cloud, IBM can now share its famous proprietary EDA tools with chip designers at what it claims is one-half the price of licensing tools from other EDA providers. Using its own SoftLayer cloud infrastructure to securely store its tools, IBM is now offering its EDA toolkit through the SiCAD Inc. (Cupertino, Calif.) portal — a silicon design platform provider of cloud-based EDA design flows.

    “We are targeting small- to medium-sized businesses, with a factor of two in price/performance compared to other tool vendors,” Christopher Porter, IBM high-performance computing (HPC) manager told EE Times. “We now offer a pay-as-you-go business model instead of a three-to-five year license agreement like the other EDA vendors.”

    IBM’s tools are rented per day, per application, per core — a price that will halve the cost of developing a new integrated circuit (IC), according to IBM.

    “And these are just the first three tools we are offering,” Porter told us. “Stay tuned as we will be enhancing our offerings in the future.”

    According to IBM the tools it is offering through SiCAD offer verification, simulation and regression testing, which is about 70 percent of the typical new IC design flow today and will become 90 percent of the typical design flow in the future as the industry progresses to more advanced nodes.

    IBM also claims that it has invest over 50-to-100 years of research and development into its tools and have been using them internally for 10-to-20 years on real-world chip designs by more than 1,000 engineers

    Reply
29. June 9, 2015 at 9:51 am

    Tomi Engdahl says:

    Free Service Compares Devices
    http://www.eetimes.com/document.asp?doc_id=1326789&

    Cutting through the time consuming and often misleading comparisons of integrated circuits (ICs) such as microelectromechanical system (MEMS) microphones, is the charter of a startup company announcing itself for the first time in EE Times. Called General Purpose Input/Output (GPiO Inc., Santa Clara, Calif.) — a metaphor for the pin used to signal a multitude of conditions on many ICs — the company was founded by an audio engineer who got tired of having to test devices in order to see if they lived up to their specification (spec) sheet.

    “As an audio systems engineer for 10 years, choosing ICs was always a huge pain point as an engineer who had to find and qualify components,

    GPiO does all that ahead of time for engineers, and publishes the results free online in a format that allows the engineer to stipulate their required specifications, with a few clicks, and get a list of the pre-qualified parts as well as graphical comparisons of their performance.

    As their first category, GPiO tested the specifications of over 60 MEMS microphones and in some cases found significant differences between their results and the spec sheets of the vendors

    “The advantage of our testing is that we use exactly the same method for each part, whereas vendors are free to use conservative or generous testing methods when making their data sheets,” Savant told us.

    Next in line for testing are battery management ICs, followed by battery charger ICs, power ICs, RF ICs and more.

    You only need to sign-up and choose a password to test out the free service.

    http://www.discovergpio.com/

    Reply
30. June 9, 2015 at 2:52 pm

    Tomi Engdahl says:

    The great silicon slurp of 2015 continues: Atmel next on the shopping block
    Keeping ‘persons close to the matter’ busy
    http://www.theregister.co.uk/2015/06/09/the_great_silicon_slurp_of_2015_continues_atmel_next_on_the_shopping_block/

    Another instalment in this year’s consolidation in the silicon market appears to be on the cards, with reports emerging that microcontroller outfit Atmel is looking for a buyer.

    As Reuters reports, the company’s CEO, Steve Laub, is due to retire at the end of August, something that may have sparked the decision to seek acquisition.

    possible acquisition for the US$4 billion outfit.

    Atmel’s portfolio includes microcontrollers such as ARM-based units for home appliances, touchscreen controllers for wearables like smart watches, and low-power WiFi devices for Internet of Things applications.

    This time around, however, the speculation comes amid merger and acquisition activity like Broadcom/Avago and Intel/Altera, and hot interest from big vendors in staking out their territory in the Internet of Things.

    Exclusive: Chipmaker Atmel exploring sale – sources
    http://www.reuters.com/article/2015/06/08/us-atmel-sale-exclusive-idUSKBN0OO2BD20150608

    Atmel Corp (ATML.O), a maker of small processors called microcontrollers that are used in a variety of electronics, is exploring strategic alternatives, including a possible sale, three people familiar with the matter said on Monday.

    Mid-sized semiconductor makers are becoming attractive takeover targets for larger semiconductor players looking to round out their capabilities with chips for cars, watches and other devices that will interact with each other in what is referred to as the “Internet of Things”.

    Reply
31. June 9, 2015 at 3:11 pm

    Tomi Engdahl says:

    IBM releases IoT electronic design automation tools in the SoftLayer cloud
    Tools allow scalable Internet of Things chip design
    http://www.theinquirer.net/inquirer/news/2412304/ibm-releases-iot-electronic-design-automation-tools-in-the-softlayer-cloud

    IBM HAS ANNOUNCED the industry’s first cloud service designed specifically for electronic design automation (EDA).

    The service provides on-demand access to tools from SiCAD, an expert in EDA, design flows, networking, security, platform development and cloud technologies.

    The pay-as-you-go SoftLayer infrastructure introduces a range of IBM tools that had previously been available only internally.

    The pedigree of these tools includes designs for IBM mainframe and Power microprocessors, interconnects, ASICs and other custom projects totalling over 100.

    The first phase of the launch will include three key tools all contained on an IBM Platform LSF cluster built on the IBM SoftLayer cloud. These are:

    IBM Library Characterisation to create abstract electrical and timing models required by chip design tools and methodologies
    IBM Logic Verification to simulate electronic systems described using the VHDL and Verilog design languages
    IBM Spice, an electronic circuit simulator used to check design integrity and predict circuit behaviour

    The service is expected to be particularly appealing to the burgeoning Internet of Things (IoT) market

    Reply
32. June 9, 2015 at 4:04 pm

    Tomi Engdahl says:

    IBM Demos III-V on Silicon
    Moore’s Law extended again?
    http://www.eetimes.com/document.asp?doc_id=1326817&

    Moore’s Law may get another boost, according to IBM Research (Zurich and Yorktown Heights, N.Y.), thanks to a method of depositing ultra-fast III-V nanowires suitable for transistor channels and other structures on silicon-on-insulator (SOI) substrates. Using a method IBM pioneered called template-assisted selective epitaxy (TASE), IBM says it has proven the concept by fabricating a variety of nanoscale Hall structures and multi-gate FETs.

    The cooperative efforts of the two labs appear to have achieved what semiconductor manufacturers around the world have been trying to do for many years, including Intel. In its paper published in Applied Physics Letters, IBM cites several partially successful techniques used by others to overcome the lattice mismatch between silicon and III-V materials (including indium, gallium, arsenide and their compounds) as well as earlier efforts to make its own template-assisted selective epitaxy (TASE) work.

    According to AIP, Schmid and associates accomplishment may also lead to active photonics on silicon substrates, since III-V materials are routinely used to make on-chip lasers and other photonic structures.

    Starting with Soitec SOI substrates e-beam lithography and reactive ion etching achieved devices of from 25-to-50 nanometers thick which were patterned atop a 30 nanometer thick layer of silicon dioxide laid down ahead of time with atomic layer deposition (ALD) and annealed at 850 degrees Celsius (1472 degrees Fahrenheit).

    Reply
33. June 10, 2015 at 8:44 am

    Tomi Engdahl says:

    Multicore Powering Next-Gen Industrial Servers
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1326822&

    Many-core processors powering industrial servers for control applications are extending the impact of Moore’s Law into the future.

    The hallmark of PC control has always been the benefits it can pass on to machine control applications through increases in PC performance, along with steadily falling component costs. In recent years, higher performance has been achieved using multi-core processors.

    But now, as a next step in the development of technology, a new type of many-core industrial servers are offering both a higher number of processors and at the same time more cores on a board. Current configurations for the industrial control market are available with up to 24 cores, and also provide both a much larger cache and higher clock rates.

    A key is that many-core industrial servers can provide the compute power to implement centralized control system architectures that are capable of controlling complex machinery and equipment from a central location.

    Reply
34. June 10, 2015 at 9:06 am

    Tomi Engdahl says:

    Tools Simplify Sensorless Motor Control
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1326812&

    In this last of Dave’s blog series on field-oriented control (FOC) for motors he discusses some tools that simplify motor startup and optimized operation.

    back-EMF
    algorithm allows us to eliminate the shaft sensor in a field-oriented motor control system. But back-EMF observers suffer from several maladies which are common to sensorless techniques:

    The angle accuracy from a back-EMF observer (or any observer for that matter) is only as good as your estimate of the motor parameters. Even if you are lucky enough to find a datasheet for your motor, the parameters you need are often difficult to find, in wrong units, or missing altogether.

    Even if you find the motor parameters, they may change due to motor heating.

    The amplitude of the back-EMF signals is proportional to motor speed. So at zero speed, there aren’t any back-EMF signals. Since you need back-EMF signals to spin the motor, but the motor needs to be spinning before you have back-EMF signals, how do you get the whole process started??

    Once the motor is running, low-speed performance is usually very poor because the back-EMF signals are so small. ADC resolution and measurement tolerances become critical at low speeds.

    Fortunately, tools are available to address these issues. Texas Instruments, for instance, developed a suite of tools called InstaSPIN-FOC that is designed to get your motor spinning instantly; sometimes in a matter of minutes, and supports sensorless designs. InstaSPIN-FOC has already been used to control motors ranging from 3W to 3 Megawatts, as well as speeds from 0.4 Hz to over 4000 Hz.

    Once you have the parameters you can do sensorless FOC with your motor. However, in order to regulate motor speed, you still need to tune the speed loop.

    reason for FAST’s excellent low-speed performance is that it doesn’t extract angle information directly from the back-EMF signals. Since back-EMF signals start falling apart at low speeds, FAST uses a different technique to extract angle information.

    Although FAST provides excellent low-speed angle tracking, it is still dependent on the accuracy of the motor parameter estimates, especially stator resistance (Rs).

    Like most other sensorless observers, InstaSPIN-FOC will not work all the way down to zero speed. It’s kind of like your automobile engine. You can idle down to a certain speed, but if you try to go lower, the engine stops.

    A final note: when driving an AC induction motor (ACIM) with InstaSPIN-FOC, you can often encounter situations where the ACIM is lightly loaded, but the motor is still using energy to keep its field at full strength. If this is a frequent situation, you can save energy by reducing your Id current, which in turn reduces the field in the motor. One approach that is commonly used is to set Id equal to Iq, which results in maximum torque per amp. But InstaSPIN-FOC contains another mode of operation called “PowerWarp,” which adjusts the Id/Iq ratio in such a way as to minimize the net I2R losses in the rotor and stator.

    Reply
35. June 10, 2015 at 9:15 am

    Tomi Engdahl says:

    Sphygmomanometer Design Considerations
    http://www.eeweb.com/company-blog/maxim/sphygmomanometer-design-considerations/

    This tutorial discusses the factors to consider in designing a sphygmomanometer or commonly known as the blood pressure monitor. This article presents the two main types of automatic blood pressure monitor used for medical applications, measurement techniques, and the functions of each component in order to meet the requirements of an ideal and accurate blood pressure monitoring system.

    Reply
36. June 10, 2015 at 9:16 am

    Tomi Engdahl says:

    Integrated Power Module
    http://www.eeweb.com/news/integrated-power-module

    Powerex announced the release of its integrated power module, a configurable IGBT-based power platform.

    The module has rated power outputs from 75-229 KW and operates on DC bus voltages from 400 to 800 VDC and switching frequencies of up to 20 kHz.

    The power module can be mounted on various heatsinks

    Applications include three-phase inverters; DC/DC Convertors; choppers; half or full bridge; and power supply applications.

    The PIPM is compatible with the NX-Series of Mitsubishi IGBT devices and is ideally suited for energy storage, uninterruptable power supplies (UPS), motor drives, solar, wind, photovoltaics, EV and hybrid electric vehicle applications.

    Reply
37. June 10, 2015 at 9:20 am

    Tomi Engdahl says:

    LEDs for Automotive Grade Optocouplers
    http://www.eeweb.com/company-blog/avago_technologies/leds-for-automotive-grade-optocouplers/

    One of the key enablers for optocouplers to handle automotive grade 1 applications is the use of very high performance LEDs. The LED light output dropping by less than 0.2 /°C, aids in achieving high temperature specifications and the improvements in LED design and fabrication. Coupled with package design, this has demonstrated very reliable performance. Based on the mission profiles of some automobiles 15 years old, this translated to about 2000 hrs under highly accelerated continuous operating life stress conditions. With current transfer ratio drop of less than 10 after 5000 hrs of stress, system designers can accommodate such variations to cover more than 35 years of the automobile’s life.

    The rapid rise of oil prices has pushed the growth of fuel efficient hybrid electric vehicles (HEVs) to take center-stage in the automotive industry. The high voltage batteries used in the HEVs brought about a need for insulation and isolation. Optocouplers have been chosen for this task in the current hybrids design.

    The primary piece parts of an optocoupler consist of a photodetector IC and an LED. In practice, the photodetector can sometimes be re-qualified for high temperature automotive use with little or no design changes. The LED, however, requires more careful consideration.

    Since the advent of the LED, continuous and rapid developments in LED design and processing have resulted in a massive divergence in the intrinsic aging performance of LEDs. Providing customers with an LED of exceptional lifetime performance is no longer a fundamental technological problem.

    Temperature Coefficient of LED Light Output

    LEDs brightness has a negative coefficient with temperature. To be able to handle ambient temperatures beyond +105 °C (Automotive Grade 1 and 2), a low temperature drift has a significant advantage in minimizing parametric temperature drifts. The LEDs used for Avago’s Automotive Grade optocouplers typically drops by < 20% at +125 °C, whereas commercially available (consumer grade and general purpose industrial) infrared LEDs typically experience a drop of up to 60% at +125 °C (Figure 3). As this is beyond the recommended temperature range for commercially available LEDs, it does highlight the importance that only specially designed LEDs for high temperature operation can be used for automotive grade optocouplers.

    Reply
38. June 10, 2015 at 9:21 am

    Tomi Engdahl says:

    Application processors improve security, power efficiency
    http://www.edn.com/electronics-products/other/4439635/Application-processors-improve-security–power-efficiency?_mc=NL_EDN_EDT_EDN_today_20150609&cid=NL_EDN_EDT_EDN_today_20150609&elq=a41939d92085425cb45400dae6e8ed3e&elqCampaignId=23360&elqaid=26327&elqat=1&elqTrackId=3ff03e7316fd4ce6ae0a72e7b78fa5b6

    Freescale Semiconductor has added three application processors to its i.MX 6 ARM multicore series, offering higher levels of security, performance, and power management for consumer, industrial, and automotive markets. The i.MX 6 series comprises nine scalable single-core, dual-core, and quad-core families based on an ARM Cortex architecture operating at up to 1.2 GHz.

    Supplied in 14×14-mm and 9×9-mm BGA packages, the i.MX 6UltraLite targets cost-sensitive and space-constrained applications where power efficiency, small form factor, and security are critical. The processor leverages the energy efficiency of the ARM Cortex-A7 core and employs a power-management architecture

    Reply
39. June 10, 2015 at 9:23 am

    Tomi Engdahl says:

    Structural netlist efficiently verifies analog IP
    http://www.edn.com/design/integrated-circuit-design/4439626/Structural-netlist-efficiently-verifies-analog-IP?_mc=NL_EDN_EDT_EDN_today_20150609&cid=NL_EDN_EDT_EDN_today_20150609&elq=a41939d92085425cb45400dae6e8ed3e&elqCampaignId=23360&elqaid=26327&elqat=1&elqTrackId=745a4463ff274764b83ee182612423c2

    One of the major issues faced in the verification of analog or AMS IP in the SOC environment is the behavioral model’s limitations. Since behavioral models are not perfectly able to replicate analog behavior in a verification environment, many critical bugs are left uncovered.

    We will be focusing on this problem, and will discuss how to achieve more accurate analog behavior by using a structural netlist instead of a behavioral model to reduce the number of silicon defects and the verification cycle time.

    SPICE model netlist conversion to structural netlist

    This approach talks about using methodologies which directly convert transistor level SPICE model into Structural netlist. The principle of these methodologies is to work by isolating Analog circuits from logic and automatically recognizing the latch and flip-flop structures. The design is partitioned into cells, and an automatic algorithm on pattern based function extraction is run. The output is a structural netlist which is used in place of behavioral model for verification purpose. The structural netlist so obtained is pretty much close to actual analog SPICE model.

    Reply
40. June 10, 2015 at 9:25 am

    Tomi Engdahl says:

    Charging batteries rapidly and safely
    http://www.edn.com/design/power-management/4439643/Charging-batteries-rapidly-and-safely?_mc=NL_EDN_EDT_EDN_today_20150609&cid=NL_EDN_EDT_EDN_today_20150609&elq=a41939d92085425cb45400dae6e8ed3e&elqCampaignId=23360&elqaid=26327&elqat=1&elqTrackId=bff9f2d0b40a4f15a19594d1b4940daa

    Any hobbyist can charge a battery quickly, but can you do it without an explosion, excessive heating or major degradation in battery cycle life?

    Well many companies have managed fast charging techniques that typically use specialized algorithms. These algorithms take into account the chemistry of the battery and some sort of non-standard charging rate curve. Many device manufacturers and wireless operators are now providing a minimum two-year warranty on smart phone devices setting 800 cycles as the battery cycle life of the battery.

    Sponsor video, mouseover for sound

    I have yet to see many, if any, published lifetime test results from any fast charger supplier with popular battery types. One of these companies willing to publish life tests is Chargetek. They, in conjunction with Potential Difference, Inc., have managed to safely return a 51% charge in 25 minutes. Their technique is based upon proven patents, chemical analysis, and the all-important confirmation of the technology by extensive testing.

    Their technique uses batteries ranging from Lithium Ion 18650 cells to 20,000Ahr batteries. Their technique is also applicable for lead-based batteries like Absorbent Glass Mat (AGM), Sealed Lead Acid (SLA) and maintenance free. Lithium cobalt oxide and Lithium iron phosphate are also able to use this rapid charge technique.

    Reply
41. June 10, 2015 at 10:01 am

    Tomi Engdahl says:

    Cutting the cord on voice control
    http://www.edn.com/electronics-blogs/embedded-insights/4439628/Cutting-the-cord-on-voice-control?_mc=NL_EDN_EDT_EDN_today_20150609&cid=NL_EDN_EDT_EDN_today_20150609&elq=a41939d92085425cb45400dae6e8ed3e&elqCampaignId=23360&elqaid=26327&elqat=1&elqTrackId=934adf7596a24fe8af8baa8cff739894

    With the advent of Apple’s Siri, voice control of electronic devices has entered the mainstream consciousness. This, in turn, has stirred interest in adding voice control to embedded systems, as well. But systems like Siri depend on a network connection to substantial computing resources in order to offer the kinds of vocabularies and speaker independence that consumers are becoming used to, which doesn’t always make sense for embedded system designs. Fortunately, it’s now possible to offer that kind of functionality without the need to be connected.

    First, of course, developers need to decide if voice control is functionality they really want. Will this be a truly useful feature, or just a gimmick? Beyond that, there are many logistical questions to ask. Does having the operator speak commands create a noise problem for others in the immediate area? Does a spoken command create a privacy or security issue? (Imaging dictating your access code into a device in a room full of strangers.)

    There are also many performance factors to evaluate.

    Other performance issues to consider include the recognition vocabulary size, recognition accuracy, whether or not commands must be spoken in isolation or can be extracted from normal speech, how speaker-independent recognition must be, and similar factors.

    It almost seems, then, that voice command of embedded systems – especially of stand-alone (unconnected) systems – is most likely to come out on the “gimmick” side of that first question. But things are changing as users become ever-more accustomed to the convenience of voice recognition capability. The advent of personal companion devices such as Jibo, for instance is extending user interest in voice controlled systems.

    Happily, developers are gaining more access to options for implementing automatic speech recognition (ASR). Some of the latest offerings promise to provide Siri-like interactivity even when the “cord gets cut” and systems operate without a cloud connection. When I was at Embedded World, for instance, I ran across a company called Linguwerk that offers its Picard ASR system requiring a 40 MHz CPU with only about 90k of Flash and 15k of RAM for a system with a starting vocabulary. More recently, Sensory released a new natural-language speech recognition firmware product it calls TrulyNatural that scales to under 1M of Flash on a 50 MHz CPU for a vocabulary of up to 1000 words. A 1 GHz machine with 250M of Flash could handle a substantially larger vocabulary.

    There’s considerable promise in such stand-alone ASR systems. By eliminating the need for a network connection, these products provide many advantages. They won’t lose functionality as the result of a lost connection. They won’t suffer delays or performance hits due to network traffic issues. And they keep the user’s activities more secure and private because they don’t expose the speech to network eavesdroppers.

    Reply
42. June 10, 2015 at 10:12 am

    Tomi Engdahl says:

    Heat-Triggered, Self-Destructing Electronic Devices
    http://www.techbriefs.tv/video/Heat-Triggered-Self-Destructing;RF-Microwave-Electronics

    University of Illinois researchers have developed self-destructing electronic devices, a step toward advanced biomedical implants as well as reduced electronic waste and boosted sustainability in device manufacturing. The heat-triggered devices use magnesium circuits printed on very thin, flexible materials. The researchers trap microscopic droplets of a weak acid in wax, and coat the devices with the wax. When the devices are heated, the wax melts, releasing the acid. The acid dissolves the device quickly and completely. To remotely trigger the reaction, researchers embedded a radio-frequency receiver and an inductive heating coil in the device. The user can send a signal to cause the coil to heat up, which melts the wax and dissolves the device.

    Reply
43. June 10, 2015 at 10:32 am

    Tomi Engdahl says:

    Asus Starts Industry’s First Fully-Automated Graphics Card Production
    http://www.tomshardware.com/news/asus-auto-extreme-graphics-card-production,29252.html

    Asus’ new production method is an industry first, and it should deliver more reliable, higher quality graphics cards than before.

    Just a couple of days ago, Asus started a new production method for its graphics cards called Auto-Extreme. This is the industry’s first fully-automated production process, according to Asus.

    The idea behind Auto-Extreme is that when parts of graphics cards are built by hand, it introduces the chance of human error. The new production process fully automates all the steps of PCB manufacturing, which includes rolling the spools and manufacturing the MOSFETs. A handful of these PCB components used to be soldered to the PCB by hand, but now that everything is fully automated, it can be done with much more precision than before.

    The process designs, which lead to smooth PCBs and neat component layouts, are optimized further due to the higher precision possible in manufacturing. And, because it is all automated, installation of the components can be accomplished without oxidation and in environments with less dust.

    Such a manufacturing process brings benefits for both Asus and its customers. It reduces Asus’ production costs due to a lower failure rate in the quality control phase, and the graphics cards will likely have a longer lifetime, reducing warranty claims.

    Reply
44. June 10, 2015 at 11:20 am

    Tomi Engdahl says:

    A Computer That Operates On Water Droplets
    http://tech.slashdot.org/story/15/06/09/231207/a-computer-that-operates-on-water-droplets

    Okian Warrior notes a Stanford project to build a basic computer that operates on water droplets. One of its creators, Manu Prakash, says the goal is not to compete with digital computers for manipulating data (though they can theoretically perform all of the same computations). Instead, “Our goal is to build a completely new class of computers that can precisely control and manipulate physical matter”

    Just add water: Stanford engineers develop a computer that operates on water droplets
    http://news.stanford.edu/news/2015/june/computer-water-drops-060815.html

    “In this work, we finally demonstrate a synchronous, universal droplet logic and control,” Prakash said.

    “We already have digital computers to process information. Our goal is not to compete with electronic computers or to operate word processors on this,” Prakash said. “Our goal is to build a completely new class of computers that can precisely control and manipulate physical matter. Imagine if when you run a set of computations that not only information is processed but physical matter is algorithmically manipulated as well. We have just made this possible at the mesoscale.”

    The ability to precisely control droplets using fluidic computation could have a number of applications in high-throughput biology and chemistry, and possibly new applications in scalable digital manufacturing.

    Developing a clock for a fluid-based computer required some creative thinking. It needed to be easy to manipulate, and also able to influence multiple droplets at a time.

    Katsikis and Prakash built arrays of tiny iron bars on glass slides that look something like a Pac-Man maze.

    The current paper describes the fundamental operating regime of the system and demonstrates building blocks for synchronous logic gates, feedback and cascadability – hallmarks of scalable computation. A simple-state machine including 1-bit memory storage (known as “flip-flop”) is also demonstrated using the above basic building blocks.

    The current chips are about half the size of a postage stamp, and the droplets are smaller than poppy seeds, but Katsikis said that the physics of the system suggests it can be made even smaller. Combined with the fact that the magnetic field can control millions of droplets simultaneously, this makes the system exceptionally scalable.

    Reply
45. June 11, 2015 at 6:48 am

    Tomi Engdahl says:

    Google Smart Lens kicks off DAC 2015
    http://www.edn.com/electronics-blogs/benchtalk/4439661/Google-s-Smart-Lens-kicks-off-DAC-2015?_mc=NL_EDN_EDT_EDN_consumerelectronics_20150610&cid=NL_EDN_EDT_EDN_consumerelectronics_20150610&elq=3d5cd72611e141ff8b4dede809b907ec&elqCampaignId=23401&elqaid=26378&elqat=1&elqTrackId=b1c65170173646e78c8ce94d89d0e5cf

    This year’s Design Automation Conference (DAC) kicked off in San Francisco this week with a keynote on the Google Smart Lens, Apple Watch and quadcopter teardowns, and even a Tesla.

    The DAC keynote series stared out with an impressive “X” project presentation by Google: their Smart Lens project. Smart Lens builds a blood glucose monitor/logger into a disposable contact lens! We’re living in the future.

    Google’s Brian Otis explained that current invasive monitoring methods are only used by the relatively small number of people who have type 1 or 2 diabetes, but many more could benefit

    The system employs RFID for comms between its SoC and a reader, but is powered from a local micro battery

    Google is already looking forward to other possible systems, such as auto-focusing lenses, given that only 3% of the contact lens is needed by the blood glucose monitor.

    On-chip networking

    I learned a bit about Sonics’ on-chip networking IP. There have always been traditional on-chip busses of course, but the complexity of today’s larger SoCs often requires a more sophisticated solution. These interconnects are highly configurable in terms of width, speed, security, and many other parameters. EDN will try to take a closer look soon.

    iFixit did live teardowns of the Apple Watch and the DJI Phantom 3 Pro drone.

    Reply
46. June 11, 2015 at 9:27 am

    Tomi Engdahl says:

    LTC2348-18 – Octal, 18-Bit, 200ksps Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range
    http://www.linear.com/product/LTC2348-18

    Reply
47. June 11, 2015 at 10:07 am

    Tomi Engdahl says:

    FD-SOI Development as a Service
    http://www.eetimes.com/document.asp?doc_id=1326827&amp;

    CEA-Leti announced its partners for its Silicon Impulse FD-SOI development program, with the goal to broaden the use of FD-SOI for low-power applications.

    The development program is aimed to provide participants with a comprehensive IC technology platform complete with IC design, advanced intellectual property, emulator and test services along with industrial multi-project wafer (MPW) shuttles.

    Announced at DAC together with initial partners Presto Engineering, Cortus, Mentor Graphics, CMP, STMicroelectronics, Dolphin Integration and CEA-List, the collaborative design platform includes a network of design services and facilities focused on accelerating development of products for today’s and tomorrows devices that require low-power use.

    Reply
48. June 11, 2015 at 10:53 am

    Tomi Engdahl says:

    Intel Memo on Layoffs Reported
    $300M savings sought amid PC declines
    http://www.eetimes.com/document.asp?doc_id=1326837&amp;

    Intel may cut an untold number of research an administration positions, according to an internal memo obtained by The Oregonian/OregonLive. Following a reduced revenue outlook for 2015, the chip company could aim to cut its budget by $300 million.

    The memo was distributed to Intel managers and stated that the company will “prioritize investments, slow down hiring, and drive other efficiencies, including a performance-based involuntary separation package.” Cuts will begin June 15 and conclude one month later for an unspecified number of people, the Oregonian reported. Intel has roughly 106,000 employees worldwide.

    Intel declined to comment on the layoffs.

    Intel had projected 5% growth in 2015 but realigned that forecast in April to expect a flat revenue year. Market watchers say the PC market’s decline is continuing, and Intel’s spending has been 6-10% ahead of its model for more than a year.

    Reply
49. June 11, 2015 at 11:02 am

    Tomi Engdahl says:

    Digital oscilloscopes decode 8b/10b buses
    http://www.edn.com/electronics-products/other/4439652/Digital-oscilloscopes-decode-8b-10b-buses?_mc=NL_EDN_EDT_EDN_today_20150610&cid=NL_EDN_EDT_EDN_today_20150610&elq=2e3ba3a2479b493cabe1db866ca80708&elqCampaignId=23388&elqaid=26365&elqat=1&elqTrackId=a01157341f1744139d56e1f36d40d384

    A software option for the Rohde & Schwarz RTO series of digital oscilloscopes enables developers to design, verify, and debug modules with 8b/10b encoded buses, while an autoset function determines the channel, decision level, and bit rate settings at the push of a button. 8b/10b encoded buses are used in USB 3.0 and PCIe interfaces, as well as MIPI UniPro M-PHY interfaces in smart phones, HDMI display interfaces, and CPRI base stations.

    Multichannel models in the RTO series have an analog bandwidth ranging from 600 MHz to 4 GHz

    Reply
50. June 11, 2015 at 11:03 am

    Tomi Engdahl says:

    Reference designs ease IO-Link implementation
    http://www.edn.com/electronics-products/other/4439636/Reference-designs-ease-IO-Link-implementation?_mc=NL_EDN_EDT_EDN_today_20150610&cid=NL_EDN_EDT_EDN_today_20150610&elq=2e3ba3a2479b493cabe1db866ca80708&elqCampaignId=23388&elqaid=26365&elqat=1&elqTrackId=94c5b4b81d4d45aaa0038989d01181e1

    By supplying all the required hardware, cables, and software, Linear Technology’s DC2228A 8-port IO-Link master reference design and DC2227A device demonstration board enable engineers to quickly evaluate an end-to-end IO-Link V1.1 system. IO-Link is a bidirectional, digital, point-to-point communication standard (IEC 61131-9) that allows smart sensors and actuators to exchange advanced configuration, status, and diagnostic information with a controller in an industrial network.

    Reply