Electronics trends for 2017

 

Chip Market Brightens in 2017. The semiconductor industry may yet have been flat in 2016, but expects it is expected that the electronics industry rebounds in 2017, probably in the first half. Wall Streeter predicts return to 5% growth. Total IC business growth is expected to be around five percents for few years to come.There seems to several promises to this direction, especially in memory business. Chips Execs See Maturing Industry article says that pessimism about immediate revenue and R&D growth is a sign of a maturing industry.

Thanks to both rising prices and volume sales, the memory sector is expected to lead overall semiconductor sales growth. Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. NAND flash will grow almost as fast at 10% next year. The average annual growth rate for the memory market is forecast to be 7.3% from 2016-2021. Every year we need 5.6% more bits than previous year, and the unit prices are increasing on both DRAM and Flash.

There will be also other growth sectors. The data center will be the fastest growth segment next year, rising 10%, followed by automotive at 9% and communications at 7%Consumer and industrial markets growing at about 4% in line with the overall industry. PCs will be the big drag on 2017, declining 2%.

China Dominates Planned Chip Fabs as more than 40% of front end semiconductor fabs scheduled to begin operation between 2017 and 2020 are in China, a clear indication that China’s long-stated ambition to build a significant domestic semiconductor industry is taking shape.

Trump Win Could Mean Big Questions for Manufacturing as while Trump vowed to keep American manufacturing jobs, he offered little in the way of stated policy other than the promise to punish companies that sent manufacturing job outside the US. Questions about trade also could directly affect US manufacturing. How that plays out is a big unknown.

Europe will try to advance chip manufacturing, but not much results in 2017 as currently  there is almost no leading-edge digital chip manufacturing left in Europe as the local companies have embraced outsourcing of digital semiconductor manufacturing to foundries. The European Commission intends to reconvene a high-level group of European CEOs and executives to exchange views on Europe’s 10/100/20 nanoelectronics and chip manufacturing project and make adjustments as necessary for a wave of European Union investment supposedly starting in 2020. The two most advanced wafer fab locations left in Europe in terms of deep sub-micron miniaturization belong to Intel in Leixlip, Ireland and Globalfoundries in Dresden, Germany.

Smaller geometries are to be taken into use and researched in 2017. Several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner. As TSMC, GF/Samsung Battle at 7nm the net result is in the course of 18 months chip designers will see at least three variants of 7nm — separate immersion variants from TSMC and Globalfoundries and the EUV version from GF/Samsung. Intel has yet to detail its 7nm node.

At the same time R&D has begun for 5nm and beyond, but Uncertainty Grows For 5nm, 3nm as costs are skyrocketing. Both 5nm and 3nm present a multitude of unknowns and challenges. To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. Etching Technology Advances as atomic layer etch (ALE) moves to the forefront of chip-making technology—finally. TSMC recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion targeted for TSMC’s 5nm and 3nm processes, which are due out in 2020 and 2022.

Moore’s Law continues to slow as process complexities and costs escalate at each node. Moore’s Law is dead, just not in the way everyone thinks. SiFive believes open source hardware is the way forward for the semiconductor industry.  Technological advances keep allowing chips to scale, but the economics are another story – particularly for smaller companies that can’t afford chips in the volumes. The solution, according to San Francisco-based startup, SiFive, is open-source hardware, specifically an architecture developed by the company’s founders called RISC-V (pronounced “risk-five”). Done right SiFive, which was awarded Startup of the Year at the 2016 Creativity in Electronics (ACE) Awards, believes that RISC-V will do for the hardware industry what Linux has done for software. For example 5th RISC-V Workshop Points to Growing Interest in the RISC-V Platform.

Sensors are hot in 2017. These tiny, powerful solutions are creating the interface between the analog and the digital world. Data is everywhere, and sensors are at the very heart of that. While no one really knows what technology’s next “killer application” will be, we are confident that any killer app will rely on sensors.Appliance autonomy promises to make life simpler, but this field has still lots of to improve even after year 2017.

Interface ICs will continue to help simplify high-bandwidth designs while making them more robust and reliable. Application areas that will benefit include automotive, communications, and industrial. Both wired and wireless interface solutions have plenty of applications.

Analog’s status is rising as more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. IoT pushes up demand for analog content and need for communication between these two worlds will continue to grow. Analog and digital always have fit rather uncomfortably together, and that discomfort has grown as SoCs are built using smaller feature sizes.  The demand for analog silicon has always existed in the embedded space, but the advent of the Internet of Things (IoT) is increasing the demand for connected mixed-signal contentAt 28nm and 16/14nm, standard “analog” IP includes a fair amount of digital content.

It seems that hardware designer is a disappearing resource and software is the king in 2017. It is becoming less and less relevant in what format the device is used in many applications. Card computers are standard products and are found in many different card formats that can be used in very many applications. Embedded development is changing to more and more coding. More software designers that understand some hardware are needed, but it is not easy to leap to move to the hardware to software.

The power electronics market is moving at very fast pace. Besides traditional industrial, renewable, and traction sectors, new applications such as energy-storage systems, micro-grids, and dc chargers are emerging. As the automotive world moves to electric vehicles, this creates challenges for IGBT and SiC-MOSFET ICs, and their associated gate drivers. New packages for high-voltage IGBTs and high-voltage SiC-MOSFETs are introduced.

More custom power distribution  and higher voltages on data center computer systems in 2017. OpenRack and OpenCompute projects are increasing the distribution voltage inside the server itself.  This approach, plus transitioning to new materials such as gallium nitride in the power-conversion systems, can reduce overall power consumption by 20% and increase server densities by 30-40%.”

Power Modules and Reference Designs will be looked at in 2017 even more than earlier in power electronics. The semiconductor and packaging technologies used in power modules have advanced considerably, and the industry is developing modules today that are denser, less expensive, and easier to use. Designers want to rely on power modules to speed up designs and optimize space using smaller, easy-to-use power modules. Module manufacturers hope that  engineers will increasingly choose a module over a discrete design in many applications.

The bi-directional DC/DC converter has been around for a while, but new applications are quickly emerging which necessitate the use of this architecture in so many more systems. Battery back-up systems need bi-directional DC/DC converters. Applications today require better energy efficiency and such systems as green power with solar or wind generation, need storage so that when there is no wind or sun available the electricity flow is not interrupted.

Power supplies need to become more efficient. Both European Union’s (EU) Code of Conduct (CoC) Tier 1 and CoC Tier 2 efficiency standards are to be taken into use. The European Union’s CoC Tier 1 effectively harmonizes the EU with US DoE Level VI and became effective as a voluntary requirement from January 2014, two years ahead of Level VI. Its adoption as an EU Ecodesign rule is currently under review to become law with an implementation date of January 2017. The key difference between the CoC requirements and Level VI is the new 10% load measure, which imposes efficiency requirements under a low-load condition where historically most types of power supplies have been notoriously inefficient. CoC Tier 2 further tightens the no-load and active mode power consumption limits.

During 2016, wireless-power applications started to pick up across many fields in the semiconductor industry, and it will continue to do so. Wireless power will continue to gain traction with increased consumer demand.  Hewlett Packard, Dell, jjPlus, and Witricity have already announced products based on Airfuel standards. And, products based upon the Qi standard will continue to grow at a rapid pace.

 

Other prediction articles:

In Power & Analog 2017 Forecast: What Experts Are Saying article representatives from major players in the semiconductor industry share their predictions for 2017 regarding power modules, wireless power, data converters, wireless sensing, and more.

Looking Ahead to 2017 article tells on to what SIA is focused on working with. “U.S. semiconductor technology should be viewed as a strategic national asset, and the Administration should take a holistic approach in adopting policies to strengthen this vital sector,” the letter says

Hot technologies: Looking ahead to 2017 article collection has EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.

 

1,115 Comments

  1. Tomi Engdahl says:

    GlobalFoundries has announced the availability of its 7nm Leading-Performance (7LP) finFET technology, delivering a 40% performance boost to meet the needs of applications such as mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

    Source: https://semiengineering.com/week-review-manufacturing-3/

    More:
    GLOBALFOUNDRIES on Track to Deliver Leading-Performance 7nm FinFET Technology
    https://www.globalfoundries.com/news-events/press-releases/globalfoundries-track-deliver-leading-performance-7nm-finfet-technology

    Santa Clara, Calif., June 13, 2017 – GLOBALFOUNDRIES today announced the availability of its 7nm Leading-Performance (7LP) FinFET semiconductor technology, delivering a 40 percent generational performance boost to meet the needs of applications such as premium mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

    In September 2016, GF announced plans to develop its own 7nm FinFET technology leveraging the company’s unmatched heritage of manufacturing high-performance chips.

    Reply
  2. Tomi Engdahl says:

    Research Program Seeks Advances in Wide-Bandgap Power Semiconductors
    http://www.powerelectronics.com/alternative-energy/research-program-seeks-advances-wide-bandgap-power-semiconductors?NL=ED-003&Issue=ED-003_20170619_ED-003_507&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=11649&utm_medium=email&elq2=7f7f97855d784b2e9a826e584ea53e50

    Pinpointing and developing new semiconductor materials, architectures, and fabrication processes is the charter of ARPA-E’s SWITCHES project

    The projects in ARPA-E’s SWITCHES—short for “Strategies for Wide-Bandgap, Inexpensive Transistors for Controlling High-Efficiency Systems”—program focus on developing next-generation power switching devices. Such devices could dramatically improve energy efficiency in a wide range of applications, including new lighting technologies, computer power supplies, industrial motor drives, and automobiles.

    SWITCHES projects aim to find innovative new WBG semiconductor materials, device architectures, and device-fabrication processes that will enable increased switching frequency, enhanced temperature control, and reduced power losses—all at substantially lower cost relative to today’s solutions.

    WBG semiconductors are capable of low-loss operation at high voltages (>1 kV to tens of kV), high frequencies (tens of kHz to tens of GHz), and high temperatures (>150°C).

    Power converters based on WBG devices can achieve higher efficiency as well as higher gravimetric and volumetric power-conversion densities.

    It’s possible that WBGs could eventually achieve functional cost parity with silicon power transistors. In addition, when compared with silicon power transistors, WBGs exhibit improved performance in terms of lower losses, higher switching frequencies, and higher temperature operation.

    Reply
  3. Tomi Engdahl says:

    Foundry Roadmaps: Real Solutions, Or Just Hedging?
    The array of options is mind-boggling.
    https://semiengineering.com/foundry-roadmaps-real-solutions-just-hedging/

    Major semiconductor foundries have revealed their advanced technology roadmaps for the next few years. They’re all investing billions of dollars into the development of process technologies and packaging options. The number of alternatives has been described as ‘dizzying’. How can all the foundries remain profitable? How does the customer decide which ‘route’ to take?

    For the 20-year period from the mid-1980s through the mid-2000s, process technology nodes were relatively easy to segment. Semico forecasted wafer demand into very clear process technology categories. Starting with the 45/40nm node in 2007, the two major logic manufacturers (Intel and TSMC) along with competing foundries began taking different paths. But the paths were still relatively clear. Intel rolled out their 45nm technology, and then TSMC rolled out their 40nm process. The foundries began to focus on low-power processes first. Then they followed up with their high-performance process several months to a quarter later.

    Today, in addition to the number of different nodes, the challenge includes Intel’s claim that their 10nm process is comparable to the 7nm offered by other foundries. Semico believes the matching of product needs with process performance and cost will dictate market acceptance, not the marketing claims of technology-naming convention.

    In addition to their 10nm processes already in production, Samsung plans to offer risk production of 8LPP this year, 7LPP in 2018, 6LPP and 5LPP in 2019 and 4LPP in 2020. Samsung also will continue to offer a fully depleted SOI process. In fact, their roadmap includes an 18FDS, to be released in 2019.

    Prior to Samsung’s Foundry Forum, TSMC provided a review of their process options at the TSMC Technology Symposium. In addition to 10nm being ramped this year, TSMC also has numerous new process technologies going back to 22nm and 12nm, as well as specialty processes for automotive, MEMS and CMOS image sensors.
    At the April 2017 Technology Forum, TSMC announced they had 12 tapeouts lined up for 7nm in 2017. They also announced 8 design wins for the 16FFC automotive platform.

    Most recently, GlobalFoundries announced the availability of its 7nm (7LP) FinFET semiconductor technology. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

    All three major foundries—TSMC, GF and Samsung—have publically addressed their rollout of EUV. In March 2017, TSMC provided their update on EUV showing successful, continuous throughput of 1400 wafers/day/machine at 125W source. They are confident that they will achieve acceptable throughput at 250W for their 7nm+ process. N7+ will include EUV layers and will be ready by 2018.

    Reply
  4. Tomi Engdahl says:

    Shrink Or Package?
    Advanced packaging shifts to mainstream with complete flows, better tools, market proof points.
    https://semiengineering.com/shrink-or-package/

    Advanced packaging is rapidly becoming a mainstream option for chipmakers as the cost of integrating heterogeneous components on a single die continues to rise.

    Despite several years of buzz around this shift, the reality is that it has taken more than a half-century to materialize. Advanced packaging began with IBM flip chips in the 1960s, and it got another boost with multi-chip modules in the 1990s, particularly for the mil/aero market. Still, it never became the first choice of commercial chipmakers because shrinking features was less expensive in terms of silicon area, the ecosystem of tools and IP was well established for scaling, and time-to-profitability was much better defined.

    The economics began changing significantly at 16/14nm with the introduction of finFETs and double patterning. Design and manufacturing costs are expected to rise at each new node after that. Shrinking features will require new materials at 5nm for contacts and possibly the interconnects, as well as new transistor structures at either 5nm or 3nm (most likely gate-all-around FETs). And then there is high-numerical-aperture EUV, and new etch, deposition and inspection equipment.

    Reply
  5. Tomi Engdahl says:

    Tech Talk: 7nm Power
    Dealing with thermal effects, electromigration and other issues at the most advanced nodes.
    https://semiengineering.com/tech-talk-7nm-power/

    Reply
  6. Tomi Engdahl says:

    25 Global Electronics Distributors Win Revenue Wresting Match
    http://www.eetimes.com/document.asp?doc_id=1331912&

    In the electronics world, things are changing, both in terms of business models and the competitive landscape. The top global electronics distributors are working to capture a point or two of growth and a bigger mindshare with customers. The Top 25 Global Franchised Electronics Distributors offers a glimpse at the current world.

    In many ways, the list has remained static. Only two companies moved more than a single spot in the listing and the top seven remained wholly unchanged.

    Reply
  7. Tomi Engdahl says:

    64 Layers is 3D NAND’s Sweet Spot
    http://www.eetimes.com/document.asp?doc_id=1331911&

    Siva Sivaram can only speak for Western Digital, but he sees 64-layer 3D NAND as crossing the threshold to being more cost effective than planar NAND.

    Reply
  8. Tomi Engdahl says:

    Memory/Selector Elements for Intel Optane XPoint Memory
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1331865&

    TechInsights continues to dig into the process, cell structure and materials analysis of the Intel Optane XPoint memory.

    Further analysis by TechInsights has determined that the Intel Optane XPoint memory die has a 128 Gb/die which is quite a bit lower memory density than the current 3D TLC NAND products, as shown in Figure 1. Memory density per die is 2.28 Gb/mm2 for Micron 32L 3D FG CuA TLC NAND, 2.57 Gb/mm2 for Samsung 48L TLC V-NAND, 2.43 Gb/mm2 for Toshiba/WD 48L BiCS TLC NAND, and 1.45 Gb/mm2 SK Hynix 36L P-BiCS MLC NAND. By comparison, the Intel Optane XPoint has 0.62 Gb/mm2.

    Reply
  9. Tomi Engdahl says:

    Bosch Plans $1.1 Billion Fab in Dresden
    http://www.eetimes.com/document.asp?doc_id=1331915&

    Robert Bosch GmbH will spend roughly one billion euro (about $1.1 billion) to build a 300-mm wafer fab in Dresden, Germany, the company said Monday (June 19), confirming German media reports that have been circulating for more than a week.

    Bosch (Stuttgart, Germany) said construction of the fab should be completed by the end of 2019. Manufacturing operations are predicted to begin in 2021.

    Building the fab ranks as the single biggest investment in the more than 130-year history of the company, according to Volkmar Denner, chairman of Boch’s board of management.

    Bosch is the world’s leading supplier of microelectrical mechanical systems (MEMS) sales, with 2016 MEMS sales of about $1.16 billion, according to market research firm Yole Developpement. Bosch says it currently builds about 4 million MEMS sensor a day at its fab in Reutlingen, Germany, as well as 1.5 million ASICs. Seventy-five percent of Bosch MEMS sensors are used in communications and consumer electronics, Bosch said.

    Reply
  10. Tomi Engdahl says:

    Amplifier Powers an Octave with 80% Average Efficiency
    http://www.mwrf.com/components/amplifier-powers-octave-80-average-efficiency?NL=MWRF-001&Issue=MWRF-001_20170620_MWRF-001_55&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=11663&utm_medium=email&elq2=133ed91204f14136a81454bcf9b54e36

    This extended continuous Class F−1 power amplifier provides more than 8 W output power from 1.0 to 1.9 GHz with outstanding drain efficiency.

    Efficiency is one of the most sought-after parameters in RF power amplifier (PA) design, since it translates directly to power consumption and operating cost. In continuous inverse Class F (CCF−1) PAs, the current waveform factor, δ, plays a major role in achieving high drain efficiency. With a modified lowpass output matching network (OMN), it is possible to constrain δ to a limited range high drain efficiency even when operating a PA with broadband frequency coverage. The approach was demonstrated in a an easy-to-implement PA design that operates from 1.0 to 1.9 GHz (a fractional bandwidth of 62%) that achieves +39.8 to +42.0 dBm output power across the frequency band with drain efficiency of 75.8 to 84.5% (average drain efficiency of 80%).

    High-efficiency PAs are important components in modern communications systems, particularly when broadband frequency coverage and high-data-rate performance are required.1 Classic harmonic tuned PAs, such as Class E amplifiers or those operating in Class F mode2 or inverted Class F (F−1) mode typically operate with high efficiency but limited bandwidths. To extend the bandwidth of high-efficiency amplifiers, a continuous working mode was proposed by Steve Cripps in 2009, with additional concepts introduced more recently, including Class B/F mode,3 continuous Class F mode,4 and continuous Class F−1 mode.5

    These continuous working modes require that second-harmonic loads are tuned to the edge of the Smith chart, which is an almost impossible condition to meet across a broad frequency range.

    Reply
  11. Tomi Engdahl says:

    SoftBank Acquires Boston Dynamics and Schaft from Google
    https://www.designnews.com/electronics-test/softbank-acquires-boston-dynamics-and-schaft-google/26088488756988?cid=nl.x.dn14.edt.aud.dn.20170620.tst004t

    In a move to boost its position as a developer of advanced robotics, Japanese technology company SoftBank has entered a deal to acquire two robotics companies from Google, including robotics pioneer Boston Dynamics.

    Reply
  12. Tomi Engdahl says:

    NAND Market Hits Speed Bump
    https://semiengineering.com/nand-market-hits-speed-bump/

    Transition from planar to 3D NAND is harder and more time-consuming than expected.

    Demand for NAND flash memory remains robust due to the onslaught of data in systems, but the overall NAND flash market is stuck in the middle of a challenging period beset by product shortages, supply chain issues and a difficult technology transition.

    Reply
  13. Tomi Engdahl says:

    Japan-led Consortium Wins Toshiba Memory Bidding
    http://www.eetimes.com/document.asp?doc_id=1331923&

    Toshiba Corp. announced Wednesday (June 21) that is board of directors selected a consortium made up of the Innovation Network Corporation of Japan (INCJ), Bain Capital and the Development Bank of Japan as its preferred bidder for its memory chip spinoff, Toshiba Memory Corp.

    Toshiba said the board determined that the consortium presented the best acquisition proposal based on valuation, certainty of closing and retention of employees. Toshiba also said the consortium’s bid would retain sensitive technology within Japan.

    Toshiba didn’t say how much the consortium’s bid was worth. Media outlets have reported that the consortium’s bid was in excess of the $18 billion minimum that Toshiba had set.

    Reply
  14. Tomi Engdahl says:

    $6,000 of Electronics in Car by 2022
    http://www.eetimes.com/author.asp?section_id=36&doc_id=1331919&

    Market researchers predict a high-end car will contain more than $6,000 worth of electronics in five years, driving a $160 billion automotive electronics market in 2022.

    That’s the forecast of Luca De Ambroggi, principal analyst for automotive electronics at IHS Markit, predicting almost all the electronics in a car undergo massive change.

    The market for automotive semiconductors will rise more than seven percent through 2022, IHS forecasts. It will outpacing the 4.5% growth of automotive electronic systems in general, and the 2.4% growth in vehicle units over that period, as the sector adds significant software value, said De Ambroggi who will speak on the topic at SEMICON West (July 11-13 in San Francisco).

    Reply
  15. Tomi Engdahl says:

    Siemens Lays Out Vision for Mentor
    http://www.eetimes.com/document.asp?doc_id=1331922

    When Siemens AG agreed last November to buy Mentor Graphics Corp. for $4.5 billion, it wasn’t the first time that the German conglomerate had entertained the idea of swallowing the Portland, Ore.-based EDA software vendor.

    Turns out that the two companies had had what executives termed a “fly by” some nine years before. When rival Cadence Design Systems Inc. launched a hostile takeover attempt of Mentor in 2008, Siemens was one of several potential white knight acquirers that CEO Walden Rhines reached out to.

    “This idea of putting two companies like us together has been in my head for 20 years,” Grindstaff said during an interview with trade press editors at the Design Automation Conference (DAC) here Tuesday (June 20). He added that it was just a matter of waiting for the technologies to evolve to the point where the disruption in the marketplace caused by such a deal would be manageable compared with what could be gained from the synergies involved.

    During the meeting with the press and a keynote address earlier in the morning, Grindstaff made a persuasive case for the combination of the two firms at a time when Siemens PLM customers—mostly system vendors from across various industies—are increasingly designing their own chips for inclusion in their products.

    “A lot of stuff is getting connected together,” he said. “It’s getting connected because of a change in the way products are designed. Many systems companies around the world are becoming chip designers.”

    Later, he said, “The driving force behind the acquisition has to do with the speed of change and where many of our customers are in the cycle.”

    Grindstaff explained that, rather than “inch its way up” to be closer to chip level design, Siemens wanted to get there in one fell swoop by buying a company with strong knowledge and history in the IC space, he said. “We wanted to get on the far end of that [chip design] spectrum,” he said.

    Reply
  16. Tomi Engdahl says:

    Kate Holton / Reuters:
    Imagination Technologies puts itself up for sale after dispute with Apple over licensing rights, says “it has received interest from a number of parties” — Imagination Technologies (IMG.L), the British company in dispute with its biggest customer Apple (AAPL.O) over licensing rights …

    Imagination Tech up for sale after bruising Apple fight
    http://www.reuters.com/article/us-imagination-tech-apple-sale-idUSKBN19D0H8

    Imagination Technologies, the British firm that lost 70 percent of its value after being ditched by its biggest customer Apple, put itself up for sale on Thursday in a disappointing end to a once-great European tech success story.

    Founded in 1985 and listed in 1994, Imagination has been rocked by Apple’s announcement in April that it was developing its own graphics chips and would no longer use Imagination’s processing designs in 15 months to two years time.

    Apple’s decision, which analysts said posed an existential threat to the company, sent Imagination’s shares plummeting 70 percent on April 3 and they have barely recovered since.

    Reply
  17. Tomi Engdahl says:

    Ericsson gives up power modules

    Ericsson has decided to sell its power modules business.

    The Flex Power division of Flextronics, a contract manufacturer of electronics, is now a buyer who, as part of its business, will expand its offer of design services. The purchase price companies have not disclosed.

    The abandonment of power modules is in line with Ericsson’s new strategy, where the company focuses on networking business and related services.

    Source:
    Ericsson luopuu tehomoduuleista
    http://www.etn.fi/index.php/13-news/6519-ericsson-luopuu-tehomoduuleista

    Reply
  18. Tomi Engdahl says:

    Intel has been the world’s largest semiconductor company since 1993, when it announced its first Pentium processors. According to the latest statistics, Samsung’s semiconductor sales surpass Intel in the first quarter of this year.

    In April-June, Samsung’s net sales grew to $ 15.1 billion in semiconductors. At the same time, Intel’s sales were about $ 14.4 billion. Thus, Intel did not reach Texas Instruments’ previous achievements, or 25 years of dominant semiconductor industry.

    IC Insights estimates that Samsung will retain its top position at least this year. Sales of PC processors are not recovering and on the other hand, the new iPhone will again increase Samsung’s memory circuitry.

    Source: http://www.etn.fi/index.php/13-news/6525-historiallinen-kaanne-samsung-ohittaa-intelin#ETNartikel

    Reply
  19. Tomi Engdahl says:

    Makiko Yamazaki / Reuters:
    Toshiba misses self-imposed deadline for chip unit sale, sues Western Digital for $1B for interfering with the sale process

    Toshiba misses self-imposed deadline for chip unit sale, sues Western Digital
    http://www.reuters.com/article/us-toshiba-accounting-idUSKBN19I308

    Japan’s Toshiba Corp (6502.T) has pushed back its timeline to clinch a sale of its prized flash memory chip unit, saying the $18 billion deal was being held up due to differences of opinion within the consortium chosen as preferred bidder.

    The delay came as the conglomerate sued its chip business partner Western Digital Corp (WDC.O) for interfering in the sale

    Toshiba argues that Western Digital’s bid for the memory unit presents anti-trust issues and is too low in price.

    Western Digital declined to comment on the lawsuit.

    Reply
  20. Tomi Engdahl says:

    Time matters: Combating demanding engineering design schedules
    http://www.eetimes.com/document.asp?doc_id=1331873&

    Engineers and designers always seem to be battling the clock in their efforts to be innovative and win the race to market with cost-effective solutions. Sometimes, though, things just don’t work out the way they should.

    Engineers and designers fully expect changes to be made to their designs, often involving sourced components. It’s through rigorous engineering testing and prototypes that excellent products are brought to market. If, however, it’s not done efficiently, you can be wasting your time or your team’s time while waiting on a component to be delivered to fix any issues that arise.

    An Engineering Change Order is a common way to document changes that need to be made in the design. An ECO can be driven by a number of factors, including:

    An error in a design doesn’t show up until testing or a customer provides feedback.
    The customer may change a requirement, which means a redesign may be in order.
    There could be changes in materials or how it was to be manufactured.

    Reply
  21. Tomi Engdahl says:

    ARM SoCs Take Soft Roads to Neural Nets
    NXP, Q’comm tap inference libraries, extensions
    http://www.eetimes.com/document.asp?doc_id=1331963

    NXP is supporting inference jobs such as image recognition in software on its i.MX8 processor. It aims to extend its approach for natural-language processing later this year, claiming that dedicated hardware is not required in resource-constrained systems.

    The chip vendor is following in the footsteps of its merger partner, Qualcomm. However, the mobile giant expects to eventually augment its code with dedicated hardware. Their shared IP partner, ARM, is developing neural networking libraries for its cores, although it declined an interview for this article.

    NXP’s i.MX8 packs two GPU cores from Vivante, now part of Verisilicon. They use about 20 opcodes that support multiply-accumulates and bit extraction and replacement, originally geared for running computer vision.

    Reply
  22. Tomi Engdahl says:

    ‘Europe First’ Emerges as Theme of Tech Reboot
    http://www.eetimes.com/document.asp?doc_id=1331964

    More and more, the motto of the European microelectronics industry, including its semiconductor manufacturing reboot, has become “Europe First.”

    The joint collaboration agreement announced by Europe’s two large research institutes — CEA-Leti (Grenoble) and Fraunhofer Group (Berlin) — here this week has amplified an upbeat “pro-Europe” sentiment. As Leti hosted its 50th anniversary, the heads of the two research and technology organizations sealed a deal and discussed plans to work together, aligning their microelectronics innovation agenda in Europe.

    Marie-Noëlle Semeria, Leti’s CEO, told reporters, “By putting European large projects under a single roof, we can go faster [with our R&D], together.”

    For non-Europeans, obtaining from the EU an IPCEI badge sounds like bureaucratic wheel-spinning. It is, however, a critical step, issuing to a transnational project a free pass to state aid without breaking EU financing rules. It’s all about fostering growth and competitiveness in the EU.

    Reply
  23. Tomi Engdahl says:

    13 Views of Sensors Expo 2017
    Portable radar runs on a smartphone
    http://www.eetimes.com/document.asp?doc_id=1331965

    This year’s Sensors Expo showed the continuing fan out of new technologies seeking real markets in sensors and the networks connecting them.

    Among more than 220 exhibitors, we met Rob Frizzell (below) chief executive of OmniPresense, pioneering a market for short-range radar. “No one was looking at radar as a sensor, there is just one other radar company here as far as I can see,” said Frizzell, co-founder of the self-funded startup based here.

    The company used off-the-shelf chips to design a 24 GHz radar module that can run off a smartphone’s USB jack. It draws up to 1.4W active, costs $169 and can track a person up to five meters or a car up to 10 meters.

    Reply
  24. Tomi Engdahl says:

    Embedded MRAM Can Take the Heat
    http://www.eetimes.com/document.asp?doc_id=1331958&

    On the heels of several foundries publicly announcing plans to put MRAM into production by the end of this year and into 2018, one of them has outlined how it can significantly improve data retention for embedded applications.

    At the recent 2017 International Symposium on VLSI Technology, Systems and Applications in Japan, Globalfoundries outlined in a technical paper Everspin Technologies’ progress with moving embedded MRAM (eMRAM) forward into the 22nm process node.

    In a telephone interview with EE Times, Dave Eggleston Globalfoundries’ vice president of embedded memory, said the key breakthrough highlighted in the paper is the ability for eMRAM to retain data through solder reflow at 260 degrees Celsius, and for more than 10 years at 125 degrees Celsius, plus read/write with outstanding endurance at 125 degrees Celsius. This will enable eMRAM to be used for general purpose MCUs and automotive SOCs, he said. “The thermal stability has not been there for the magnetic layers. If you solve that data retention problem then it opens up much wider markets,” he added.

    Reply
  25. Tomi Engdahl says:

    This is the next step in circuit technology: eFPGA

    As we step into a new era, the next logical step seems to be to combine an FPGA chip with a processor or CPU: embedded FPGA.

    FPGA and CPU integration

    There is obviously an inevitable in-field integration of the CPU and FPGA matrix. The ongoing work with Intel and Microsoft illustrates the complementary nature of CPU and FPGA technologies.

    Intel bought Altera for nearly $ 17 billion to develop modules that use both Altera FPGAs and Intel microprocessors to accelerate data center functionality. Microsoft’s Catapult program, on the other hand, argues that data center servers could double their computing capacity if the FPGA chip was integrated into each server to accelerate Bing searches, Azure cloud services, and Microsoft 365 office applications.

    This need for better performance, lower costs, and lower power consumption demonstrates a lot of faith in these artifacts. It is therefore inevitable that these two architectures will begin to unite in the same circuit in which the FPGA matrix is ​​integrated into the CPU as IP blocks to improve performance.

    Embedded FPGA era

    One can safely say that the integration of the FPGA partition into the system circuits is the natural development of system integration in microelectronics. For this reason, Achronix has developed an embedded Speedcore FPGA (Embedded FPGA), which allows SoC designers to define the optimum size, power consumption, and resource configuration required by their own application for the FPGA block. Speedcore users can define the number of LUT lookups, embedded memory blocks, and DSP blocks, and define Speedcore elements, IO port connections, and, in general, make certain compromises between power consumption and performance

    Source: http://www.etn.fi/index.php/kolumni/6531-tama-on-seuraava-askel-piiritekniikassa-efpga

    Reply
  26. Tomi Engdahl says:

    Batteries that “drink” seawater could power long-range underwater vehicles
    Startup’s novel aluminum batteries increase the range of UUVs tenfold.
    http://news.mit.edu/2017/batteries-drink-seawater-long-range-autonomous-underwater-vehicles-0615

    The long range of airborne drones helps them perform critical tasks in the skies. Now MIT spinout Open Water Power (OWP) aims to greatly improve the range of unpiloted underwater vehicles (UUVs), helping them better perform in a range of applications under the sea.

    Recently acquired by major tech firm L3 Technologies, OWP has developed a novel aluminum-water power system that’s safer and more durable, and that gives UUVs a tenfold increase in range over traditional lithium-ion batteries used for the same applications.

    The power systems could find a wide range of uses, including helping UUVs dive deeper, for longer periods of time, into the ocean’s abyss to explore ship wreckages, map the ocean floor, and conduct research. They could also be used for long-range oil prospecting out at sea and various military applications.

    Most UUVs use lithium-based batteries, which have several issues. They’re known to catch fire, for one thing, so UUV-sized batteries are generally not shippable by air. Also, their energy density is limited

    In contrast, OWP’s power system is safer, cheaper, and longer-lasting. It consists of a alloyed aluminum, a cathode alloyed with a combination of elements (primarily nickel), and an alkaline electrolyte that’s positioned between the electrodes.

    When a UUV equipped with the power system is placed in the ocean, sea water is pulled into the battery, and is split at the cathode into hydroxide anions and hydrogen gas.

    Components are only activated when flooded with water. Once the aluminum anode corrodes, it can be replaced at low cost.

    OpenWater Power
    http://openwaterpower.com/

    Open Water Power has developed a novel aluminum-water platform technology for undersea power generation. Invented and patented by our founders at MIT, the electrochemical system provides safe, scalable & non-toxic energy storage with extremely high energy density, promising a 10x improvement in the endurance of Unmanned Underwater Vehicles (UUVs) and sensors.

    Open Water’s core chemistry is fully developed. We have run large-scale cells for over a week and smaller-scale low-power cells for months. Our focus now is on systems integration: building full-up power solutions for extant platforms and fielding them (e.g. man-portable UUVs, ocean-floor sensors, and sonobuoys). In this light we say that our Technology Readiness Level is TRL 6 on a cell level and TRL 4 on a system level.

    We have demonstrated cell-level energy densities in excess of 2.0 kWh/L and sustained power densities of up to 35 W/L, with higher power available in bursts.

    Open Water holds a prime contract with the US Department of Defense to develop power systems for man-portable UUVs.

    Reply
  27. Tomi Engdahl says:

    SoftBank Acquires Boston Dynamics and Schaft from Google
    https://www.designnews.com/electronics-test/softbank-acquires-boston-dynamics-and-schaft-google/26088488756988?cid=nl.x.dn14.edt.aud.dn.20170623.tst004t

    In a move to boost its position as a developer of advanced robotics, Japanese technology company SoftBank has entered a deal to acquire two robotics companies from Google, including robotics pioneer Boston Dynamics.

    Reply
  28. Tomi Engdahl says:

    The Week In Review: Manufacturing
    3D NAND dispute; AI FD-SOI; finding defects; DRAM, NOR shortages.
    https://semiengineering.com/week-review-manufacturing-5/

    Toshiba and its fab partner, Western Digital, have jointly rolled out a 96-layer 3D NAND product amid a legal dispute. The companies have developed prototype samples of a 96-layer 3D NAND device.

    As reported, Toshiba recently selected a group to buy its memory business. The consortium includes the Innovation Network Corp. of Japan, the Development Bank of Japan and Bain Capital. Rival SK Hynix is also part of the group. Meanwhile, Western Digital attempted but failed to buy the unit, and is now trying to block the deal.

    Intel has delivered a 64-layer, 3D NAND-based solid state drive (SSD).

    Amid shortages of DRAMs in the market, DRAMeXchange estimates that the overall ASP of DRAM products will rise by about 5% in the third quarter compared with the second quarter. “Although the end demand, particularly from the smartphone market, has not been strong this year, the general pace of manufacturing technology migration has been slow and is contributing to the tightening of supply,” said Avril Wu, research director of DRAMeXchange. “This situation is anticipated to last to 2018 since suppliers will not take on significant additional production capacity in the short term. Meanwhile, ASPs of various DRAM products will remain high.”

    NOR flash supply will also remain tight. DRAMeXchange estimates that prices of NOR flash will rise by about 20% sequentially in the third quarter due to supply scarcity.

    Reply
  29. Tomi Engdahl says:

    Low-Noise Integrated PLL Synthesizes 10 MHz to 15 GHz
    http://www.mwrf.com/systems/low-noise-integrated-pll-synthesizes-10-mhz-15-ghz

    This compact PLL works with a wide range of reference input signals to generate wideband output signals that are low in harmonics, spurious, and phase noise.

    Many systems require clean stable RF/microwave signals with programmable control. The LMX2594 phase-locked loop (PLL) frequency synthesizer from Texas Instruments provides the performance and flexibility from 10 MHz to 15 GHz that is as well suited to commercial communications as to military radar systems. It has an integrated voltage-controlled oscillator (VCO) and can generate output frequencies over that broad range with minimal spurious content and low phase noise.

    The PLL has integer-N and 32-b fractional-N division modes with high phase-detector frequencies (400 MHz in integer-N mode and 300 MHz in fractional-N mode) that yield stable output signals with excellent spectral purity.

    The LMX2594 (see photo) packs the VCO, programmable multipliers, dividers, multiplexers, and various control circuits into a 40-pin VQFN package that measures only 6.00 × 6.00 mm and runs on a single +3.3 V dc supply. It can operate with reference input signal frequencies from 5 to 1,400 MHz.

    To meet critical synchronization requirements, the root-mean-square (RMS) jitter is a low 45 fs offset 100 Hz to 100 MHz from a 7.5-GHz carrier.

    http://www.ti.com/product/LMX2594

    Reply
  30. Tomi Engdahl says:

    High-current regulator accepts 48 V input
    http://www.edn.com/electronics-products/other/4458551/High-current-regulator-accepts-48-V-input

    The latest addition to Vicor’s Cool-Power ZVS buck regulator portfolio, the PI3526-00-LGIZ supplies up to 18 A of output current. This range extension enables scalable power options for 48 V direct to point-of-load applications, such as lighting, communications, automotive equipment, and data centers.

    Housed in a compact 10×14-mm LGA SIP, the PI3526-00-LGIZ buck regulator integrates a controller, power switches, and support components. It requires only an output inductor and minimal passives for a cost-effective DC/DC switch-mode design that consumes less than 740 mm2 of board real estate. At 252 W, the PI352X portfolio extends performance by delivering twice the power of PI354X regulators using only a 40% larger package.

    http://www.vicorpower.com/products?productType=cfg&productKey=PI3526-00-LGIZ

    Reply
  31. Tomi Engdahl says:

    Charge Pump DC/DC Controller IC Eliminates Magnetics, Configures Bus Converter
    http://www.powerelectronics.com/power-management/charge-pump-dcdc-controller-ic-eliminates-magnetics-configures-bus-converter?NL=ED-003&Issue=ED-003_20170626_ED-003_87&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=11749&utm_medium=email&elq2=b69bbb711e3d4638acf867e848c8db02

    A charge pump DC/DC controller IC and four external MOSFETS eliminate magnetic components in a non-isolated intermediate bus converter (IBC). The combination provides 2:1 step-down ratio,1:2 step-up ratio, or 1: –1 ratio as an inverter.

    Linear Technology’s LTC7820 is a high-power fixed-ratio charge pump dc/dc controller IC that eliminates the need for any magnetic component in a non-isolated intermediate bus converter (IBC). This provides up to a 50% reduction in circuit size and up to 4000W/in.3 power density (Fig. 1). Additional features include soft switching for low EMI, a “power good” output signal, undervoltage lockout, and internal charge balance circuitry. The LTC7820 is available in a 4mm × 5mm QFN-28 package. Extended and industrial temperature versions are available from –40 to 125°C.

    The IC does not regulate the output voltage with a closed-loop feedback system. However, it stops switching when fault conditions occur

    This IC operates over a 6V to 72V (80V max.) input voltage range and can produce output currents in the 10s of amps, depending on the topology and choice of external components.

    You can configure the LTC7820 for:

    2:1 step-down ratio for VIN up to 72V
    1:2 step-up ratio for VINUp to 36V
    1: –1 ratio as an inverter from VIN up to 36V

    In addition, you can cascade two LTC7820s for a 4:1 step-down ratio.

    For even higher step-down ratios, such as a 6:1, the Dickson converter topology is recommended and is ideal for 54V input to a 9V outputs, requiring only a single LTC7820.

    http://sourceesb.com/parts/search?q=ltc+7820

    Reply
  32. Tomi Engdahl says:

    IBM uses EUV lithography to reach 5 nm semiconductor node
    http://www.laserfocusworld.com/articles/2017/06/ibm-uses-euv-lithography-to-reach-5-nm-semiconductor-node.html?cmpid=enl_lfw_lfwlasersourcesnewsletter_2017-06-22

    IBM (NYSE: IBM; Albany, NY) and its Research Alliance partners GLOBALFOUNDRIES, Samsung, and equipment suppliers have developed a process to build silicon nanosheet transistors that will enable 5 nm semiconductor chips. In less than two years since developing a 7 nm test node chip with 20 billion transistors, scientists have paved the way for 30 billion switches on a fingernail-sized chip.

    Scientists working as part of the IBM-led Research Alliance at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY achieved the breakthrough by using stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology.

    Compared to the leading edge 10nm technology available in the market, a nanosheet-based 5nm technology can deliver 40% performance enhancement at fixed power, or 75% power savings at matched performance. This improvement enables a significant boost to meeting the future demands of artificial intelligence (AI) systems, virtual reality and mobile devices.

    IBM Research has explored nanosheet semiconductor technology for more than 10 years. This work is the first in the industry to demonstrate the feasibility to design and fabricate stacked nanosheet devices with electrical properties superior to FinFET architecture.

    This same Extreme Ultraviolet (EUV) lithography approach used to produce the 7nm test node and its 20 billion transistors was applied to the nanosheet transistor architecture. Using EUV lithography, the width of the nanosheets can be adjusted continuously, all within a single manufacturing process or chip design.

    Reply
  33. Tomi Engdahl says:

    ReRAM Goes 3D
    http://www.eetimes.com/document.asp?doc_id=1331966&

    Resistive random-access memories (ReRAMs) are a new breed of “universal” memory that could replace all other types, offering the speed of RAM but with the density and non-volatility of flash. To date, however, flash has managed to stay ahead of ReRAM by going 3D. Now the Moscow Institute of Physics and Technology (MIPT) says it has reengineered its ReRAM process to achieve a thin-film technique that is amenable to 3D stacking.

    All ReRAMs work using memristors, in which migrating oxygen vacancies in the dielectric layer change the dielectric’s resistance to represent ones and zeros. In addition to MIPT, researchers from 4DS Memory Ltd., Crossbar Inc., HP Inc., Knowm Inc., and Rice University have created prototypes.

    For 3D ReRAMs, “we needed not only to form oxygen vacancies in the dielectric layer, but also to detect them,”

    Reply
  34. Tomi Engdahl says:

    Tight Memory Supply Drives Micron’s Record Sales
    http://www.eetimes.com/document.asp?doc_id=1331967&

    Micron Technology continues to build on a momentum that started late last year with a strong fiscal third quarter, ended June 1.

    Revenues for the quarter were a record $5.57 billion. That’s 20 percent higher compared to the previous quarter and 92 percent higher compared to the third quarter of fiscal 2016.

    Micron’s compute and networking business unit saw a significant increase demand, in part due to increased enterprise demand as analytics and in-memory data processing pushed up DRAM content, while revenue from cloud customers was four times higher year over year.

    Reply
  35. Tomi Engdahl says:

    The Search for the Next Super Material
    Graphene was considered important enough that its inventors received a Nobel Prize. Now the search is on for other 2D wonder materials.
    https://www.designnews.com/electronics-test/search-next-super-material/128729644757012?cid=nl.x.dn14.edt.aud.dn.20170622.tst004t

    Reply
  36. Tomi Engdahl says:

    RIGOL Announces new Custom Chipset and Oscilloscope Architecture
    https://www.rigolna.com/news/2017/00001735/

    Beaverton, OR – June 23, 2017 – Today RIGOL Technologies continues its 19 year history of Test and Measurement innovation with the announcement of its new Phoenix Oscilloscope chipset and the Ultravision II oscilloscope architecture. These technology innovations, years in development, will help transform the RIGOL portfolio allowing RIGOL to address the needs of higher performance applications.

    There are three chips in the Phoenix chipset (each named after stars in the Phoenix Constellation). The Analog Front End Chip (named Beta Phoenicis) will allow for front end bandwidth of 4GHz with highly integrated capability allowing for simplified and highly reliable front end design. The Signal Processing Chip (named Ankaa) supports 10GSa/s sampling with bandwidth up to 6GHz and the Probe Amplifier Chip (named Gamma Phoenicis) will support a 6GHz Active Differential probe. The ASICs are based entirely on RIGOL IP and were developed entirely inhouse.

    “Over the past 19 years RIGOL has proven ourselves to be an innovator in the Basic and Value segments of the Oscilloscope market” stated Rico Wang, President of RIGOL Technologies, “but with the introduction of this new chip set, developed through years of painstaking research and development, RIGOL will now be able to bring the RIGOL value proposition to more performance oriented applications.”

    At the chipset launch review in Suzhou China RIGOL demonstrated its prototype scope utilizing Phoenix and Ultravision II. With 4GHz Bandwidth, 20GSa/sec realtime sample rate and 1 Billion point memory depth it shows that there will soon be a new player in the performance oscilloscope market.

    Reply
  37. Tomi Engdahl says:

    New system allows optical “deep learning”
    Neural networks could be implemented more quickly using new photonic technology.
    http://news.mit.edu/2017/new-system-allows-optical-deep-learning-0612

    Now, a team of researchers at MIT and elsewhere has developed a new approach to such computations, using light instead of electricity, which they say could vastly improve the speed and efficiency of certain deep learning computations. Their results appear today in the journal Nature Photonics in a paper by MIT postdoc Yichen Shen, graduate student Nicholas Harris, professors Marin Soljačić and Dirk Englund, and eight others.

    Deep learning with coherent nanophotonic circuits
    https://www.nature.com/nphoton/journal/v11/n7/full/nphoton.2017.93.html

    Reply
  38. Tomi Engdahl says:

    Defeat Serial-Interface Attenuation/Distortion with Equalization and Repeaters
    http://www.electronicdesign.com/analog/defeat-serial-interface-attenuationdistortion-equalization-and-repeaters?NL=ED-003&Issue=ED-003_20170626_ED-003_87&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=11749&utm_medium=email&elq2=b69bbb711e3d4638acf867e848c8db02

    Sponsored by: Texas Instruments. Programmable linear equalization coupled with the latest repeater ICs can open up a “clear path” to optimized signal quality.

    Transmitting high-speed data over a cable or printed-circuit-board (PCB) path will significantly attenuate and distort the signal. Transmission paths are usually transmission lines that introduce losses of 30 dB or more. Signal rounding, noise, jitter, and other distortions introduce additional problems, resulting in bit errors or the inability to recover the signal. Most serial interfaces with data rates of 10 Gb/s or more require some assistance from repeaters and equalizers.

    While good signal-path design is essential, any problems can usually be corrected with the latest interface ICs that provide signal boost and adjustable equalization. The secret to achieving the best signal quality is to optimize the link’s equalization. This article looks at signal-path design and the use of contemporary serial-interface ICs to implement the best data links.

    The best way to judge a fast serial interface is to evaluate its bit error rate (BER). It’s usually established by the interface standard, but typically falls in the 10-10 to 10-18 range.

    Fast rise and fall times produce an open “eye,” indicating good signal integrity. Attenuation and distortion over the signal path reduce signal amplitude and lengthen the rise and fall times, which in turn closes the “eye” and increases BER. Noise, jitter, and inter-symbol interference (ISI) produce other detrimental eye conditions. Today, regardless of the signal path, these issues can be resolved with available equalizers, repeaters, and retimers.

    Reply
  39. Tomi Engdahl says:

    Why contract manufacturing is getting into design
    http://www.eenewseurope.com/news/why-contract-manufacturing-getting-design

    Dietmar Guenther, executive vice president at contract manufacturer Sanmina Corp., explained to EE News Europe why some contract manufacturers are taking on design on behalf of clients.

    A lot has changed in contract manufacturing over the last ten years, according to Dietmar Guenther executive vice president of operations for Europe, Middle-East and Africa at electronics manufacturing services (EMS) provider Sanmina Corp. (San Jose, Calif.).

    “The traditional EMS company focused on manufacturing, bill-of-materials (BoM) optimization and certification meanwhile we are focused beyond pure manufacturing with more design work and technology selection and supply chain management,” Guenther said.

    One could argue that the most obvious thing to happen is the rise of one contract manufacturer, Hon Hai Precision Industries otherwise known as Foxconn, to become almost a household name as the manufacturer of consumer electronics for Apple, amongst others.

    Guenther explained that 15 and more years ago a lot of EMS companies grew by acquiring manufacturing assets from their clients who wished to relieve themselves of the capital intensity of manufacturing. That trend has largely washed through the industry.

    And with digitalization of so many products there is a lot of design to be done.

    Some companies may prefer to focus on the application software, user interface and the physical form-factor and want somebody else to take care of the hardware details. Engaging with contractor to do this has the advantage of parallelizing and speeding up time to market although it needs careful management to prevent problems surfacing at a late and expensive stage.

    “It is a key part of our strategy to do the complete system in such areas a medical, where we find low and medium volume requirements.”

    “That is something that has not changed; customer cost reduction. Whether we make products in Western Europe or in Asia or in China we have to constantly provide cost reduction.”

    And that support can include designing the product. “We have more than 500 engineers engaged in product redesign or designing from scratch. These engineers are based in India, China and the US – and some in Europe,” Guenther said.

    Guenther explained that “design” covers a spectrum of activity from simply selecting or swapping components on the bill of materials at one end to an almost complete product design from a provided specification. It could include redesigning a PCB to accommodate different component selections. “In most cases we do a part of the product but not all. When it comes to chip design – FPGA or ASIC – we don’t do that. If we needed to we would typically sub-contract it out.”

    Sanmina is active in the automotive sector making products in China, Europe and Mexico and it is proving fruitful ground as vehicles become more electronic. “Typically we perform PCB assembly for tier-1 customers who in turn supply automotive OEMs. But OEMs also approach us. There is a trend for OEMs to take more technology back in-house and away from the tier-1s. The OEMs are trying to in-source but then they need an EMS partner to get things made,” said Guenther.

    “When you look at automotive electronification, the Internet of Things, Industry 4.0, you can see that designing and making electronic equipment is going to be a growth industry for many years to come.”

    Reply
  40. Tomi Engdahl says:

    Ignoring Anomalies
    https://semiengineering.com/ignoring-anomalies/

    In an age where time to market is everything, anomalies can be easy to ignore, but they can also be the key to new discoveries and save lives.

    Reply
  41. Tomi Engdahl says:

    Verification Unification
    https://semiengineering.com/verification-unification-3/

    Experts at the Table, part 3: Power, safety and security—and how Portable Stimulus and formal can help with all of these.

    Reply
  42. Tomi Engdahl says:

    U.S. Seeks Life After Moore’s Law
    July events kick off $200M DARPA project
    http://www.eetimes.com/document.asp?doc_id=1331974

    A few dozen executives will gather next week at the first event to kick off what could become nearly a half billion dollar program to revitalize the U.S. electronics industry. An event the following week in Silicon Valley will seek input from the broader tech community on finding new materials, architectures and design processes for a post-Moore’s-law era.

    The Electronics Resurgence Initiative (ERI) under the Defense Advanced Research Program Agency aims to serve the needs both of the military and the tech industry. DARPA will spend a total of $200 million on the effort including $75 million of new funding expected in its fiscal 2018 budget.

    The spending is significant but relatively small compared to the ambitions of the program. It aims to accelerate research in the kinds of post-Moore’s law areas Gordon Moore himself defined in his article that defined chip scaling.

    They include “the integration of novel materials and functional blocks, automation in design, and the reuse of large functional blocks and architectures,” DARPA said on its ERI Web site.

    A 2012 report called for hardware specialization to prop up declines in CMOS scaling.

    Reply
  43. Tomi Engdahl says:

    Using Formal To Verify Safety-Critical Hardware For ISO 26262
    How to make sure that increasingly complex electronic systems will work as planned.
    https://semiengineering.com/using-formal-verify-safety-critical-hardware-iso-26262/

    OneSpin’s formal verification solutions can help automotive suppliers continue to advance their technology while keeping drivers and passengers safe. Our safety-critical white paper examines the ISO 26262 automotive standard and makes a case for its indispensability.

    Reply
  44. Tomi Engdahl says:

    Verification And The IoT
    https://semiengineering.com/verification-and-the-iot-3/

    Experts at the Table, part 3: Shifting left, extending right; using machine learning and data mining to find new bugs and open up new usage options.

    Reply
  45. Tomi Engdahl says:

    How Will the U.S. Replace its Aging Engineering Workforce?
    As more U.S. engineers retire, the U.S. education system will be taxed to provide enough native-born replacement engineers. Or, this may require foreign-born engineers as replacements.
    http://www.powerelectronics.com/power-management/how-will-us-replace-its-aging-engineering-workforce?NL=ED-003&Issue=ED-003_20170621_ED-003_479&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=11689&utm_medium=email&elq2=c917795a4b024200ade4e553d0b9fecd

    Reply
  46. Tomi Engdahl says:

    Aaron Pressman / Fortune:
    Profile of AMD CEO Lisa Su, who has helped the company return to revenue growth by reducing the company’s dependence on PC sales — From the wide windows of her fourth-floor office, Lisa Su can look across the Austin campus of Advanced Micro Devices and see the laboratory building where the company’s new chips get tested.

    Chipmaker AMD Makes a Big Bet on Brand-New Tech
    http://fortune.com/2017/06/28/amd-ai-chips-comeback/

    Zeppelin was the code name for AMD’s (amd, -2.32%) newest microprocessor, a flagship chip designed to run in personal computers and corporate servers—and the company’s future was riding on its success. Su, a Ph.D. microprocessor engineer herself, had become CEO in 2014 in the midst of a dismal sales decline for the chipmaker. Zeppelin was the first fruit of her effort to revive AMD’s product line, with redesigned-from-the-ground-up chips that could woo customers with intense computing needs, from finicky video gamers to tech companies running artificial intelligence and machine learning programs. If the new products thrived, AMD stood a chance of reversing years of losses, and even emerging from the shadow of rivals like Intel and Nvidia.

    Reply
  47. Tomi Engdahl says:

    Should We Bring Back Analog Computers?
    http://www.electronicdesign.com/analog/should-we-bring-back-analog-computers

    Creation of a single-chip analog/hybrid computer reveals that special analog versions of computers could be used to solve complex problems such as nonlinear differential equations.

    Just recently, I received a note from Professor Yannis Tsividis of Columbia University, who happened to read a blog I wrote in 2007 on analog computers.

    In that blog, I ended by saying that “I sometimes wonder if we shouldn’t bring back a modern version of an analog computer.” Professor Tsividis wanted to alert me to the fact that he and his colleagues had done just that. Indeed, they created a single-chip analog/hybrid computer. It’s described in detail in an IEEE paper published last year.1 This is positive proof that perhaps analog computers still have a place in computing.

    Analog computers are designed primarily to simulate physical systems. This is done by writing the math equations describing the processes and functions of the system. Analogs are particularly good at calculus, making differential equations almost trivial. Then a collection of computing circuits is assembled to perform the math. Voilà! A nearly instant solution. By playing with the variables, you can try out different conditions and scenarios.

    The basic computing circuit in an analog computer is the op amp. It can be configured as a summer, inverter, or integrator. Other common circuits include coefficient pots, multiplier/dividers, and logarithmic amplifiers. All of these circuits are commonly interconnected with pluggable wires on a large patch panel.

    Analog computers peaked back in the 1960s and 1970s. Though digital computers were highly developed by that time, they were still too slow for some math operations and especially for simulating large systems like aerospace hardware or complex chemical processing plants. They played a major role in the Apollo space program, simulating spacecraft dynamics and control systems.

    During that period, an analog computer and a digital computer were combined to form a hybrid computer. Big problems were divided up into segments suited to each type of computation, with the digital side performing slow and accurate calculations while the analog did the faster complex math simulations with less accuracy. The two computers communicated with one another via analog-to-digital and digital-to-analog converters (ADCs and DACs, respectively).

    Eventually, though, digital computers got faster and better software came along, pushing analog computers down the road to near oblivion.

    Analog computers were always fast but were not always accurate. They suffered from op-amp drift and offset, component tolerances and variables, and other traditional analog-circuit maladies. Today, op amps and other components are better than ever, so a superior analog computer is very achievable. The main question is: “Would it be viable, given today’s fast and cheap processors?” Probably not, but one could make the case for special versions to solve unique problems.

    Professor Tsividis and his colleagues pretty much validated that approach by creating an analog/hybrid computing circuit on a single chip.

    Generally speaking, analogs are still a good solution for some problems. Nevertheless, it doesn’t seem likely we will ever see a commercial general-purpose analog computer again.

    http://www.electronicdesign.com/analog/analog-computers

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