Chip Market Brightens in 2017. The semiconductor industry may yet have been flat in 2016, but expects it is expected that the electronics industry rebounds in 2017, probably in the first half. Wall Streeter predicts return to 5% growth. Total IC business growth is expected to be around five percents for few years to come.There seems to several promises to this direction, especially in memory business. Chips Execs See Maturing Industry article says that pessimism about immediate revenue and R&D growth is a sign of a maturing industry.
Thanks to both rising prices and volume sales, the memory sector is expected to lead overall semiconductor sales growth. Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. NAND flash will grow almost as fast at 10% next year. The average annual growth rate for the memory market is forecast to be 7.3% from 2016-2021. Every year we need 5.6% more bits than previous year, and the unit prices are increasing on both DRAM and Flash.
There will be also other growth sectors. The data center will be the fastest growth segment next year, rising 10%, followed by automotive at 9% and communications at 7%. Consumer and industrial markets growing at about 4% in line with the overall industry. PCs will be the big drag on 2017, declining 2%.
China Dominates Planned Chip Fabs as more than 40% of front end semiconductor fabs scheduled to begin operation between 2017 and 2020 are in China, a clear indication that China’s long-stated ambition to build a significant domestic semiconductor industry is taking shape.
Trump Win Could Mean Big Questions for Manufacturing as while Trump vowed to keep American manufacturing jobs, he offered little in the way of stated policy other than the promise to punish companies that sent manufacturing job outside the US. Questions about trade also could directly affect US manufacturing. How that plays out is a big unknown.
Europe will try to advance chip manufacturing, but not much results in 2017 as currently there is almost no leading-edge digital chip manufacturing left in Europe as the local companies have embraced outsourcing of digital semiconductor manufacturing to foundries. The European Commission intends to reconvene a high-level group of European CEOs and executives to exchange views on Europe’s 10/100/20 nanoelectronics and chip manufacturing project and make adjustments as necessary for a wave of European Union investment supposedly starting in 2020. The two most advanced wafer fab locations left in Europe in terms of deep sub-micron miniaturization belong to Intel in Leixlip, Ireland and Globalfoundries in Dresden, Germany.
Smaller geometries are to be taken into use and researched in 2017. Several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner. As TSMC, GF/Samsung Battle at 7nm the net result is in the course of 18 months chip designers will see at least three variants of 7nm — separate immersion variants from TSMC and Globalfoundries and the EUV version from GF/Samsung. Intel has yet to detail its 7nm node.
At the same time R&D has begun for 5nm and beyond, but Uncertainty Grows For 5nm, 3nm as costs are skyrocketing. Both 5nm and 3nm present a multitude of unknowns and challenges. To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. Etching Technology Advances as atomic layer etch (ALE) moves to the forefront of chip-making technology—finally. TSMC recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion targeted for TSMC’s 5nm and 3nm processes, which are due out in 2020 and 2022.
Moore’s Law continues to slow as process complexities and costs escalate at each node. Moore’s Law is dead, just not in the way everyone thinks. SiFive believes open source hardware is the way forward for the semiconductor industry. Technological advances keep allowing chips to scale, but the economics are another story – particularly for smaller companies that can’t afford chips in the volumes. The solution, according to San Francisco-based startup, SiFive, is open-source hardware, specifically an architecture developed by the company’s founders called RISC-V (pronounced “risk-five”). Done right SiFive, which was awarded Startup of the Year at the 2016 Creativity in Electronics (ACE) Awards, believes that RISC-V will do for the hardware industry what Linux has done for software. For example 5th RISC-V Workshop Points to Growing Interest in the RISC-V Platform.
Sensors are hot in 2017. These tiny, powerful solutions are creating the interface between the analog and the digital world. Data is everywhere, and sensors are at the very heart of that. While no one really knows what technology’s next “killer application” will be, we are confident that any killer app will rely on sensors.Appliance autonomy promises to make life simpler, but this field has still lots of to improve even after year 2017.
Interface ICs will continue to help simplify high-bandwidth designs while making them more robust and reliable. Application areas that will benefit include automotive, communications, and industrial. Both wired and wireless interface solutions have plenty of applications.
Analog’s status is rising as more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. IoT pushes up demand for analog content and need for communication between these two worlds will continue to grow. Analog and digital always have fit rather uncomfortably together, and that discomfort has grown as SoCs are built using smaller feature sizes. The demand for analog silicon has always existed in the embedded space, but the advent of the Internet of Things (IoT) is increasing the demand for connected mixed-signal content. At 28nm and 16/14nm, standard “analog” IP includes a fair amount of digital content.
It seems that hardware designer is a disappearing resource and software is the king in 2017. It is becoming less and less relevant in what format the device is used in many applications. Card computers are standard products and are found in many different card formats that can be used in very many applications. Embedded development is changing to more and more coding. More software designers that understand some hardware are needed, but it is not easy to leap to move to the hardware to software.
The power electronics market is moving at very fast pace. Besides traditional industrial, renewable, and traction sectors, new applications such as energy-storage systems, micro-grids, and dc chargers are emerging. As the automotive world moves to electric vehicles, this creates challenges for IGBT and SiC-MOSFET ICs, and their associated gate drivers. New packages for high-voltage IGBTs and high-voltage SiC-MOSFETs are introduced.
More custom power distribution and higher voltages on data center computer systems in 2017. OpenRack and OpenCompute projects are increasing the distribution voltage inside the server itself. This approach, plus transitioning to new materials such as gallium nitride in the power-conversion systems, can reduce overall power consumption by 20% and increase server densities by 30-40%.”
Power Modules and Reference Designs will be looked at in 2017 even more than earlier in power electronics. The semiconductor and packaging technologies used in power modules have advanced considerably, and the industry is developing modules today that are denser, less expensive, and easier to use. Designers want to rely on power modules to speed up designs and optimize space using smaller, easy-to-use power modules. Module manufacturers hope that engineers will increasingly choose a module over a discrete design in many applications.
The bi-directional DC/DC converter has been around for a while, but new applications are quickly emerging which necessitate the use of this architecture in so many more systems. Battery back-up systems need bi-directional DC/DC converters. Applications today require better energy efficiency and such systems as green power with solar or wind generation, need storage so that when there is no wind or sun available the electricity flow is not interrupted.
Power supplies need to become more efficient. Both European Union’s (EU) Code of Conduct (CoC) Tier 1 and CoC Tier 2 efficiency standards are to be taken into use. The European Union’s CoC Tier 1 effectively harmonizes the EU with US DoE Level VI and became effective as a voluntary requirement from January 2014, two years ahead of Level VI. Its adoption as an EU Ecodesign rule is currently under review to become law with an implementation date of January 2017. The key difference between the CoC requirements and Level VI is the new 10% load measure, which imposes efficiency requirements under a low-load condition where historically most types of power supplies have been notoriously inefficient. CoC Tier 2 further tightens the no-load and active mode power consumption limits.
During 2016, wireless-power applications started to pick up across many fields in the semiconductor industry, and it will continue to do so. Wireless power will continue to gain traction with increased consumer demand. Hewlett Packard, Dell, jjPlus, and Witricity have already announced products based on Airfuel standards. And, products based upon the Qi standard will continue to grow at a rapid pace.
Other prediction articles:
In Power & Analog 2017 Forecast: What Experts Are Saying article representatives from major players in the semiconductor industry share their predictions for 2017 regarding power modules, wireless power, data converters, wireless sensing, and more.
Looking Ahead to 2017 article tells on to what SIA is focused on working with. “U.S. semiconductor technology should be viewed as a strategic national asset, and the Administration should take a holistic approach in adopting policies to strengthen this vital sector,” the letter says
Hot technologies: Looking ahead to 2017 article collection has EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.
1,115 Comments
Tomi Engdahl says:
Microwave Energy Aims to Improve Health
http://mwrf.com/systems/microwave-energy-aims-improve-health
Medical devices are now being implanted, worn, and mounted for monitoring in homes and hospitals to provide cutting-edge health benefits via modern wireless technology.
Tomi Engdahl says:
Registering High RFID Isolation
http://mwrf.com/systems/registering-high-rfid-isolation?NL=MWRF-001&Issue=MWRF-001_20170112_MWRF-001_545&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=9229&utm_medium=email&elq2=c508b85f4eb74ea5ac38f8526f26f9f9
Radio-frequency-identification (RFID) technology continues to spread as a reliable means of wireless security for many systems. These include readers that transmit signals to remotely power transceivers without batteries, which return signals to the reader at the same frequency. Effective operation requires adequate isolation between the two signals and the transmit and receive paths, which is typically achieved by two separate bistatic antennas or a single, switchable monostatic antenna.
Tomi Engdahl says:
Boosting Power with Silicon CMOS
http://mwrf.com/mixed-signal-semiconductors/boosting-power-silicon-cmos?NL=MWRF-001&Issue=MWRF-001_20170117_MWRF-001_667&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=9277&utm_medium=email&elq2=a3ab920b9c1f488699092498882407ea
Silicon CMOS semiconductor technology has been the basis for a wide range of analog, digital, and mixed-signal semiconductor devices. Traditionally, though, it does not fare well in high-frequency amplification applications. A different semiconductor technology, such as gallium arsenide (GaAs), is typically recruited to raise the amplitude of high-frequency signals.
Purdue. As with other researchers, they discovered that various limitations in Si CMOS must first be overcome for higher performance. For example, output power is limited by the low breakdown voltages of CMOS. In addition, limitations in frequency, efficiency, and bandwidth are caused by the parasitic elements of active and passive components in CMOS technology, including on-chip passive components with high loss (e.g., inductors, transformers, and transmission lines).
Some of the parasitic limitations can be overcome by using a substrate material with high thermal conductivity, such as aluminum nitride (AlN), in place of the standard Si-based substrates. In addition, the use of an enhanced silicon-on-sapphire (SOS) CMOS process can also minimize parasitic elements when fabricating PA circuitry for improved higher-frequency performance.
Tomi Engdahl says:
Receiver ICs Blend Mixers, Synthesizers, and IF Amps
http://mwrf.com/mixed-signal-semiconductors/receiver-ics-blend-mixers-synthesizers-and-if-amps?NL=MWRF-001&Issue=MWRF-001_20170117_MWRF-001_667&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=9277&utm_medium=email&elq2=a3ab920b9c1f488699092498882407ea
These densely packed integrated circuits surround mixer circuitry with many of the components that once had to be added to mixers in a typical receiver front end.
Wireless base stations were once contained in large, climate-controlled spaces, but now they can be mounted anywhere. As wireless network service providers attempt to achieve coverage everywhere, the pressure is on base-station component suppliers to provide more functionality in smaller packages.
A pair of integrated circuits (ICs) from Analog Devices provides a solution by redefining the meaning of “mixer” in receiver front ends. Essentially, the ICs incorporate many of the components once added to a mixer in a receiver—such as local oscillators (LOs) and intermediate-frequency (IF) amplifiers—within the mixer IC itself.
The ICs in question are the models ADRF6612 and ADRF6614, both designed for RF ranges of 700 to 3,000 MHz, LO ranges of 200 to 2,700 MHz, and IF spans of 40 to 500 MHz.
Tomi Engdahl says:
Nikkei:
Sources: Toshiba considers spinning off semiconductor unit, wants to sell about 20% interest to Western Digital for $1.77B to $2.65B
Toshiba seeking investment in chip biz from Western Digital
Japanese company weighing business spinoff
http://asia.nikkei.com/Business/Deals/Toshiba-seeking-investment-in-chip-biz-from-Western-Digital
Toshiba is considering spinning off semiconductor operations and selling a partial stake to Western Digital as it tries to cope with a massive impairment loss in its U.S. nuclear power unit.
The new chip business company will be created as early as the first half of this year.
Tomi Engdahl says:
Federal Trade Commission:
FTC sues Qualcomm over anticompetitive tactics in monopolizing baseband processor market, says firm elevated patent royalties for vendors using competing chips — Company’s sales and licensing practices hamper Qualcomm’s competitors and threaten innovation in mobile communications, according to FTC
FTC Charges Qualcomm With Monopolizing Key Semiconductor Device Used in Cell Phones
https://www.ftc.gov/news-events/press-releases/2017/01/ftc-charges-qualcomm-monopolizing-key-semiconductor-device-used
Company’s sales and licensing practices hamper Qualcomm’s competitors and threaten innovation in mobile communications, according to FTC
Qualcomm also holds patents that it has declared essential to industry standards that enable cellular connectivity. These standards were adopted by standard-setting organizations for the telecommunications industry, which include Qualcomm and many of its competitors. In exchange for having their patented technologies included in the standards, participants typically commit to license their patents on what are known as fair, reasonable, and non-discriminatory, or “FRAND,” terms.
According to the complaint, by threatening to disrupt cell phone manufacturers’ supply of baseband processors, Qualcomm obtains elevated royalties and other license terms for its standard-essential patents that manufacturers would otherwise reject.
The FTC has charged Qualcomm with violating the FTC Act. The complaint alleges that Qualcomm:
- Maintains a “no license, no chips” policy under which it will supply its baseband processors only on the condition that cell phone manufacturers agree to Qualcomm’s preferred license terms.
- Refuses to license standard-essential patents to competitors.
- Extracted exclusivity from Apple in exchange for reduced patent royalties
The FTC is seeking a court order to undo and prevent Qualcomm’s unfair methods of competition in violation of the FTC Act.
Tomi Engdahl says:
GOOI FETs
The next-generation power semiconductor market is heating up. Two wide-bandgap technologies—gallium nitride (GaN) on silicon devices and silicon carbide (SiC) MOSFETs—are ramping up in the power semi market. In addition, the industry is also exploring various futuristic technologies, such as bulk vertical GaN, diamond FETs and others.
Suddenly, beta gallium oxide is creating a buzz for use in power semi applications. The technology has a bandgap of 4.9 eV, resulting in a critical field strength around 8 MV/cm, according to researchers.
Source: http://semiengineering.com/manufacturing-bits-jan-17/
Tomi Engdahl says:
Real-Time Data Acquisition and Control System
https://www.eeweb.com/blog/eeweb/real-time-data-acquisition-and-control-system
Multi-Channel LXI Digitizers
https://www.eeweb.com/news/multi-channel-lxi-digitizers
Tomi Engdahl says:
Samsung is approaching Intel
Semiconductors were sold last year nearly 340 billion dollars. According to Gartner’s statistics, Intel has been the number one now for 25 years, but Samsung is approaching
Intel sold last year, semiconductors nearly 54 billion dollars, which is 4.5 percent more than the year before. Samsung’s sales increased by 6.1 per cent, to 40.1 billion dollars.
Source: http://www.etn.fi/index.php/13-news/5686-samsung-laehestyy-inteliae
Tomi Engdahl says:
Startup Looks to Shake Up IP Paradigm
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331202&
A novel concept in semiconductor design is taking shape that could potentially have a dramatic impact on the costs associated with prototyping and building hardware.
A novel concept in semiconductor design is taking shape that could potentially have a dramatic impact on the costs associated with prototyping and building hardware.
Efabless Corp., which emerged from stealth mode in November, is offering what it describes as the first online marketplace for community-developed intellectual property. The goal of the company is to create a community of chip designers and bring it together with customers in need of semiconductor IP.
The idea is to essentially democratize chip design, mobilizing and incentivizing chip designers by providing an open platform that connects customers to designers and enable them to communicate, agree on design requirements, create specs and deliver prototypes.
Tomi Engdahl says:
NRAM’s Day Is Finally Here: Report
http://www.eetimes.com/document.asp?doc_id=1331195&
Better late than never might be a good way to sum up NRAM.
After years of not quite be ready for wide adoption, a new report from BCC Research is predicting that Nano-Ram (NRAM) is finally in a position to disrupt incumbent DRAM and flash memory with commercialization expected in 2018. The Wellesley, MA.-based research firm said the first non-volatile memory chip to exploit carbon-nanotube technology looks like it’s finally ready to have a serious impact on computer memory.
“Industry experts had given up on waiting for CNT memory,” said BCC Research editorial director Kevin Fitzgerald in an interview with EE Times. “I believe one needed fresh eyes to really see that the time was coming when it was really possible to make the switch from silicon to carbon.”
Tomi Engdahl says:
Intel Shows Analog Clout at ISSCC
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331186&
Intel’s analog experts will get a chance to show how they power processors with billions of transistors at the next month’s International Solid State Circuits Conference.
Analog engineers need to feed high-end CPUs hundreds of amperes without starting fires. The Intel CPU processor has always been a challenge because it relies on as many as eight multi-phase switching regulators (aka DC-DC converters) per CPU, each generating up to 25 watts per chip. They are typically clocked at 250 kHz, and they generate quite a bit of heat.
DC-DC converters are pulse generators whose outputs are filtered and summed to effect currents of hundreds of amps at fixed voltages. Designers and users believe that higher switching frequencies will make incremental increases in energy-transfer efficiency and dramatic reductions in the size of ancillary components such as inductors and capacitors. Thus far, 10MHz has been the upper for commercial pulse-width modulators capable of putting out 40A from a thimble-sized package.
In ISSCC session 26 on processor power management, Intel will describe a module with an-order-of-magnitude higher clock rate. It is a fully integrated, digitally controlled buck voltage regulator with on-die inductors with a planar magnetic core on a 14nm CMOS substrate.
Tomi Engdahl says:
Choosing Power-Saving Techniques
There are so many options that the best ones aren’t always obvious.
http://semiengineering.com/choosing-power-saving-techniques/
Tomi Engdahl says:
Power Integrations FluxLink feedback brings increased performance gains to off-line flyback switchers
http://www.edn.com/electronics-products/electronic-product-reviews/-electronica/4437319/Power-Integrations-FluxLink-feedback-brings-increased-performance-gains-to-off-line-flyback-switchers
Flyback converters are commonly used in DC/DC converter applications, especially when isolation from the primary side to secondary side is essential. They can be fairly complex in their design architecture. The flyback converter typically uses an optocoupler which has propagation delays and can cause potential instability due to the right-hand-plane (RHP) zero in the control loop.
Primary-side regulation (PSR) can help alleviate the difficult job of achieving international energy efficiency regulations (California Energy Commission (CEC) and Energy Star) in charger designs. The primary-side regulation controls the output voltage and current very accurately with the information only on the primary side. This technique gets rid of the output current sensing loss as well as all secondary-feedback circuitry including the optocoupler. Primary side regulation also has benefits in LED lighting. Drawbacks are limited accuracy and efficiency and poor transient response.
Tomi Engdahl says:
TSMC: 10nm To Be Greater Than 10% Of 2017 Wafer Revenue
10nm heads into full swing, with 7nm and 5nm on the horizon.
http://semiengineering.com/tsmc-10nm-to-be-greater-than-10-of-2017-wafer-revenue/
Analyst Mehdi Hosseini from Susquehanna Financial Group asked about market share for 10nm. TSMC Chairman, Morris Chang, said that last year he vowed that “every new node from now on we have a market share higher than our market share on 16. “ Mr. Hosseini asked for clarification, if that meant greater than 65%? Chairman Chang answered, very definitely, very definitely, so TSMC seems quite confident that it’s going to capture significant majority share of the foundry market at 10nm and beyond.
Analyst Steven Pelayo from HSBC asked when TSMC expected 10nm to reach 10% of the wafer revenue. Lora Ho said that the big volume will come in the 2nd half of 2017 and that for the year 10nm wafer revenue will exceed 10% of TSMC wafer revenue. The 10nm node should exceed 10% of wafer revenue starting in the third quarter of 2017. This would seem to set up a quick ramp again, very much like the one that we saw for 20nm.
TSMC President and Co-CEO, Mark Liu, commented that 7nm is under qualification now and it will be qualified according to plan from the end of the first quarter of 2017. There are already more than 20 customers design-in on 7nm and this year alone TSMC estimates that there will already be 15 to 20 tapeouts.
Mark Liu also mentioned last time that TSMC will have 5nm two years from now
A recent EETimes article also quoted TSMC as saying that 7nm will ramp in 2017 followed by a 5nm ramp in 2019.
Tomi Engdahl says:
Performance Increasingly Tied To I/O
Chipmakers look beyond processor speeds as rate of performance improvements slow.
http://semiengineering.com/performance-increasingly-tied-to-io/
Speeding up input and output is becoming a cornerstone for improving performance and lowering power in SoCs and ASICs, particularly as scaling processors and adding more cores produce diminishing returns.
While processors of all types continue to improve, the rate of improvement is slowing at each new node. Obtaining the expected 30% to 50% boost in performance and lower power no longer can be achieved just by shrinking features or increasing clock speeds. Moreover, for many new applications processor speeds are just one of several key performance metrics. Equally important are the speed at which data can be moved back and forth between devices, such as a smartphone and a data center, or between a processor and various types of memory.
“Speeds are going up, but not just because they are required by enterprise applications,”
Architecting For I/O
For most designs, logic and memory fill the center of a chip and I/O is on the periphery. The challenge is getting signals to and from the I/O infrastructure, a problem that is becoming more difficult as wires shrink and the distances that signals need to travel increase. Signals still need to be routed across a chip’s real estate, which in most cases is almost evenly split between memory, logic and I/O.
In chips for networking and data center applications, the I/O is almost entirely consumed by SerDes, said Prasad Subramaniam, vice president of R&D and design technology at eSilicon. “We’re working on two types of devices. One is for networking, where there is hardly any general-purpose I/O. All of the pins are high-speed, which translates into about 120 to 200 lanes of SerDes. That’s increasing every generation, too. Last year, we had 15G SerDes. Now it’s at 28G and moving to 56G—all within a matter of two or three years. The second device we’re working on is a memory interface. We’re still seeing DDR4, but not as much as high-bandwidth memory (HBM), which provides up to 2 gigabits per second per pin. If you add 24 pins and eight channels, that’s huge I/O between the ASIC and memory.”
Those issues get worse at 10nm and 7nm. At 5nm, where quantum effects begin entering the picture, they are expected to require a rethinking of the overall chip architecture.
In other markets, this is arguably even worse because there are more I/O protocols to contend with. On the mobile side, there are Bluetooth, Zigbee, Z-Wave, WiFi, 4G, 5G, LTE, Z-Wave, WiGig. Some of these have proliferated because no protocol does everything perfectly. Some are simply next-generation standards that have taken on a life of their own. Even the data center is awash in I/O protocols for PCI Express, SerDes, Fibre Channel, and a host of others that can tap into legacy systems.
Consider a smartphone SoC, for example. It needs to be able to connect to a car’s infotainment system using Bluetooth, a new car’s built-in WiFi hotspot, various cellular base stations while driving along at high speed (including 3G, 4G, LTE, and in some countries 5G)
“There’s a lot of discussion about next-generation I/Os,” said Synopsys’ Nandra. “They also have to be low-power, because you can’t have watts of power per pin.”
Growing value of data
Along with these technology challenges, there is another fundamental shift underway that affects I/O—the increasing value of data to many companies and people within those companies. This is more than just mining the data for marketing trends and anomalies. In some cases, it’s the core of the business itself.
Tomi Engdahl says:
Mouser – Time-to-digital converter for laser range-finding systems (Texas Instruments TDC7201)
http://www.electropages.com/2017/01/mouser-time-to-digital-converter-laser-range-finding-systems/?utm_campaign=2017-01-18-Electropages&utm_source=newsletter&utm_medium=email&utm_term=article&utm_content=Mouser+-+Time-to-digital+converter+for+laser+range-finding+systems
Mouser is now stocking the TDC7201 time-to-digital converter from Texas Instruments. The device is designed for use with ultrasonic, laser, and radar range finding equipment using time-of-flight (TOF) technique. Laser-based TOF applications demand picosecond accuracy plus the ability to measure very short durations.
The company’s device has two built-in time-to-digital converters (TDCs) that can be used to measure distance down to 4cm and up to several kilometers using a simple architecture, which eliminates the need to use FPGAs or processors.
Tomi Engdahl says:
Automotive Power Semi Market Keeps Soaring
http://www.eetimes.com/document.asp?doc_id=1331220&
The global market for power semiconductors used in cars and light passenger vehicles will grow by more in $3 billion in the next six years, predicts market research company IHS Markit.
In its latest report, the market watcher forecasts the total market for power semiconductorswhich includes discretes, power modules and power ICs)—to increase from $5.5 billion in 2016 to more than $8.5 billion in 2022. Revenue is estimated to grow at an annual rate of 7.5% from 2015 to 2022.
“Increasing electrification in vehicles generally—and in hybrid and electric vehicles specifically—is energizing the market for power semiconductors in vehicles”, said Richard Eden, senior analyst for power semiconductors atIHS Markit.
Tomi Engdahl says:
Give Unique Test Gear Some Respect
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331203&
There is general-purpose test equipment, more-focused test equipment, and some units that address truly unusual and narrow niches.
Tomi Engdahl says:
Will Supercapacitors Ever Replace Batteries?
http://hackaday.com/2017/01/19/will-supercapacitors-ever-replace-batteries/
Recharging your mobile phone or your electric vehicle in a few minutes sure sounds appealing. Supercapacitor technology has the potential to deliver that kind of performance that batteries currently can’t, and while batteries are constantly improving, the pace of development is not very fast. Just remember your old Nokia mobile with Ni-Cad batteries and several days of usage before a recharge was needed. Today we have Lithium-Ion batteries and we have to charge our phones every single day. A better energy storage option is clearly needed, and supercapacitors seem to be the only technology that is close to replace the battery.
Let´s review the key parameters of supercapacitors and Li-Ion batteries:
Charge time: Supercaps excel in this, with a charging time from 1 to 10 seconds, compared to 10 to 60 minutes to reach a full charge on a battery.
Life: Typical batteries have 500-1000 charge-discharge cycles while supercapacitors can reach up to one million cycles. In vehicle service, batteries have a life expectancy of 5 to 10 years while supercaps can last for 10 to 15 years.
Specific energy: This is the total stored energy per unit mass, and is the principal weakness of the supercapacitor, with an average of 10 Wh/kg, compared to 100-200 for batteries. For reference, we have 3700 Wh/kg for petrol fuel (considering 30% efficiency of an internal combustion engine)
Specific power: Since supercaps can charge very quickly, they can also discharge rapidly, therefore they can deliver a power of up to 10,000 W/kg. Li-Ion batteries are in the range of 2000-3000 W/kg.
Cost: Being a relatively new technology, supercapacitors are still expensive, with a cost of around $20 per watt, while batteries are much cheaper in the range $0.5-$1 per watt.
There is an additional disadvantage to supercapacitors compared to batteries: their voltage diminishes approximately linearly with stored charge, while batteries keep an approximately constant voltage until they are almost depleted.
Safety Issues
as of today, we can say that supercapacitors are safer than Li-Ions.
When Can We Have a Supercap iPhone?
Supercapacitors already have several niche applications, with an estimated $400 million world market. Memory backup and protection was one of the first applications, as well as for powering electronic toys.
Tomi Engdahl says:
Will EUV Kill Multi-Patterning?
http://semiengineering.com/will-euv-kill-multi-patterning/
Even with EUV in play, i193 multi-patterning may still be the most cost effective option in certain cases.
Tomi Engdahl says:
Transferring Skills Getting Harder
http://semiengineering.com/transferring-skills-becoming-problematic/
Error rates rising because design complexity now requires persistent expertise updates.
Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain consistent skill levels across a growing number of interrelated technologies.
The result is that engineers are being forced to specialize, but when they work with other engineers with different specialties they frequently don’t understand where the gaps are. Not everyone is speaking the same language—sometimes literally—and the skills at one process node may be markedly different from another. That allows errors to creep in at every level, increasing the number of re-spins and overall costs, decreasing yield, and stretching out time to market.
Tomi Engdahl says:
China Unveils Memory Plans
http://semiengineering.com/china-unveils-memory-plans/
Government and industry are investing tens of billions of dollars, but so far results are mixed.
Backed by billions of dollars in government funding, China in 2014 launched a major initiative to advance its domestic semiconductor, IC-packaging and other electronic sectors. So far, though, the results are mixed.
China is making progress in IC-packaging, but the nation’s efforts to advance its domestic logic and memory sectors are still a work in progress. In fact, China has yet to achieve its goal of closing the technology and trade gap with foreign chipmakers.
To help jumpstart its domestic memory efforts, China has attempted to acquire multinational memory makers or to form technology alliances with them. So far, most of the multinationals have balked, citing national security and intellectual-property concerns, or their governments have stepped in to stop the deal. The Committee on Foreign Investment in the United States (CFIUS) has been active in blocking Chinese investments, according to numerous industry sources.
Playing catch-up
China’s IC efforts are fueling a wave of fab activity in the nation, creating a boom in the equipment industry. In total, wafer fab equipment (WFE) sales in China are expected to reach $7 billion in 2017, compared to $6.7 billion in 2016 and $3.4 billion in 2013, according to SEMI. In total, the worldwide WFE market is projected to reach $43.4 billion in 2017, up 9.3% over 2016, according to SEMI.
Amazingly, China’s WFE market hasn’t reached its peak. “Right now, it looks like 2017 fab equipment spending in China is going to be roughly the same as 2016, but it’s up a pretty significant amount from where it was a couple of years ago,”
Although China’s domestic IC sector is moving at a fast pace, the Chinese government has been grappling with the same problem for years. It is behind in semiconductor technology. This is a complex subject, but one of the causes is export controls. Multinational companies sell products into China, but they must follow various export control policies.
As part of those controls, multinational fab equipment makers for years were prevented from shipping advanced tools into China
Then, in 2014, China launched an initiative called the “National Guideline for Development of the IC Industry.” The goal is to accelerate China’s efforts in 14nm finFETs, advanced packaging, MEMS and memory.
Tomi Engdahl says:
Tsinghua to Build $30 Billion Memory Fab in China
http://www.eetimes.com/document.asp?doc_id=1331223&
China’s state-controlled chip vendor Tsinghua Unigroup Ltd. announced plans to build a $30 billion memory chip in Nanjing, a city in eastern China.
Tsinghua, which has acquired several chip vendors and facilities over the past few years, is also building a $24 billion memory fab in the Chinese city of Wuhan, announced last March.
Tsinghua said it plans to build DRAM and 3D NAND flash at the Nanjing fab. The first phase of the project will cost about $10 billion and result in the production capacity to produce 100,000 wafers per month, the company said. No timetable was provided for the project.
In 2015, Tsingua made an unsuccessful bid to acquire U.S. memory chip vendor Micron Technology Inc. for $23 billion.
Tomi Engdahl says:
Racing to Offer Mobileye ‘Killer Chip’
http://www.eetimes.com/document.asp?doc_id=1331191
With Mobileye acknowledged as the king of the hill in the hottest automotive vision market, it has become incumbent upon competitors to say that they’ve got “a Mobileye killer solution.”
Aspirations aside, though, no rival has yet demonstrated a credible solution of its own. At least, not yet.
Potential contenders, however, are saying that they’re ready to take on the challenge. During the Consumer Electronics Show earlier this month, companies ranging from MediaTek and Renesas to NXP and Ambarella, told us they are working on “alternatives” to Mobileye’s EyeQ chips. On the opening day of CES, On Semiconductor announced that it has licensed CEVA’s imaging and vision platform for its automotive advanced driver assistance (ADAS) product lines.
Asked about who’s likely to become the next Mobileye and what it would take, industry analysts and players offered opposing views. Some declared the game already over, others believe the market remains wide open.
Tomi Engdahl says:
15 Views from a Silicon Summit
Macro to nano perspectives of chip horizon
http://www.eetimes.com/document.asp?doc_id=1331185
Semiconductor advances could continue through 2025 with extreme ultraviolet lithography (EUV) coming online in 2020, said tech experts at the annual Industry Strategy Symposium. Market watchers shared long-term forecasts for mid-single-digit growth, with this year performing above average.
“I don’t believe [that] Moore’s law is dead, and the deep techs don’t believe it either,” he said, noting that both Intel and GlobalFoundries now report cost savings in post-14-nm nodes. “I think [that] we have a path that produces transistors that scale down in cost,” he said.
He predicted that a 5-nm node could hit starting in late 2019 using EUV in at least some steps, probably still using some form of FinFETs as transistors. Beyond that, a 3.5-nm generation moving to horizontal nanowires could mark the last node for classical scaling.
Nevertheless, a 2.5-nm generation stacking n- and p-nanowires could deliver 60–70% density increases into the year 2025, he said, citing a simulation run by process-modeling specialist Coventor.
Tomi Engdahl says:
Hyunjoo Jin / Reuters:
Samsung reports revenue of $45.8B in Q4 with profits growing 50% YoY to $7.93B, the highest in three years; profit from chips business grew 77% YoY to $4.25B — Samsung Electronics Co Ltd (005930.KS) on Tuesday said it expects profit growth in 2017 despite challenges arising from political uncertainty …
http://www.reuters.com/article/us-samsung-elec-results-idUSKBN1572XL
Tomi Engdahl says:
Dean Takahashi / VentureBeat:
Intel reports Q4 revenue of $16.4B, up from $14.9B last year, as IoT revenue grew 16% YoY to $726M and non-volatile memory revenue grew 25% YoY to $816M
Data center and Internet of Things chips drive Intel Q4 revenues to $16.4 billion
http://venturebeat.com/2017/01/26/data-center-and-internet-of-things-chip-revenues-drive-intel-q4-revenues-to-16-4-billion/
Intel reported fourth-quarter earnings that were mixed, missing its target on earnings per share but beating estimates for revenues. The results were driven by revenues from desktop and laptop computer chips, data center chips, and the Internet of Things.
Tomi Engdahl says:
Trump, Brexit Cloud Upbeat 2017
McClean describes IC growth, wild cards
http://www.eetimes.com/document.asp?doc_id=1331266
The semiconductor industry should have a good 2017 as long as political wild cards around the globe stay neutral or positive. Growth could hit 5 percent, led by DRAMs and flash as well as 32-bit microcontrollers, analog and automotive.
The president of market watcher IC Insights doesn’t believe the big plans cooking in China or the Trump administration will substantially impact the industry this year, but rising populism in Europe could dampen growth.
“We think this is a milestone year,” with IC sales of $314.1 billion, cracking the $300 billion mark for the first time, McClean said. He estimated the next milestone at $400+ billion in 2023, a long period of 4 to 5 percent compound growth.
“Memory will really drive growth this year,” with 10 percent growth and upside potential after dragging it down for the last two years
Application-specific analog parts in automotive and 32-bit MCUs could will outgrow memory at 11 and 12 percent, respectively. And the mixed-bag category of optoelectronics, sensors and discretes will outgrow ICs overall.
Given $201.8 billion in semiconductor M&A deals over the past two years, “more value is going into the top 10-25 companies, and we see this trend going forward in next few years,” McClean said.
Tomi Engdahl says:
Talent Hunt in China’s Memory Triangle
Battles among Xi’an, Wuhan and Nanjing
http://www.eetimes.com/document.asp?doc_id=1331262
Let’s face it: Tsinghua Unigroup’s recently revealed plan to build a $30 billion memory chip in Nanjing was unexpected – even by many China watchers. The move is a head-scratcher, considering the uncertainty of China’s memory production even by such a known entity as XMC in Wuhan.
China is forging ahead despite a number of challenges. Among the biggest are a shortage of experienced memory chip engineers, a dearth of management expertise and growing scrutiny from the Committee on Foreign Investment in the United States (CFIUS).
Tsinghua to Build $30 Billion Memory Fab in China
http://www.eetimes.com/document.asp?doc_id=1331223
Tomi Engdahl says:
EUV in Focus at Photonics West
Gigaphoton updates progress on light source
http://www.eetimes.com/document.asp?doc_id=1331252
Work on a 250W light source needed for extreme ultraviolet lithography will be reported next week at Photonics West. The event will also host news about promising infrared and near-infrared cameras and data communications using LED light.
Engineers have long identified a 250W source as a key element to get EUV systems ready to mass produce chips. To date, ASML, the sole developer of EUV systems, has shipped multiple prototypes using 80W light sources. It was expected to ship its first 125W system at the end of the year using technology acquired with Cymer.
ASML has demonstrated a 250W light source in its labs
“In 2016, Gigaphoton announced it achieved 250W light output at 4% conversion efficiency and 119 hours of continuous operation at over 130W in testing.
Tomi Engdahl says:
Toshiba Confirms Memory Chip Selloff
http://www.eetimes.com/document.asp?doc_id=1331270&
At a press conference here Friday(Jan. 27), Toshiba Corp. formally announced that it is in the market to sell a chunk — less than 20 percent — of its memory chip business.
Tomi Engdahl says:
MRAM Gains More Steam
http://www.eetimes.com/author.asp?section_id=36&doc_id=1331260&
Spin Transfer Technologies’ delivery of functional MRAM samples is one more indication of emerging memory technology’s momentum.
First, MRAM, or magneto-resistive random access memory, has been in development since the 1990s. It is one of a group of several emerging technologies that have been considered candidates for next-generation memory to replace the semiconductor industry’s stalwarts such as DRAM and NAND flash, which are facing serious scaling challenges as the industry moves to smaller nodes.
MRAM has long held promise as a replacement for SRAM, DRAM and flash, but to date only one company, Everspin Technologies, has shipped working MRAM product
STT said its samples feature 80nm pMTJs. The company has previously said it has created pMTJs as small as 20nm at its Fremont development fab
Tomi Engdahl says:
Miniaturization, IoT Fuel Electronics Adhesive Growth
http://www.eetimes.com/document.asp?doc_id=1331229&
The market for high-quality electronics is growing, and with that also comes a rising need for technology adhesives. This demand has been driven, in part, by miniaturization.
“As the market for high-quality electronics has increased in the past few years, the need for material to protect and bond electronic components has also increased,”
“The market in 2017 is expected to grow by 8.89% compared to 2016.”
The electronics adhesive market caters to various industries, he said, including telecommunications, defense, computer, consumer goods, and automotive products, which are likely to boost the growth of the market.
Increasing technological innovations and R&D have created the demand for reliable and compact electronic devices, while the need for decreased material costs and demand for smaller assemblies in specific applications has led to the miniaturization of electronic devices.
While he acknowledges that the smartphone market is slowing somewhat, technology adhesives will benefit from the market growth for Internet of Things (IoT) devices, which is expected to exhibit higher growth than the smartphones and tablets segment by 2020.
Tomi Engdahl says:
2017: Tool And Methodology Shifts
http://semiengineering.com/2017-tool-and-methodology-shifts/
Second of two parts: System definition to drive tool development, with big changes expected in functional verification.
As the markets for semiconductor products evolve, so do the tools that enable automation, optimization and verification. While tools rarely go away, they do bend like plants toward light. Today, it is no longer the mobile phone industry that is defining the direction, but automotive and the Internet of Things (IoT). Both of these markets have very different requirements and each creates their own pressures.
Tomi Engdahl says:
Near-field scanning: useful or misleading?
http://www.edn.com/electronics-blogs/the-emc-blog/4443189/Near-field-scanning–useful-or-misleading-
Near-field probes are useful tools for locationing the sources of emissions on PCBs, cables, and enclosures. Under certain conditions, the signals you see on a spectrum analyzer from a near-field probe can be misleading. With experience, you can overcome these obstacles.
Measurements can be a great emotional comfort. But, you should understand how the measurement is actually being made, so you can insure that you’re (1) making a good measurement of the thing we wish to measure, and (2) that your conclusions are reasonable and based in physics. Don’t make the mistake of blindly accepting measurements and draw significant conclusions from them. Near-field measurements are easily misinterpreted and significant care is needed to insure proper conclusions are drawn.
Finally, decoupling capacitors do more good than harm, that is, when designed properly and when their connection inductance is minimized.
Tomi Engdahl says:
Designing in ESD ruggedness
http://www.edn.com/design/systems-design/4441444/Designing-in-ESD-ruggedness
Both Ken, and fellow consultant Doug Smith, showed a number of low-cost, DIY ESD generators and detectors. Ken’s generators included a piezo-powered Coleman-brand lighter (only that brand can spark without turning on the butane – handy if you’re not also wanting to fire-test your product), and a plastic dish full of wrapped chocolate “Kisses”. Such low-tech means are capable of creating 50ps ESD edges!
Doug demonstrated another low-cost (if less tasty) ESD generator: a plastic rule with a foil spark-gap pattern glued onto it.
Sure, no one was saying you shouldn’t be able to perform more quantitative testing with proper ESD equipment, like a MiniZap ESD simulator. But having these extra DIY sources and detectors in the lab can only increase your capabilities.
Tomi Engdahl says:
TE, Molex to dual-source high-speed connectivity products
http://www.edn.com/electronics-blogs/designcon-central-/4443180/TE–Molex-to-dual-source-high-speed-connectivity-products
Connector giants TE Connectivity and Molex have signed a dual-source agreement where the companies will both source connectors, modules, and other products designed for high-speed serial applications. Having two sources for these products means that engineers can specify both companies into designs and purchasing people won’t be locked into one source, which mitigates potential delivery problems for production.
The product lines cover high-speed I/O such as pluggable modules, and backplane products such as connectors for datacenters. Specifically, the agreement covers zSFP+ interconnects, zQSFP+ interconnects, CDFP interconnects, microQSFP interconnects, and Nano-Pitch I/O interconnects.
Tomi Engdahl says:
What’s Next For Transistors
New FETs, qubits, neuromorphic approaches, and advanced packaging.
http://semiengineering.com/whats-next-for-transistors-and-systems/
The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced packaging schemes. On top of that, post-CMOS devices, neuromorphic chips and quantum computing are all in the works.
SE: What are some of the bigger issues with chip scaling?
Steegen: Of course, one of the big questions that you typically get about advanced technology nodes is this: Why are we still developing these costly nodes and what is the cost associated with these advanced technology nodes? For one thing, there is an explosion of data.
Chen: The lithography challenges are still there. Now, if EUV proves to be a production solution, that’s great. We can probably go longer on the scaling path. Overall, lithography is still a big problem.
SE: For now, IDMs like Intel may extend finFETs to the full-scaled 7nm node. Then, they are evaluating various transistor options at the full-scaled 5nm node. Meanwhile, foundries are following a more relaxed version of the nodes. Basically, a “foundry 5nm” resembles a full-scaled 7nm. And a “foundry 3nm” or so-called “5nm plus” may resemble a full-scaled 5nm. Regardless, at this point, the industry is evaluating the following technologies—finFETs; lateral gate-all-around FETs or nanowire FETs; and nanosheet FETs. How will this all play out?
Tomi Engdahl says:
Power Management Vs. State Machines
Why adding power management and control is so critical in complex SoCs.
http://semiengineering.com/power-management-vs-state-machines/
In the last several years, contemporary SoCs (systems-on-a-chip) have become very complex silicon solutions. They now consist of hundreds of millions of gates, 100 or more discrete Semiconductor Intellectual Property (SIP) blocks, high-speed data channels, megabytes of volatile and non-volatile embedded memory, increasing amounts of analog/mixed signal functionality, multiple CPU cores and multiple operating systems. In addition, robust, high-speed wireless connectivity is a prime requirement. All these features require millions of lines of application code to provide the rich feature sets the market demands today.
All these capabilities come at a high price. Silicon and software design costs have continued to increase with each new process node, becoming a major issue in the industry.
Tomi Engdahl says:
Artificial Intelligence Could Optimize Your Next Design
Modern electronics design is increasingly revealing the inadequacies of simulation-based verification. But researchers believe machine learning holds the answer.
https://www.designnews.com/content/artificial-intelligence-could-optimize-your-next-design/170028254147360?cid=nl.x.dn14.edt.aud.dn.20170124.tst004t
Tomi Engdahl says:
Intel 7 nanometers this year
At the beginning of January in Las Vegas CES show was first introduced in new PCs with Intel’s processor was a 10-nanometer Cannon Lake generations.
the company revealed the launch of 7 nanometer processors for pilot production as early as this year.
The volume of the company did not start the 7 nanometer preparation for another 2-3 years. The pilot line production is limited
Intel is the workhorse of today’s 14-nanometer processor, also known as Lake Kaby.
Other companies:
Samsung has already started to produce 10-nanometer chips for smartphones
Globalfoundries, AMD’s former manufacturing side, in turn, is told that it would launch seven nanometers already available in the course of this year.
Source: http://www.etn.fi/index.php/13-news/5745-intel-7-nanometriin-jo-taenae-vuonna
Tomi Engdahl says:
Subcutaneous Solar Cells Could Power Pacemakers
http://powerelectronics.com/solar/subcutaneous-solar-cells-could-power-pacemakers?NL=ED-003&Issue=ED-003_20170130_ED-003_24&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=9468&utm_medium=email&elq2=024b9bca2e58422885ed206c8d97dde9
A pacemaker is a device that is implanted in the abdomen or chest area to control abnormal heart rhythms. It utilizes electrical impulses to help the heart muscle maintain a proper rhythm and heart rate. Most pacemakers are usually powered with a primary battery that requires a replacement when it is depleted. Implant replacements due to battery depletion can account for about 25% of implantations of cardiac pacemakers.
Over the years, various power sources have been used for pacemakers—among them a radioactive material power source using plutonium-238. Another approach involved inductive transfer in a manner similar to charging a smartphone battery. Several other techniques have utilized the movement of the heart to harvest energy for powering the pacemaker. These approaches all had problems that limited their commercial use.
A new approach proposed by Swiss researchers involves the use of solar cells placed under the skin to power an electronic implant. The Swiss researchers found that a 3.6 square centimeter solar cell is all that is needed to generate enough power during winter and summer to power a typical pacemaker.
“As a promising alternative energy source, ambient sunlight could be used,”
Various research groups have put forward prototypes of small electronic solar cells that can be carried under the skin and can be used to recharge medical devices. The solar cells convert the light from the sun that penetrates the skin surface into energy.
Tomi Engdahl says:
Toshiba Confirms Memory Chip Spinoff
http://www.eetimes.com/document.asp?doc_id=1331270&
At a press conference here Friday(Jan. 27), Toshiba Corp. formally announced that it is in the market to sell a chunk — less than 20 percent — of its memory chip business.
Chief Executive Satoshi Tsunakawa explained why the sale is imperative. “In order to foster steady growth in the memory chip business — which is our key focus — we must make large-scale capital investments,”
Businesses Toshiba intends to spin off include flash memory, as well as a solid state device division that previously belonged to Toshiba’s Storage & Electronic Devices Solutions Company. Toshiba’s new spin-off, however, won’t include products such as hard disk drives, discretes or image sensors.
Tomi Engdahl says:
Samsung Beats Apple to Punch with MEMS Antenna Tuning Array
Cavendish Kinetics MEMS Tunes Antenna
http://www.eetimes.com/document.asp?doc_id=1331273&
Samsung Electronics Co. Ltd. has beaten rival Apple Inc. to the punch in offering microelectromechanical systems (MEMS) antenna tuning array that promises to instantaneously insert/remove antenna compensation capacitance to prevent dropped calls, improve reception, increase efficiency and save power in Samsung’s Galaxy A8.
Tomi Engdahl says:
Riddle: What Metal Conducts Electricity, But Not Heat?
http://hackaday.com/2017/01/27/riddle-what-metal-conducts-electricity-but-not-heat/
If you can’t answer the riddle, don’t feel bad. Metal conductors usually conduct electricity and heat. Usually, that’s true, but researchers at the Department of Energy’s Lawrence Berkeley National Laboratory and at the University of California, Berkeley, have found that vanadium dioxide can conduct electricity without conducting heat.
https://www.sciencedaily.com/releases/2017/01/170126142816.htm
Tomi Engdahl says:
Trump, Brexit Cloud Upbeat 2017
McClean describes IC growth, wild cards
http://www.eetimes.com/document.asp?doc_id=1331266
The semiconductor industry should have a good 2017 as long as political wild cards around the globe stay neutral or positive. Growth could hit 5 percent, led by DRAMs and flash as well as 32-bit microcontrollers, analog and automotive.
That was the view from Bill McClean’s annual Silicon Valley talk here. The president of market watcher IC Insights doesn’t believe the big plans cooking in China or the Trump administration will substantially impact the industry this year, but rising populism in Europe could dampen growth.
“We think this is a milestone year,” with IC sales of $314.1 billion, cracking the $300 billion mark for the first time, McClean said. He estimated the next milestone at $400+ billion in 2023, a long period of 4 to 5 percent compound growth.
“Memory will really drive growth this year,”
Tomi Engdahl says:
Samsung, Apple Remain Top Chip Buyers
http://www.eetimes.com/document.asp?doc_id=1331288&
Electronics heavyweights Samsung Electronics Co. Ltd. were the top buyers of semiconductors worldwide for the sixth consecutive year in 2016, accounting for a combined 18 percent of all chip sales, according to a report by market research firm Gartner Inc.
The two companies, which are the runaway leaders in smartphone sales, consumed a combined $61.7 billion worth of chips last year, up slightly from 2015, Gartner (Stamford, Conn.) said.
“While [Samsung and Apple] continue to exert considerable influence on technology and price trends for the wider semiconductor industry, their impact has lessened due to falling expectations for future growth,”
Tomi Engdahl says:
Tokyo 2020 Olympic medals to be made from old electronics
Citius, altius, fortius, recyclius
https://www.theregister.co.uk/2017/02/02/tokyo_2020_olympic_medals_to_be_made_from_old_electronics/
The plan is to collect 40kg of gold, 4,920kg of silver and 2,944kg of bronze, quantities the committee reckons will be boiled down into the 2,000kg of metals needed to produce the 5,000 medals to be awarded at the games.
Tomi Engdahl says:
System models help correlate measurements to simulations
http://www.edn.com/design/test-and-measurement/4443309/System-models-help-correlate-measurements-to-simulations
Do you use an oscilloscope to verify the operation of your design or do you simply trust your simulation? Being a conscientious engineer, you probably probe your DUT and view the waveform data on an oscilloscope. You also believe that you have an accurate device or component level schematic model, perhaps a SPICE model. You simulate the behavior at your test point (TP) in your model, and the results don’t exactly match what is shown on the oscilloscope. Is your model correct or is the measurement system, including probes and oscilloscope, at least partly to blame?
You may also notice that your circuit behavior changes when you probe the TP. In some cases, it gets worse or in others it gets better. Regardless, the simulation and measurements aren’t aligning and you’re stuck. How can you explain—or better yet simulate—why this is happening?