Chip Market Brightens in 2017. The semiconductor industry may yet have been flat in 2016, but expects it is expected that the electronics industry rebounds in 2017, probably in the first half. Wall Streeter predicts return to 5% growth. Total IC business growth is expected to be around five percents for few years to come.There seems to several promises to this direction, especially in memory business. Chips Execs See Maturing Industry article says that pessimism about immediate revenue and R&D growth is a sign of a maturing industry.
Thanks to both rising prices and volume sales, the memory sector is expected to lead overall semiconductor sales growth. Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. NAND flash will grow almost as fast at 10% next year. The average annual growth rate for the memory market is forecast to be 7.3% from 2016-2021. Every year we need 5.6% more bits than previous year, and the unit prices are increasing on both DRAM and Flash.
There will be also other growth sectors. The data center will be the fastest growth segment next year, rising 10%, followed by automotive at 9% and communications at 7%. Consumer and industrial markets growing at about 4% in line with the overall industry. PCs will be the big drag on 2017, declining 2%.
China Dominates Planned Chip Fabs as more than 40% of front end semiconductor fabs scheduled to begin operation between 2017 and 2020 are in China, a clear indication that China’s long-stated ambition to build a significant domestic semiconductor industry is taking shape.
Trump Win Could Mean Big Questions for Manufacturing as while Trump vowed to keep American manufacturing jobs, he offered little in the way of stated policy other than the promise to punish companies that sent manufacturing job outside the US. Questions about trade also could directly affect US manufacturing. How that plays out is a big unknown.
Europe will try to advance chip manufacturing, but not much results in 2017 as currently there is almost no leading-edge digital chip manufacturing left in Europe as the local companies have embraced outsourcing of digital semiconductor manufacturing to foundries. The European Commission intends to reconvene a high-level group of European CEOs and executives to exchange views on Europe’s 10/100/20 nanoelectronics and chip manufacturing project and make adjustments as necessary for a wave of European Union investment supposedly starting in 2020. The two most advanced wafer fab locations left in Europe in terms of deep sub-micron miniaturization belong to Intel in Leixlip, Ireland and Globalfoundries in Dresden, Germany.
Smaller geometries are to be taken into use and researched in 2017. Several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner. As TSMC, GF/Samsung Battle at 7nm the net result is in the course of 18 months chip designers will see at least three variants of 7nm — separate immersion variants from TSMC and Globalfoundries and the EUV version from GF/Samsung. Intel has yet to detail its 7nm node.
At the same time R&D has begun for 5nm and beyond, but Uncertainty Grows For 5nm, 3nm as costs are skyrocketing. Both 5nm and 3nm present a multitude of unknowns and challenges. To put this in perspective, there are roughly two silicon atoms in 1nm of line width in a chip. Etching Technology Advances as atomic layer etch (ALE) moves to the forefront of chip-making technology—finally. TSMC recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion targeted for TSMC’s 5nm and 3nm processes, which are due out in 2020 and 2022.
Moore’s Law continues to slow as process complexities and costs escalate at each node. Moore’s Law is dead, just not in the way everyone thinks. SiFive believes open source hardware is the way forward for the semiconductor industry. Technological advances keep allowing chips to scale, but the economics are another story – particularly for smaller companies that can’t afford chips in the volumes. The solution, according to San Francisco-based startup, SiFive, is open-source hardware, specifically an architecture developed by the company’s founders called RISC-V (pronounced “risk-five”). Done right SiFive, which was awarded Startup of the Year at the 2016 Creativity in Electronics (ACE) Awards, believes that RISC-V will do for the hardware industry what Linux has done for software. For example 5th RISC-V Workshop Points to Growing Interest in the RISC-V Platform.
Sensors are hot in 2017. These tiny, powerful solutions are creating the interface between the analog and the digital world. Data is everywhere, and sensors are at the very heart of that. While no one really knows what technology’s next “killer application” will be, we are confident that any killer app will rely on sensors.Appliance autonomy promises to make life simpler, but this field has still lots of to improve even after year 2017.
Interface ICs will continue to help simplify high-bandwidth designs while making them more robust and reliable. Application areas that will benefit include automotive, communications, and industrial. Both wired and wireless interface solutions have plenty of applications.
Analog’s status is rising as more sensors and actuators are added into electronic devices, pressure is growing to more seamlessly move data seamlessly back and forth between analog and digital circuitry. IoT pushes up demand for analog content and need for communication between these two worlds will continue to grow. Analog and digital always have fit rather uncomfortably together, and that discomfort has grown as SoCs are built using smaller feature sizes. The demand for analog silicon has always existed in the embedded space, but the advent of the Internet of Things (IoT) is increasing the demand for connected mixed-signal content. At 28nm and 16/14nm, standard “analog” IP includes a fair amount of digital content.
It seems that hardware designer is a disappearing resource and software is the king in 2017. It is becoming less and less relevant in what format the device is used in many applications. Card computers are standard products and are found in many different card formats that can be used in very many applications. Embedded development is changing to more and more coding. More software designers that understand some hardware are needed, but it is not easy to leap to move to the hardware to software.
The power electronics market is moving at very fast pace. Besides traditional industrial, renewable, and traction sectors, new applications such as energy-storage systems, micro-grids, and dc chargers are emerging. As the automotive world moves to electric vehicles, this creates challenges for IGBT and SiC-MOSFET ICs, and their associated gate drivers. New packages for high-voltage IGBTs and high-voltage SiC-MOSFETs are introduced.
More custom power distribution and higher voltages on data center computer systems in 2017. OpenRack and OpenCompute projects are increasing the distribution voltage inside the server itself. This approach, plus transitioning to new materials such as gallium nitride in the power-conversion systems, can reduce overall power consumption by 20% and increase server densities by 30-40%.”
Power Modules and Reference Designs will be looked at in 2017 even more than earlier in power electronics. The semiconductor and packaging technologies used in power modules have advanced considerably, and the industry is developing modules today that are denser, less expensive, and easier to use. Designers want to rely on power modules to speed up designs and optimize space using smaller, easy-to-use power modules. Module manufacturers hope that engineers will increasingly choose a module over a discrete design in many applications.
The bi-directional DC/DC converter has been around for a while, but new applications are quickly emerging which necessitate the use of this architecture in so many more systems. Battery back-up systems need bi-directional DC/DC converters. Applications today require better energy efficiency and such systems as green power with solar or wind generation, need storage so that when there is no wind or sun available the electricity flow is not interrupted.
Power supplies need to become more efficient. Both European Union’s (EU) Code of Conduct (CoC) Tier 1 and CoC Tier 2 efficiency standards are to be taken into use. The European Union’s CoC Tier 1 effectively harmonizes the EU with US DoE Level VI and became effective as a voluntary requirement from January 2014, two years ahead of Level VI. Its adoption as an EU Ecodesign rule is currently under review to become law with an implementation date of January 2017. The key difference between the CoC requirements and Level VI is the new 10% load measure, which imposes efficiency requirements under a low-load condition where historically most types of power supplies have been notoriously inefficient. CoC Tier 2 further tightens the no-load and active mode power consumption limits.
During 2016, wireless-power applications started to pick up across many fields in the semiconductor industry, and it will continue to do so. Wireless power will continue to gain traction with increased consumer demand. Hewlett Packard, Dell, jjPlus, and Witricity have already announced products based on Airfuel standards. And, products based upon the Qi standard will continue to grow at a rapid pace.
Other prediction articles:
In Power & Analog 2017 Forecast: What Experts Are Saying article representatives from major players in the semiconductor industry share their predictions for 2017 regarding power modules, wireless power, data converters, wireless sensing, and more.
Looking Ahead to 2017 article tells on to what SIA is focused on working with. “U.S. semiconductor technology should be viewed as a strategic national asset, and the Administration should take a holistic approach in adopting policies to strengthen this vital sector,” the letter says
Hot technologies: Looking ahead to 2017 article collection has EDN and EE Times editors explore some of the hot technologies in 2017 that will shape next year’s technology trends and beyond.
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Tomi Engdahl says:
NI VirtualBench reaches 500 MHz
http://www.edn.com/electronics-products/electronic-product-reviews/designcon/4457509/NI-VirtualBench-reaches-500-MHz
National Instruments’ VirtualBench, a PC-based “lab in a box,” now has a model with a 500-MHz oscilloscope, the VB-8054 ($7,999). That’s up from 350 MHz (VB-8034, $5999) and 100 MHz from the original model (VB-8012, $1999). According to National Instruments, the VB-8054 will be available in March 2017.
In addition to higher bandwidth, the VB-8054 samples at 2 Gsamples/s and it adds two digital inputs, bringing the total to 34. The function generator can now produce a 40-MHz sine wave, a 5-MHz square, ramp/triangle functions, DC, and you can create your own signals.
There’s no need to install drivers or application software to run VirtualBench, just connect it to your PC through a USB, Ethernet, or Wi-Fi connection. The software will download into your computer and run automatically. You can get software updates online as well.
Tomi Engdahl says:
DesignCon 2017 video: Expected and unexpected products
http://www.edn.com/electronics-blogs/rowe-s-and-columns/4457644/DesignCon-2017-video–Expected-and-unexpected-products
With PAM4 showing up just about everywhere, you’d expect the oscilloscope companies to be on top of it. After all, a DesignCon paper covered the world’s fastest PAM signal.
PAM4 is now becoming part of Optical Internetworking Forum, and Ethernet standards for 56 Gbps and the upcoming 112 Gbps data rates. To keep up with those standards, engineers will need compliance-test procedures that will use oscilloscopes, bit-error-rate testers (BERTs), and signal analyzers. The video below shows a 56 Gbps (28 Gbaud) PAM4 compliance test running on a Teledyne LeCroy 65 GHz oscilloscope. The QPHY-56G-PAM4 option was released on Feb. 1 at DesignCon.
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DesignCon 2017 video: Expected and unexpected products
Martin Rowe -February 13, 2017
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When I walk around trade show exhibit halls, my video camera is always at hand. Aside from the fact that I knew know who I might encounter, I find taking short videos a good way for you to see that was on display. Plus, video doesn’t miss the details I might miss when taking notes. With that in mind, I present videos of usual (page 1) and unusual (page 2) products from DesignCon 2017.
With PAM4 showing up just about everywhere, you’d expect the oscilloscope companies to be on top of it. After all, a DesignCon paper covered the world’s fastest PAM signal.
PAM4 is now becoming part of Optical Internetworking Forum, and Ethernet standards for 56 Gbps and the upcoming 112 Gbps data rates. To keep up with those standards, engineers will need compliance-test procedures that will use oscilloscopes, bit-error-rate testers (BERTs), and signal analyzers. The video below shows a 56 Gbps (28 Gbaud) PAM4 compliance test running on a Teledyne LeCroy 65 GHz oscilloscope. The QPHY-56G-PAM4 option was released on Feb. 1 at DesignCon.
There’s more than one way to analyze a PAM4 signal. Multilane teamed with Texas instruments to show how adding equalization can improve signal quality by compensating for losses in a transmission medium.
Tomi Engdahl says:
FTC Charges Qualcomm With Monopolizing Key Semiconductor Device Used in Cell Phones
https://www.ftc.gov/news-events/press-releases/2017/01/ftc-charges-qualcomm-monopolizing-key-semiconductor-device-used
Company’s sales and licensing practices hamper Qualcomm’s competitors and threaten innovation in mobile communications, according to FTC
The Federal Trade Commission filed a complaint in federal district court charging Qualcomm Inc. with using anticompetitive tactics to maintain its monopoly in the supply of a key semiconductor device used in cell phones and other consumer products.
Qualcomm is the world’s dominant supplier of baseband processors – devices that manage cellular communications in mobile products. The FTC alleges that Qualcomm has used its dominant position as a supplier of certain baseband processors to impose onerous and anticompetitive supply and licensing terms on cell phone manufacturers and to weaken competitors.
Tomi Engdahl says:
Semiconductor CapEx To Increase 4.3% In 2017
Sales growth up slightly from 2016; Intel, SK Hynix, Toshiba and Western Digital lead the pack.
http://semiengineering.com/semiconductor-capex-to-increase-4-3-in-2017/
Semiconductor capital expenditures are an important bellwether for the industry. Based on preliminary findings, Semico Research predicts 2017’s total will increase 4.3% to $69.7 billion, a record high, and a slightly larger increase than in 2016.
Semico tracks more than 80 companies for CapEx and R&D spending
consistent is that the top 10 spend about 80% of the total amount each year. Some of the companies contributing to the increase include Intel, SK Hynix, and Toshiba and Western Digital.
Intel made big news by increasing its CapEx by $2.4 billion from 2016. Intel’s CapEx is expected to increase 25% over 2016, from $9.6 billion to $12 billion, in 2017. The company recently announced plans to complete Fab 42 in Chandler, Ariz.
Fab 42 will produce 7nm technology, although no specific timelines for opening were mentioned. More than $7 billion will be spent on the fab over the next three to four years.
As recently as June 2016, Brian Krzanich was quoted as stating that $9 billion in annual CapEx was “about the right number”, so it is interesting that seven months later the amount had risen by $2.5 billion.
After Intel, the next largest spending increases are coming from Western Digital and Toshiba. The companies plan to ramp 64-layer BiCS3 NAND during 2017. In 1Q17, they will break ground on Fab 6, which will support the conversion from 2D NAND to 3D NAND capacity. Fab 6 is planned to begin operating in 2018. Keep in mind that 3D NAND capacity requires a substantial amount more capital investment than did planar NAND.
Other memory companies are among the largest spenders as well. SK Hynix will increase its spending in 2017 for NAND, as they plan to install a new cleanroom in M14 to increase capacity as well as develop and mass produce 72-layer 3D NAND. Samsung has not announced its guidance yet for 2017 CapEx, but it will be preparing for NAND production at the Pyeongtaek campus by mid-2017.
Finally, Micron’s 2017 CapEx will be down about 13% for the calendar year, after a 17% increase in 2016. The company has achieved bit crossover on 20nm DRAM, and it is deploying 1xnm.
It has begun production of Gen Two 64-layer 3D NAND, and expects to ship 3D XPoint for revenues this year.
Other companies in the top 10 are the foundries. Major foundry CapEx will be flat to down from 2016 to 2017. This includes TSMC, UMC and SMIC.
Tomi Engdahl says:
Get Ready For Nanotube RAM
This nonvolatile technology is as fast as DRAM, uses same tools and processes as other memory.
http://semiengineering.com/get-ready-for-nanotube-rams/
The memory market is going in several different directions at once. On one front, the traditional memory types, such DRAM and flash, remain the workhorse technologies in systems despite undergoing some changes in the business. Then, several vendors are readying the next-generation memory types in the market.
As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading.
Nantero is a developer of carbon nanotube RAMs, called NRAMs.
SE: What do NRAMs bring to the party?
Schmergel: Our memory answers that need. It is as fast as DRAM, while being nonvolatile. We do have unlimited endurance as well. And that has led to a lot of rethinking of the memory hierarchy and how you design systems and devices. It has led to us partnering with a number of the world’s largest memory users, both on the standalone and embedded side.
SE: We’ve been hearing about the new memory types for years. Suppliers have made some bold promises, but most have failed to deliver. Thoughts?
Schmergel: There has always been skepticism. But the openness for new options has gone up dramatically. The industry has really started to think about what these new technologies could do for their products.
SE: What is a carbon nanotube RAM and how does it work?
Schmergel: NRAM is nanotube random access memory. It’s based on carbon nanotubes, which are either in contact with each other or not in contact with each other to form high resistive and low resistive states. So you have very distinct ‘0s’ and ‘1s’. This is because there is a large difference in resistance between the ‘on’ and ‘off’ state. The carbon nanotubes move from position to position in picoseconds. So it’s a very fast memory. It requires low energy to write. And it doesn’t wear out.
SE: Last year, Fujitsu Semiconductor and Mie Fujitsu Semiconductor licensed Nantero’s NRAM technology. The companies also announced a joint development deal. Mie Fujitsu, a foundry venture between Japan’s Fujitsu and Taiwan’s UMC, plan to make NRAM devices for customers. Are NRAMs shipping yet?
Schmergel: They are not shipping yet. But it’s in an advanced stage of development. We have about a dozen customers. One customer, Fujitsu, has already announced product availability in 2018 for an embedded memory product offering. They plan to make standalone memory as well. We are working with other customers on other products as well.
Tomi Engdahl says:
DesignCon 2017 video: Expected and unexpected products
Martin Rowe -February 13, 2017
http://www.edn.com/electronics-blogs/rowe-s-and-columns/4457644/DesignCon-2017-video–Expected-and-unexpected-products
Tomi Engdahl says:
Rogue Valley Microdevices: The birth and growth of a unique MEMS Foundry
http://www.edn.com/design/analog/4457772/Rogue-Valley-Microdevices–The-birth-and-growth-of-a-unique-MEMS-Foundry
While attending the SEMICON West 2016 show in San Francisco, I had the pleasure of meeting with Jessica Gomez, the President/CEO of Rogue Valley Microdevices (RVM), an innovative MEMS foundry nestled in Rogue Valley, Oregon along the Rogue River. In this article I will bring you an understanding of how a MEMS foundry operates and creates those amazing MEMS devices that permeate our electronics world. I will also show how a foundry is born, nurtured, and grows into a successful tech resource for the electronics industry.
Their company is a full-service precision MEMS foundry combining state-of-the art process modules coupled with engineering expertise. They are capable of taking customers from the early R&D stage and continuing on through pilot production and finally to full production.
But how does a MEMS foundry get started and then grow successfully into a full-blown supplier of MEMS services?
The mindset: One size does not fit all in MEMS manufacturing
Sometimes customers begin with ordering three wafers per month and ultimately they want to run volume and keep their tools busy as a successful financial goal. Usually 1,000 wafers per month is an initial targeted goal.
When a customer leaps from a university or small lab project to $100K-sized orders of parts per month, it’s tough to get going
Rogue Valley Micro also will do ‘single-step processing’ which is when a customer is building a device and they may not have passivation capability, or they can’t grow oxide because they are not permitted to have certain chemicals on their site, or they may have a sputterer and are able to do metal deposition but they are in an area where Silane is not permitted in the building.
Gomez and Kayatta’s company also helps customers that need test wafers with oxide for either breaking in their polishing pads or using them as lithography monitors. The customer only needs a wafer with one film layer on it in that case.
Rogue Valley Microdevices uses the best materials as well as maintaining a flexibility to their customers:
Gold, platinum and silver are among the standard process materials used in the fab
They have flexible equipment sets and can accommodate small batch sizes even at 200mm wafer sizes
Working with non-standard materials is not a problem
Rogue has no problem providing data for an ultimate technology transfer to the customer
MEMS Processing
The MEMS world is very three-dimensional. People discuss more standardization in IC processes, such as in the Silicon industry, in which they move from 80nm nodes to 50 nm nodes and they use a certain type of metallization for gates, and another type for other IC areas; however, the MEMS world is the complete opposite.
For a conventional semiconductor, 9 times out of 10, the die will go into a plastic package like a QFN or other standard solder-mounted package, flip-chip, etc. The recipe book is already written for that stuff
On the MEMS side, each new product almost invents new rules of fabrication and the packaging and materials are so unique in this space.
Thin Films play a highly important role in the semiconductor manufacturing process as passivation layers, oxidation layers, masks, insulating layers and gate dielectrics.
Polymer materials were another area of interest from customers.
90% of the customers they work with use silicon as their wafer substrate starting material. Here is why:
When building MEMS, if you are going to do bulk micro-machining for KOH (Potassium Hydroxide) etching or TMAH etching (Tetramethylammonium Hydroxide), you will need Silicon as the starting material.
The test wafer market uses mostly Silicon.
Customers send a wafer populated with chips for something like signal processing in a CMOS wafer and they want RVM to build a MEMS sensor on top of it. They will use Silicon here; for example, maybe they get 0.18 micron wafers from TSMC with CMOS ASIC circuitry and on top of that they need a sensor array.
RVM has the capability to grow oxide and nitride films on silicon wafers.
Basically, Lithography in a MEMS fab, is transferring a pattern to a photosensitive material by exposure to any source of radiation such as light.
RVM has I-Line stepper lithography (I-Line Projection uses an ultraviolet [UVA] wavelength of 365.4 nm) capability.
RVM also has Lift-Off processing which is the combination of photolithography and deposition techniques into a single process module
Spray coating of the photoresist may be done when there is a severe topography that needs coating
Etch processing
In 2014 RVM installed the TMAH (Tetramethyl Ammonium Hydroxide) and KOH (Potassium Hydroxide) bench at the request of a large customer. TMAH and KOH are critical chemicals in the silicon wafer etching and cleaning process.
Many of their customers needed dry etch capability as well. To respond to their customer needs, RVM installed their Reactive Ion Etch (RIE) Tool.
PVD is a family of processes used to deposit ultra-thin layers of atoms or molecules from the vapor phase onto a solid substrate in a vacuum chamber. Two very common types of processes used are Sputter Deposition and Electron Beam Evaporation
With larger growth projections coming due to the Internet of Things, Smart cars and Smart homes, etc. plans are underway to support more growth
Tomi Engdahl says:
Inverted mode switches
http://www.edn.com/electronics-blogs/living-analog/4457607/Inverted-mode-switches-
Certain types of discrete transistors, the NPN 2N2222 and the PNP 2N2907, can be operated as inverted mode switches where “inverted” means that the collector is made to serve as an emitter and the emitter is made to serve as a collector.
can deliver extremely low saturation voltages in their inverted mode on-states where “low” means on the order of microvolts.
There are limitations to be observed when using the transistors in inverted mode service however. The emitter-serving-as-a-collector to base voltage must not exceed the base-to-emitter reverse breakdown voltage of that pn-junction. Also, the emitter to collector current needs to be kept small meaning being kept to less than one milliampere.
Tomi Engdahl says:
Dual mixer enables 5G wireless access
http://www.edn.com/electronics-products/other/4457399/Mixer-enables-5G-wireless-access
Optimized for 5G MIMO receivers, the LTC5566 downconverting mixer from Linear Technology is equipped with programmable-gain IF amplifiers. The dual mixer has a very wide 300-MHz to 6-GHz input frequency range and supports IF bandwidths of up to 400 MHz.
Each channel of the LTC5566 incorporates an active mixer and a digital IF variable-gain amplifier with a 15.5-dB gain-control range. The gain of each channel is independently programmable in 0.5-dB steps via an on-chip SPI bus. With each channel driving an ADC, the fine gain control provides a simple means to balance the gain of the two channels and calibrate to the optimum level with minimal external components.
Tomi Engdahl says:
GlobalFoundries Adds an Advanced RF SOI Manufacturing Process
http://mwrf.com/services/globalfoundries-adds-advanced-rf-soi-manufacturing-process?NL=MWRF-001&Issue=MWRF-001_20170223_MWRF-001_513&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=9811&utm_medium=email&elq2=00f4c7514b304cf99b9e5922b925bd5f
In recent years, silicon has proven as tough to live with as to live without. The material has trouble hitting the high frequency bands increasingly used in wireless communications, but it is also vital for etching filters, switches, and amplifiers all on the same chips, which engineers covet for being small and energy efficient.
But on Tuesday, an update came for one of the most successful technologies to bridge that gap. GlobalFoundries, one of the world’s largest chip manufacturers, began selling tools to help engineers make chips based on its latest manufacturing process, one that is optimized for millimeter waves, which are considered vital for 5G communications.
The technology is known as a silicon-on-insulator process, more commonly known as SOI. It involves wrapping two layers of silicon around an insulator material – using anything from silicon dioxide to sapphire – slashing power leakage and improving efficiency. It has been used in computer processors and in the development of silicon photonics.
In a configuration called RF SOI, the chips are designed specifically for radio components, ranging from switches to low-noise amplifiers. These are major parts of the front ends that decipher wireless signals flowing in and out of smartphones and communications satellites. For 5G, they will have to support high frequency bands, which are sparsely used in modern cellular equipment or consumer devices.
Related
The new manufacturing process, 45RFSOI, involves etching circuits only 45 nanometers long onto silicon wafers, almost four times longer than the most advanced computer chips under development by GlobalFoundries. But those microscopic circuits are enough to lift RF SOI into high frequency bands, from 24 to 100 gigahertz, where wireless carriers are likely going to move communications after 4G.
Tomi Engdahl says:
Intersil is now a Renesas Company
https://www.renesas.com/en-hq/about.html
Intersil is now a Renesas Company
We’re excited to complete our merger with Renesas, a global leader in microcontrollers and embedded devices.
Intersil will continue to provide the great power and precision analog products
Tomi Engdahl says:
Xilinx fires a 5G solution shot across the bow of RF and data converter companies
http://www.edn.com/electronics-products/electronic-product-reviews/other/4457848/Xilinx-fires-a-5G-solution-shot-across-the-bow-of-traditional-RF-and-data-converter-companies
Well, now we are on the road to 5G and fast approaching the need for better signal chain solutions and Xilinx has rocked the industry again. They have embedded RF-class analog technology into their 16nm, all programmable MPSoC architecture. This new RFSoC design does not need discrete external data converters because they have integrated high speed/high performance ADCs and DACs into their SoC solution with a direct RF sampling architecture, bringing the industry closer to the goal of the software defined radio. This added flexibility in the digital domain is great news for 5G with massive MIMO, as well as for millimeter wave wireless backhaul needs. Xilinx claims an amazing board footprint and power savings reduction of 50 to 75%.
Moving from 4G to 5G
Today’s 4G radio access networks (RAN) have a bundle of lossy coaxial cables and wires to deal with in order to connect with remote radio heads (RRH). This system has power losses that need to be mitigated
For many years, designers have been on the ever-elusive quest of moving the digital and analog radios closer and closer to the antenna. The first step toward this goal was using active antenna arrays
The active antenna array worked for 4G systems, but with the advent of the huge number of connected devices for a viable 5G system, designers needed something new. Along came massive MIMO and beam-forming. These were a good start toward making 5G a reality.
Taking this design to the next level, layouts like mounting “tiles” along the exterior of a building, or billboards/signs, etc. are possible
Now here is where the Xilinx all-programmable RFSoC will enable an architecture to leap-frog to the next major step toward realizing 5G—a system design that is scalable for a flexible design with sub-arrays
Xilinx has managed to cleverly take routing a step further in simplicity by eliminating existing high-speed data converter interface lines presently running around 12.5Gb/s with the JESD204B protocol and eliminate those PB board lines altogether
The Xilinx integration of the high speed data converters onto their RFSoC takes the PC board from the top image to the smaller bottom image. This reduces power, board footprint, and speeds a designer’s time-to-market by removing the JESD204B IP cores and serial transceivers from the equation.
What will direct RF sampling do for flexibility?
Conventional intermediate frequency (IF) sampling provides for analog signal conditioning before the ADC. This architecture provides for a pretty power-efficient design, but the multiple analog filter components will have a larger footprint on the PC board, a more complex BOM with bulk analog filter components, and restricted flexibility because of fixed bulk components
Putting the signal conditioning in the digital domain after the ADC sampling will provide the designer with a greater flexibility in the digital domain, eliminating the higher power, higher sampling, larger board footprint, and BOM complexity of discrete filter components
By using the TSMC 16nm FinFET advanced CMOS process, Xilinx has created its all programmable RFSoc with integrated digital front-end (DFE), multi-channel scalability needed for 5G, and elimination of the JESD204B bus. This complete RF data converter subsystem on an integrated platform, which I never thought would happen this soon
My concern here was crosstalk between the multiple DACs and ADCs. In the 2015 paper, it was reported as follows:
FPGA-to-analog crosstalk was measured by mapping 100 k D-FFs to the FPGA. The D-FFs were simultaneously toggling at the FPGA clock rate while driving 2048 SLLs connected to the 16 DACs. The measurement was done while the DAC synthesized a 70 MHz full scale output tone at 800 MS/s using on-die memory. Measured crosstalk was better than 92 dBc for up to 12 W of switching power.
The same measurement was performed on the ADC while sampling a 70 MHz input tone at 250 MS/s. The crosstalk was not observable as it was lower than the ADC noise floor.
Pretty darn good. And for performance: Receive SNDR 61.6 dBFS to Nyquist at 500 MS/s and transmit SFDR 63.8 dBc to 400 MHz at 1.6 GS/s was measured. I never thought I would see that in an IC with an FPGA.
So TSMC’s 16nm FinFET process and Xilinx clever designers have combined to show exceptional high speed analog results, especially in the performance/watt of the converter subsystems in the RFSoC.
The IC is using a ZYNC Ultrascale+ MPSoC 64 bit processor scalability. Xilinx claims that this IC will apply Moore’s Law to analog. I agree. Let’s see how the 2018 and 2020 Olympics deploy some of this technology to realize 5G promises.
Tomi Engdahl says:
Fault Simulation Reborn
http://semiengineering.com/fault-simulation-reborn/
A once indispensable tool is making a comeback for different applications, but problems remain to be solved.
Fault simulation, one of the oldest tools in the EDA industry toolbox, is receiving a serious facelift after it almost faded from existence.
In the early days, fault simulation was used to grade the quality of manufacturing test vectors. That task was replaced almost entirely by Scan Test and automatic test pattern generation (ATPG). Today, functional safety is causing the industry to dust off the cobwebs and add a few new tricks into the fault simulation tool box. But not everything is working smoothly yet.
Fault simulation is now being used for three independent applications. It continues to be used for some manufacturing test applications. It is now being used to measure the quality of the functional testbench so that product quality can be increased. The third application, and the one driving the resurgence of fault simulations, is the need to find out if a running design can detect and recover from failure, thus ensuring safety of operation.
Tomi Engdahl says:
Embedded computing market projected to grow, but challenges remain
http://www.controleng.com/single-article/embedded-computing-market-projected-to-grow-but-challenges-remain/79ebec0fed13b1607a8a07c2549b4ba5.html
IHS Markit’s projects that the embedded computing market, currently valued at an estimated $2.54 billion in 2015, will grow for the next 5 years at a compound annual growth rate (CAGR) of 3.7%, but ATCA revenues have declined.
Sales in 2017 typically depend on design wins made in 2014 and 2015 and grow at different rates for different form-factors because of varying sector exposure. Commercial communication projects, for example, have typically become “run rate” business faster than defense, civil aerospace or railway projects. System-level technologies typically reach run rate business faster than board-level business.
For system-level ATCA, for example, 2014 was a reasonable year for design wins. However, vendors report that the outcome of these wins has not materialized into the production runs originally forecast. In some cases, system vendors would offer both ATCA-based and software-based products simultaneously and the latter outsold ATCA systems by far. As a result, ATCA vendors may have to transition away from a focus on hardware and telecom platforms to a more software-centric one, for example, by investing in new product lines to enable the transition to SDN/NFV environments.
Tomi Engdahl says:
Lead-Acid Battery Applications Drive the Li-ion Market
http://electronicdesign.com/power/lead-acid-battery-applications-drive-li-ion-market?NL=ED-003&Issue=ED-003_20170227_ED-003_620&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=9862&utm_medium=email&elq2=4e4869f9f9ce45dab5f4b3ab8acfcef0
Although important, neither consumer electronics nor electric vehicles are the main forces behind the growth in new battery technologies—instead it’s coming from “everything else.”
The consumer market for lithium-ion (Li-ion) batteries is huge—about $10 billion worth of battery packs—but it’s also relatively flat with only a modest 2% growth rate. Of course, there’s a news-grabbing growth market for electric vehicle batteries, with a forecasted compound annual growth rate (CAGR) of 10%, reaching $10 billion in 2025. Surprisingly, though, the biggest growth area for adoption of new batteries is “everything else,” from forklifts to ventilators. This battery market, which often falls into the “medium format” category, is maintaining a robust 11% CAGR and is also expected to reach $10 billion by 2025.
These “other” applications for Li-ion batteries generally have one thing in common—they’re devices that were typically powered by sealed lead acid (SLA). SLA batteries cornered the portable power market for the last nearly 200 years, but that’s finally changing thanks to Li-ion chemistry formulations with more diverse capabilities and more sophisticated electronics available.
Lead acid was the first rechargeable battery developed for commercial use in the 1850s. Although lead acid has been around for more than 150 years, it continues to be widely used.
The first, and perhaps only, significant innovation to lead-acid technology came in the 1970s, namely sealed lead acid (or maintenance-free lead acid). It includes valves to control venting of gases during charge or rapid discharge.
SLA batteries are often categorized by type or application. Two types of SLA technology are common today: gel, also known as valve-regulated lead acid (VRLA), and absorbent glass mat (AGM).
Remarkably, the market dominance of lead-acid batteries remained relatively unchallenged for hundreds of years until the introduction of Li-ion batteries in the 1980s.
The Li-ion battery was first invented in the 1970s.
The first Li-ion cells introduced to the market were in hard aluminum or steel cans
However, as more applications adopted Li-ion technology, more variations on the cells emerged in terms of physical form, chemical performance, and price point.
Modern, thin Li-polymer cells enabled smartphones, tablets, and wearable electronics.
Tomi Engdahl says:
Embedded FPGAs Come Of Age
http://semiengineering.com/embedded-fpgas-come-of-age/
These devices are gaining in popularity for more critical functions as chip and system designs become more heterogeneous.
FPGAs increasingly are being viewed as a critical component in heterogeneous designs, ratcheting up their stature and the amount of attention being given to programmable devices.
Once relegated to test chips that ultimately would be replaced by lower-power and higher-performance ASICs if volumes were sufficient, FPGAs have come a long way. Over the last 20 years programmable devices have moved steadily up the food chain from glue logic to co-processors, and they have been utilized in a variety of high-performance, mission-critical applications from data centers to supercomputers.
Now they are being embedded into devices alongside a cluster of CPUs, utilizing the same bus structure for pre- or post-processing, as a way of reducing reduce the main processor cluster’s load. Embedded FPGAs also are being used for network acceleration, performing packet processing, deep packet inspection, encryption/compression or other types of package processing before the switch or CPU structure has to decide what to do with that information.
For some time, base-station providers have been interested in embedded FPGAs because processors are needed for handing the protocols back; as well, they use a lot of fixed functions for the modulations schemes and error corrections, among other tasks. “This is a fixed function that has to work very efficiently and very quickly, so that belongs on a ASIC to get the benefit of the ASIC process to make that work as fast as possible,” said Kelf. “But there may be times when different modulations schemes are used, and it would be nice to be able to change that when needed.”
“When you do chip-to-chip communications, regardless of whether it is FPGA-to-ASIC or any chip-to-chip, particularly in high bandwidth applications, you’re going through some type of high-speed pipe,” said Mensor. “That latency doesn’t slow down the maximum processing speed, but because there are interactions back and forth, it slows down the performance of the overall system. If you can eliminate that latency, there are huge increases in system performance.”
“FPGAs used to be second-class citizens, where the main cool thing—the main performance-related processing stuff—was done by the CPU or the main ASIC or SoC, and some minimum tasks were given to the FPGA,” said Anush Mohandass, vice president of marketing and business development at NetSpeed Systems. “What the CCIX Initiative did was make FPGA a first-class citizen. It now accesses the same memory. It accesses the same information as the main processor would. Companies like Microsoft figured out they could accelerate workloads and how processing was done by giving it to an FPGA.”
“The embedded FPGA takes that one level higher, and this is what many datacenter providers such as Facebook, Alibaba, and Amazon are realizing,”
Mohandass said. “Their software is moving is very fast. There are new algorithms. They want to accelerate searches, or how fast they can get to a shopping list, and that changes in a one-month or three-month cadence. If you want to do a hardware chip for this, it will take three years, and by the time you get it the algorithm is out of date. An embedded FPGA allows for a piece of an FPGA to be put in an SoC, and all they need to change is that portion. That’s software-programmable hardware, where you gain the benefits of the rest of ASIC or SoC and still get the programmability.”
Tomi Engdahl says:
Chopper amp has 3 MHz gain bandwidth
http://www.edn.com/electronics-products/other/4457603/Chopper-amp-has-3-MHz-gain-bandwidth
A dual op amp from STMicroelectronics, the TSZ182 offers a temperature-stable input-offset voltage of 25 µV at 25°C to enable high measurement resolution and accuracy without external trimming components. With an offset drift of less than 100 nV/°C, the part maintains accuracy over a wide temperature range and saves periodic auto-recalibration.
The chopper-stabilized op amp is well-suited for use in body-signal monitors, blood-glucose meters, industrial sensors, and factory automation, as well as for low-side current sensing.
Tomi Engdahl says:
High Density PCB Layout of DC/DC Converters, Part 1
http://e2e.ti.com/blogs_/b/powerhouse/archive/2015/09/11/high-density-pcb-layout-of-dc-dc-converters-part-1?HQS=sva-null-null-pentonever-asset-e2e-null-wwe&DCM=yes
Today, in an era of intense competition, the challenge for product designers is to stay ahead of the pack and not merely walk in lockstep with it. This ups the ante for system designers to innovate with differentiated products.
One important way to innovate is with high-density designs. In the push for smaller-footprint solutions, power system designers are now focusing on the question of power density – the output power per unit of area or volume of a power converter circuit.
Careful layout can coincide with better switching performance, lower component temperatures and reduced electromagnetic interference (EMI) signatures.
The essential steps in the PCB design flow for DC/DC converters are:
1. Choose the PCB structure and stack-up specification.
2. Identify the high di/dt current loops and high dv/dt voltage nodes from the schematic.
3. Perform power stage component layout and placement.
4. Place the control IC and complete the control section layout.
5. Perform critical trace routing, including MOSFET gate drive, current sense, and output-voltage feedback.
6. Design the power and GND planes.
Tomi Engdahl says:
Power Management 101: Power MOSFET Charactertics
http://powerelectronics.com/discrete-power-semis/power-management-101-power-mosfet-charactertics?code=UM_Classics02117&utm_rid=CPG05000002750211&utm_campaign=9866&utm_medium=email&elq2=e0f3cefa27e24a83ad4f9cfc5245a208
What are the important power MOSFET characteristics?
To understand the planar and trench MOSFET characteristics, check several parameters critical to their performance:
Blocking voltage (BVDSS)
Maximum single pulse avalanche energy (EAS)
On-resistance (RDS(ON))
Maximum junction temperature (TJ(max))
Continuous drain current (ID)
Safe operating area (SOA)
Gate charge (QG)
Threshold Voltage (VGS(th))
Body-Diode Forward Voltage (VSD)
Maximum Allowable Power Dissipation (PD)
Thermal Resistance, Junction-to-Case (Rθjc)
dv/dt capability
Tomi Engdahl says:
Inductor Core Material: The Heart of an Inductor
http://powerelectronics.com/content/inductor-core-material-heart-inductor?code=UM_Classics02117&utm_rid=CPG05000002750211&utm_campaign=9866&utm_medium=email&elq2=e0f3cefa27e24a83ad4f9cfc5245a208
Inductors are deceptively simple. However, a closer look reveals underlying complexity. How else can you explain the many types of core materials, types of windings, sizes, geometries and wide range of applications? This article will discuss three examples of the numerous types of material: silicon steel, soft iron powder and ferrites.
What’s a Magnetic Core?
An inductor’s magnetic core is made of specially formed material with “soft” magnetic properties. Although physically hard, a magnetic core is said to be “soft” when it doesn’t retain significant magnetism. A magnetic core is usually surrounded by carefully arranged windings of wire. The combination of magnetic core and windings results in a measurable property called inductance. There are various types of “soft” magnetic materials as well as different types and shapes of magnetic cores.
What Does a Magnetic Core Do?
Functionally, an inductor’s magnetic core stores recoverable energy.
Magnetically, an inductor’s core provides the medium to concentrate and contain magnetic flux. The combination of winding turns and volume of magnetic material sets an upper limit on the maximum allowable magnetic flux a core can sustain.
Another important core parameter is called permeability. Permeability is inversely related to reluctance. A core with high reluctance has low permeability and vice versa. Permeability is an important parameter because it can be thought of as a flux multiplier.
Behavior of Different Core Materials
Silicon steel is relatively inexpensive and easy to form. In addition, silicon steel is a metal with low resistivity. Low-core resistivity means silicon steel readily conducts electrical current. The result is that undesirable eddy currents can flow in the core material. Eddy currents contribute to heating and core loss. In addition, a silicon steel core tends to reach the point of saturation rather easily.
The solution to rapid saturation is to introduce an air gap in the magnetic flux path.
Soft iron powder has higher resistivity than silicon steel. By special processing, iron particles are insulated from each other. The particles are mixed with a binder (such as phenolic or epoxy). The cores are then pressed into their final shape. Next, a baking process is used to cure the cores. After curing, many tiny air gaps combine to provide a distributed air gap effect.
When compared to other magnetic materials, such as ferrites, the distributed air gap allows powder cores to store higher levels of magnetic flux. The distributed air gap also allows higher dc current levels before saturation occurs.
Ferrite is a crystalline magnetic material made of iron oxide and other elements.
Ferrites have high magnetic permeability and high electrical resistivity.
With their high resistivity, ferrites are ideal for use as inductors.
Tomi Engdahl says:
UMC Begins Mass Production of 14nm
http://www.eetimes.com/document.asp?doc_id=1331400&
Taiwanese foundry United Microelectronics Corp. has initiated mass production of 14nm chips using its 14nm FinFET technology, the company said Thursday (Feb. 23).
UMC (Hsinchu, Taiwan) said it is shipping 14nm wafers to lead customers and has achieved “industry-competitive yields” using the process.
UMC says its 14nm FinFET technology offers 55 percent higher speeds and twice the gate density compared to its 28nm process technology.
Tomi Engdahl says:
Laser Sensor focus an image in five milliseconds
The flight time ToF-measuring sensor (time-of-flight) is used in a variety of applications to measure distances and identify objects. STMicroelectronics has now presented a new sensor that detects multiple objects at once more from a distance. The sensor makes the smartphone’s camera faster.
VL53L1 sensor measures the distance to an object in five milliseconds.
The module has a size of 4.9 x 2.5 x 1.56 -millinen. The light source is a 940 nanometer laser component.
Source: http://www.etn.fi/index.php/13-news/5930-laseranturi-tarkentaa-kuvan-viidessa-millisekunnissa
The VL53L1 is an I2C capable module that is in production and available now.
More: http://www.st.com/en/imaging-and-photonics-solutions/vl53l1.html
Tomi Engdahl says:
NXP Spinout Nexperia Signals Changes in Market
http://electronicdesign.com/blog/nxp-spinout-nexperia-signals-changes-market?NL=ED-003&Issue=ED-003_20170301_ED-003_767&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=9903&utm_medium=email&elq2=5964f927f21e4120ac906638f9da0c0b
Nexperia has been officially launched as an independent supplier of discrete, logic, and MOSFET devices.
While NXP will focus on its high-performance mixed-signal business, Nexperia will focus on automotive applications accelerating the introduction of new automotive products thanks to new investments in R&D and manufacturing.
Tomi Engdahl says:
Forget Shrinking Transistors. Fuse Them Together in Three Dimensions.
http://electronicdesign.com/microprocessors/forget-shrinking-transistors-fuse-them-together-three-dimensions
The art of shrinking transistors onto computer processors has become vastly more complex over the last several years. Intel, the world’s largest semiconductor company, has struggled to develop the next generation of computer processors on the same two-year schedule it has followed for decades. To complicate matters, processors have stopped getting cheaper with each generation.
An army of researchers, toiling in the shadows of the electronics industry, has been searching for ways around that dilemma. Notably, the French microelectronics laboratory LETI is building mobile processors in three dimensions rather than simply etching transistors onto a flat substrate. It recently extended its relationship with Qualcomm, whose Snapdragon processors are widely used in smartphones and other mobile devices.
LETI has developed a new process for stacking thin layers of semiconductor material, which contain transistors, without degrading the performance of the transistors or the metal interconnects between the different layers. These monolithic 3D chips behave like a single device, generating less heat and consuming less power than traditional chips.
“Instead of having 2D chips, we can replace them with 3D chips that are the same size,”
That process of stitching together separate wafers is achieved with through-silicon vias (TSV), a rival technology to CoolCube.
The semiconductor industry expects to reach the 10 nm node in the next few years, but it will likely have an extremely complex design. In the last five years, the industry has been forced to make semiconductor somersaults to reach the next generation of processors. These include finFET transistors with multiple logic gates and multi-step patterning to deal with the high electrical resistance of smaller chips.
CoolCube, however, has to contend with its own stumbling blocks. Faynot acknowledged that researchers still have to decide which parts of the monolithic 3D chips should carry out CPU functions: Is it a single layer of transistors, or should it be spread out over the entire chip? Another concern, he said, is determining how to test the inner layers of the chip.
Faynot is noncommittal about when CoolCube might be used in mobile devices, though he speculates it will be at least five more years.
Tomi Engdahl says:
2017 SIL Update: Package LED Market Saw a 3% Uptick in 2016
http://www.strategies-u.com/articles/2017/02/2017-sil-update-package-led-market-saw-a-3-uptick-in-2016.html
In 2015, the package LED market took a massive hit due to the drastic price erosions along with harsh exchange rates in most regions. Another reason 2015 was a harsh year for many companies in this space was due to markets that were previously deemed as ‘growth markets’ such as displays and mobile experienced decline. Though lighting grew overall, the declining prices of mid-power and high-power LED packages did not bode well for many companies.
Tomi Engdahl says:
What Does An AI Chip Look Like?
As the market for artificial intelligence heats up, so does confusion about how to build these systems.
http://semiengineering.com/what-does-an-ai-chip-look-like/
Depending upon your point of reference, artificial intelligence will be the next big thing or it will play a major role in all of the next big things.
This explains the frenzy of activity in this sector over the past 18 months. Big companies are paying billions of dollars to acquire startup companies, and even more for R&D. In addition, governments around the globe are pouring additional billions into universities and research houses. A global race is underway to create the best architectures and systems to handle the huge volumes of data that need to be processed to make AI work.
Market projections are rising accordingly. Annual AI revenues are predicted to reach $36.8 billion by 2025, according to Tractica. The research house says it has identified 27 different industry segments and 191 use cases for AI so far.
Tomi Engdahl says:
Engineering Jobs and Salaries Keep Growing
The Bureau of Labor Statistics is projecting a 3% increase in engineering jobs in North America over the next seven years.
https://www.designnews.com/automation-motion-control/engineering-jobs-and-salaries-keep-growing/179079547856378?cid=nl.x.dn14.edt.aud.dn.20170301.tst004t
Tomi Engdahl says:
Cheap Oscilloscopes Don’t Have to be Low Quality!
Introducing Keysight’s InfiniiVision 1000 X-Series Oscilloscopes
http://www.keysight.com/main/campaign.jspx?cc=FI&lc=fin&ckey=2817853&id=2817853&cmpid=zzfind1000x-seriesinfo
Tomi Engdahl says:
the inventor of lithium-ion battery is revolutionizing the world again
University of Texas Veteran researcher John Goodenough lithium-ion battery known as the father. Now, this invention, the mobile devices revolutionized the 94-year-old inventor is doing the same trick again. He has developed a battery that is made up entirely of solid materials.
Battery Goodenoughin and researcher Maria Helena Braga Energy & Environmental Science magazine published on alkael metals and fixed glass electrolyte.
They arise battery that can not be ignited by the energy density is three times better than current batteries, and the preparation of which is preferred.
And that’s not all. Charging the Battery NEW manages to current lithium-ion batteries more quickly. In tests the battery is charged 1200 times without loss of capacity.
Next, Goodenough and Braga intend to commercialize the sodium battery technology
Source: http://www.etn.fi/index.php/13-news/5931-litiumioniakun-keksija-mullistaa-maailman-uudelleen
Tomi Engdahl says:
MIT important breakthrough in optical circuits
now MIT researchers have developed two prototypes, which utilize optical communications
Normally, the crystalline silicon-based CMOS circuits can not be used a second-order non-linearity, which makes the optical kompoennteista more efficient and reliable. MIT researchers report on two silicon-based non-linearities utilizing a prototype. These are the modulator that encodes optical data into the beam and taajuustuplaaja, which is important for the development of lasers that can be tuned precisely to various frequency ranges.
Existing silicon modulators are doped structures. MIT The structure of the researchers is far alloy. This makes it allows to provide a solution which produces an optical signal to modulate the electric field.
The researchers demonstrated frequency doubler is a similar solution, but the active regions are arranged at regular intervals transverse waveguide strips.
Source: http://www.etn.fi/index.php/13-news/5937-mit-tarkea-lapimurto-optisissa-piireissa
Tomi Engdahl says:
Lithium-Ion Battery Inventor Introduces New Technology for Fast-Charging, Noncombustible Batteries
https://news.utexas.edu/2017/02/28/goodenough-introduces-new-battery-technology
A team of engineers led by 94-year-old John Goodenough, professor in the Cockrell School of Engineering at The University of Texas at Austin and co-inventor of the lithium-ion battery, has developed the first all-solid-state battery cells that could lead to safer, faster-charging, longer-lasting rechargeable batteries for handheld mobile devices, electric cars and stationary energy storage.
Goodenough’s latest breakthrough, completed with Cockrell School senior research fellow Maria Helena Braga, is a low-cost all-solid-state battery that is noncombustible and has a long cycle life (battery life) with a high volumetric energy density and fast rates of charge and discharge. The engineers describe their new technology in a recent paper published in the journal Energy & Environmental Science.
“Cost, safety, energy density, rates of charge and discharge and cycle life are critical for battery-driven cars to be more widely adopted. We believe our discovery solves many of the problems that are inherent in today’s batteries,” Goodenough said.
Additionally, because the solid-glass electrolytes can operate, or have high conductivity, at -20 degrees Celsius, this type of battery in a car could perform well in subzero degree weather. This is the first all-solid-state battery cell that can operate under 60 degree Celsius.
Another advantage is that the battery cells can be made from earth-friendly materials.
“The glass electrolytes allow for the substitution of low-cost sodium for lithium. Sodium is extracted from seawater that is widely available,” Braga said.
Tomi Engdahl says:
Quality Issues Widen
http://semiengineering.com/why-some-devices-dont-work/
Rising complexity, diverging market needs and time-to-market pressures are forcing companies to rethink how they deal with defects.
As the amount of semiconductor content in cars, medical and industrial applications increases, so does the concern about how long these devices will function properly—and what exactly that means.
Quality is frequently a fuzzy concept. In mobile phones, problems have ranged from bad antenna placement, which resulted in batteries draining too quickly, to features that take too long to load. These are considered inconveniences, and not all that surprising for first-generation devices. If a phone doesn’t work after five years, that isn’t surprising.
It’s far less ambiguous when a battery overheats.
Many other issues go unreported, however, because they are either fixed in software or they cannot be replicated.
“If you look at some of the big failures, it can be three or four things together that cause the problem,” said Kiki Ohayon, vice president of business development at Optimal+. “It can be an issue with design, with end usage, or with manufacturing. Even if you have a design defect, that implies the marginality to fail is higher, but it does not mean all of the devices will fail.”
Tomi Engdahl says:
Intel’s 10-nanometer has difficulty
Intel had to switch processors this year production of 10-nanometer. Located in Israel, the factory had to start 10-nanometer circuits volume production in the second half. Now, this is in danger of schedule.
Bluefin Research Partners is a research institute revealed that Intel has great difficulty in obtaining the yield of 10-nanometer chips to a sufficient level. It is estimated that mass production can be delayed for 2-3 months. This would push next year to start production of circuits.
likely that Intel will provide some 10nm chips on the market, probably 2-in-1 hybrid devices.
Currently, Intel sells laptops seventh-generation Core processors. 8th-generation architecture designed for the 14-nanometer process
Source: http://www.etn.fi/index.php/13-news/5959-intelin-10-nanometria-vaikeuksissa
Tomi Engdahl says:
The new smart phone battery five times longer cope
Lithium-ion battery has made possible the emergence of the mobile world, but the technique has low energy density of users with a perpetual headache. Fortunately, new technologies are being developed all the time. Now, American scientists demonstrate the promising lithium-sulfur battery.
Lithium Sulfur energy density is about five times better than lithium-ion batteries.
So far it has had one unfortunate shortcoming – Their capacity has rapidly deteriorated.
Professor Bingqing Wein-led team has developed a mechanism by which spontaneously arise polysolfidit be tied in such a way that they do not impair the performance of the cathode.
The technology is commercially promising, because manufacturing is successful existing battery production lines.
Source: http://www.etn.fi/index.php/13-news/5966-uudella-akulla-alypuhelin-jaksaa-viisi-kertaa-pidempaan
Tomi Engdahl says:
In Quiet Endorsement of Silicon Carbide, Littelfuse Invests $15 Million in Monolith
http://electronicdesign.com/power/quiet-endorsement-silicon-carbide-littelfuse-invests-15-million-monolith?NL=ED-003&Issue=ED-003_20170308_ED-003_588&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=10010&utm_medium=email&elq2=edffe8dcffa84f8a954470e86e13bdc3
Littelfuse, a major supplier of circuit protection devices, invested $15 million to take majority ownership of Monolith Semiconductor, a startup that has developed power devices based on silicon carbide and targeting applications in renewable energy and electric vehicles.
Monolith makes power diodes and switches out of silicon carbide, an advanced semiconductor that allows devices to switch faster, handle higher voltages, and suppress heat better than silicon chips. It also has the potential to significantly cut the energy lost in power conversion, making it a popular replacement for silicon.
Co-founded in 2013 by Kiran Chatty, a former engineer at SemiSouth Laboratories, Monolith released its first products last year, a pair of diodes rated for 1200 volts and said to reduce losses by over 50%.
SiC chips can be used inside devices that needs to switch between direct and alternating current. Yole Développement, a technology research firm based in Lyon, France, estimates that replacing silicon with SiC can optimize the efficiency of DC-AC conversion from 96% to 99% and AC-DC conversion from 85% to 90%. That allows devices to be smaller and – potentially – lower cost.
But it has been a long road from silicon carbide’s origins as an industrial abrasive to an advanced semiconductor. The market has been slowed down by the complex and costly process of carefully etching patterns into SiC wafers, with certain manufacturing methods taking over 200 steps. Silicon is also not giving up easy, with companies pushing devices to higher voltages with lower losses.
In an earlier stage is another advanced semiconductor called gallium nitride, or GaN, which has made a big splash in the power electronics industry for promising the same performance as SiC with lower costs, since it can be layered onto cheap silicon wafers. GaN, which also has applications in antiballistic missile radar and lighting, has been billed as a successor to silicon.
Infineon’s $3 billion acqusition of International Rectifier in 2014 set off a wave of investment in the sector. Transphorm, a gallium-nitride power electronics startup, has raised over $212 million
The market’s slow rate of change has not exhausted the optimism of industry analysts. Richard Eden, who follows the power semiconductor market for IHS Markit, estimates that sales of silicon carbide and gallium nitride chips reached $210 million in 2015, rising to around $1.265 billion in 2020.
Eden said in a report last year that silicon carbide was already fighting in price with superjunction Mosfets, a type of high-voltage silicon transistor, at around 900 volts. He estimated that that GaN layered on cheap silicon substrates would match the price of silicon MOSFETs and insulated-gate bipolar transistors (IGBTs) by 2020.
Tomi Engdahl says:
Financial Times:
Sources: Softbank to sell 25% of UK chip designer ARM, worth about $8B, to SoftBank-led Saudi-backed $100B Vision Fund
https://t.co/0kWZacXbTl
Tomi Engdahl says:
Antenna Design Grows Up
http://semiengineering.com/antenna-design-grows-up/
Modern electronics relies heavily on antennas, but companies still make mistakes. That’s about to change.
Ever since antennas dropped out of sight, most consumers don’t give them a second thought.
The antennas are still there, but they’re no longer visible. And they’re even more important than before, and significantly more complicated to design.
“It’s a very complex issue becoming more complex. Automotive, unequivocally, is the most complex system for any wireless engagement from an antenna placement, selection, management perspective,” noted Richard Barrett, senior product marketing engineer, automotive wireless technology at Cypress Semiconductor. “I can’t think of any industry that would even approach the complexities of automotive, outside of something like aerospace or military. Automotive is more complex because of the many models that you have in a consumer industry.”
Engineers have to start off with understanding what their limitations are, and what they need to work with in order to find the optimal solution
Placement is key for antennas, and the best location generally is where there is the least influence from the environment on performance.
“Ideally, antennas placed in their intended operational environment should perform just as they usually do when they’re designed in isolation—without anything around them,”
The best placement for an antenna also depends upon the intended use of the antenna
Consider an antenna integrated into a mobile phone. The phone’s orientation can vary continuously, and the phone needs to have continual contact with the nearest cell tower. If the mobile phone’s antenna has weak gain in the direction of the cell tower, then the weakness in that link has to be made up by using more transmit power, or by increasing the sensitivity of the receiver, which lead in turn to reduced battery life.
Then, for omnidirectional antennas, the antenna should be placed in a location where its radiation pattern will be as undisturbed as possible, which usually means placing it as far away from other conductors as possible. This runs counter to the frequent requirement that the overall product (containing the antenna) be as small as possible.
Further complicating matters is that fact there probably will be conflict between the antenna and other devices that are transmitting or receiving.
“You’re pretty much guaranteed to have conflict,”
To address these issues, the best that chipmakers can do is provide recommendations. “If you’re in a metal box, you have to cut a slot in the box so there’s someplace for the RF to get into,” said Barrett. “It’s got to be able to see outside. If you can cable outside to an outside antenna, that’s a great idea.”
And then there is the issue of how much an antenna design will cost.
“Everyone would like to be able to use a cheap Inverted F printed circuit board antenna to do everything in the world, but that’s just from the cost side of things,” he said. “From the engineering side, you’d love to have nice dipole antennas, cabled out to the most optimal location, end cabin use, facing the consumer. And for external vehicle, you want that facing outside the car in the proper direction. Those are the two extremes. The real world is somewhere in the middle.”
Over-the-air upgrades are another area that can be impacted. For these, a vehicle may be sitting in a garage and the media server in the house is automatically downloading to the vehicle to upgrade the software, just like a smartphone.
Conclusion
Antenna design today is still part black art, but that is about to change given its role in the IoT and automotive arenas. Future design approaches will draw on knowledge about a design from many sources, not just the previous experience of a design team. That collection of data points will find its way into whatever tools are being used to design, verify and optimize antennas for each unique situation. Demand is rising along with the complexity of the antenna designs, and changes are coming quickly in this space.
Tomi Engdahl says:
Worst-Case Results Causing Problems
http://semiengineering.com/worst-case-results-causing-problems/
At 10nm and 7nm, overdesign can affect power, performance and time to market.
The ability of design tools to identify worst-case scenarios has allowed many chipmakers to flag potential issues well ahead of tapeout, but as process geometries shrink that approach is beginning to create its own set of issues.
This is particularly true at 16/14nm and below, where extra circuitry can slow performance, boost the amount of power required to drive signals over longer, thinner wires—and subsequently cause thermal issues due to increased resistance and capacitance. It also can propel design teams to utilize more extensive power management schemes, which in turn require more time to implement, debug and verify.
“The schedule has not changed,” said Ruggero Castagnetti, distinguished engineer at Broadcom. “But many times, the results we get out of tools are very pessimistic.”
We need tools with the knowledge of the frequency of this chip without someone having to say, ‘Here’s the voltage information for each instance.’
This becomes more problematic at each new node below 16/14nm because even with a reduction in voltage for some components, the overall power budget is getting squeezed due to more functionality being added into chips.
“You could get more transistors per dollar at each new node until the 28nm node, and this was built into the business model. But you don’t see that anymore. You see a flattening of system costs due to the difficulties of addressing these underlying physical challenges required to harvest the benefits of scaling.”
10nm And 7nm Routability – How Is Your CAD Flow Doing?
http://semiengineering.com/10nm-and-7nm-routability-how-is-your-cad-flow-doing/
Power integrity optimization can no longer be a reactive step in the backend process.
At DesignCon in January, I was a panelist at a panel session entitled “Power Integrity For 10nm/7nm SoCs – Overcoming Physical Design Challenges And TAT.” I
One of the most eye-opening moments was when Arvind Vel got a question from the audience: “Looking at the transition to 10nm and 7nm; from your customer interaction, what are yours and ANSYS’ experiences on the biggest surprise that customers see when arriving to those process nodes?” His answer was… routability. Not DVD, not noise, not EMI or thermal. Routability! In particular, those customers who skipped the 10nm node and are moving directly to 7nm could be in for a big, and fairly unpleasant, surprise.
I would second that experience based on my own customer interaction. And it underlines the complexity that physical designers are challenged with today compared to just a few years back: the boundaries between the traditional steps of a physical design flow – placement, CTS, routing, post-route optimization – are breaking down, and you need to design for routability and timing closure as early as the power grid creation stage.
This realization calls for different approaches – holistic approaches – and different flows than what exists today. Power integrity optimization needs to be taken in as a proactive step at the floorplanning / power grid stage instead of a reactive step later in the backend process.
Tomi Engdahl says:
Smart Antennas Come Into View
No longer invisible or unforgotten, antennas are getting smarter all the time.
http://semiengineering.com/smart-antennas-come-into-view/
Antennas are getting smarter, particularly in light of their increasing complexity, along with the intricacies of the environments — existing and new — they play in.
In some cases, there may even be five Bluetooth devices in one vehicle (one in the infotainment, two in the telematics, and two in the rear seat systems). He said this is not driven by antennas so much as by the applications that are too much for one radio, although some of it is driven by the need to have antennas facing what they need to.
Because of these new use models, Barrett believes there’s going to be an opportunity for companies that are doing antennas, smart antennas, and higher end antenna solutions. “The world would love to use cheap PCB Inverted F antennas but there are companies that do higher end stuff — like Ethertronics, Mitsumi or Laird — that are really spending time optimizing these solutions. It costs more money but that’s where the world is going to have to go if they want to continue to do what they want to do.”
BCC Research agrees. The market research firm recently said in a report that smart antennas continue to provide the bulk of the technological impetus that will leave a lasting impact on the antenna industry. Further, the company said that as the industry waits for 5G, antenna vendors are busy perfecting the adoption of smart antenna constructs across power values, operating distances and frequency ranges. They predict the global antenna market should grow from $16.8 billion in 2016 to $22.5 billion by 2021, demonstrating a five-year compound annual growth rate (CAGR) of 6.0%. The smart antenna, which BCC said dominates the market, should reach $4.7 billion and $7.6 billion in 2016 and 2021, respectively, reflecting a five-year CAGR of 10.1%.
Tomi Engdahl says:
Reuters:
Sources: Japan may block sale of Toshiba memory chip unit to foreign suitors other than US firms over national security concerns — The Japanese government, fretting over the future of Toshiba Corp’s flagship memory chips unit, is prepared to block a sale to bidders it deems a risk to national security …
Exclusive: Japan to vet bidders in Toshiba chip sale for national security risks – sources
http://uk.reuters.com/article/us-toshiba-accounting-exclusive-idUKKBN16H1C1
Tomi Engdahl says:
Next year, sold one thousand billion IC chip
Last year, 868.8 billion were sold in a separate IC chip. IC Insights that the number will increase next year for the first time in more than a trillion. Thus, the market stuffed into 1.0026 trillion chip.
Two-thirds of all the components is Discrete Semiconductors (44 per cent) and optoelectronics (25 per cent). Analog circuits accounts for 15 percent, logic circuits, six, five memory chips and microprocessors and controllers accounted for three per cent of the total.
The number has grown steadily over the years and rather busy pace.
Source: http://etn.fi/index.php?option=com_content&view=article&id=5987&via=n&datum=2017-03-10_15:20:02&mottagare=30929
Tomi Engdahl says:
The new shell to protect integrated circuits against attacks
French research center for microelectronics Leti has developed a new kind of physical protection against the penetration of micro circuits. It is the rear side of the circuit mounted in the casing, which prevents the reading circuit, for example an infrared laser.
Physical protection is needed when the attacker is a circuit or device in their hands.
A let researchers developed micro-circuits a new shell. It consists of a sinuous metal layer between the two polymer. One of these prevents the penetration of infrared and ionic radii.
Another polymer film circuit is directly related to the surface, making it detects chemical attacks.
Any changes in the structure of the circuit will remove all sensitive data.
Source: http://www.etn.fi/index.php/13-news/5988-uusi-kuori-suojaa-mikropiireja-hyokkayksilta
Tomi Engdahl says:
The Week In Review: Design
http://semiengineering.com/the-week-in-review-design-77/
SoftBank to sell 25% stake in ARM; task graphs for virtual prototyping; automated interconnect timing closure; LPDDR4 update.
SoftBank plans to sell a 25% stake in ARM to Vision Fund, a $100 billion technology fund created last year by SoftBank and Saudi Arabia’s Public Investment Fund. SoftBank and Saudi Arabia are investing $25 billion and $45 billion in the fund, respectively. Another potential major player is Mubadala Development Co., the government-owned Abu Dhabi investment firm which owns GlobalFoundries and, at 10.3%, is the single largest shareholder in AMD. Mubadala is reportedly considering investing up to $15 billion in the fund. The ARM stake is being valued by SoftBank at $8 billion.
ARM debuted its new debug and trace solution, CoreSight SoC-600, to offer debug and trace over functional interfaces such as USB, PCIe or wireless, reducing the need for hardware debug probes while increasing data throughput.
Tomi Engdahl says:
Batteries safe for use in humans and fish
http://www.edn.com/electronics-blogs/power-points/4458024/Batteries-safe-for-use-in-humans-and-fish
Batteries of various technologies and form factors get a lot of attention for many reasons. Everyone is looking for a battery with higher energy density by weight and volume, with superior discharge (and even charge) specifications, and low cost. As a result, there’s been lots of attention on lithium-ion (Li-ion) chemistry and its many variations, since that seems to offer – at least for the foreseeable future – the greatest potential (pun intended) in meeting those density objectives.
Still, there are applications where unusual chemistries, construction, and form factor are the priorities, more than just an incrementally better Li-ion cell.
They are developing edible, biocompatible batteries that use non-toxic materials already present in the body, with available liquids such as stomach acid as the electrolyte
The idea is that the electrodes will dissolve harmlessly after use. Most of the resulting batteries, using a variety of soluble cations, had modest voltages (between 0.5 and 0.7 volts); although definitive specifications are hard to find, there was one mention of 5 milliwatts of power for up to 20 hours.
It’s not just humans who need special batteries. A microbattery developed by Pacific Northwest National Laboratory (see “A battery small enough to be injected, energetic enough to track salmon”) is just 6 mm long and 3 mm wide and weighs only 70 mg (Figure 2), and is used to power acoustic fish tags.
These grain-of-rice sized batteries can supply enough power to send a 744-microsecond signal every three seconds for about three weeks (or about every five seconds for a month). Energy density is specified at 240 WHr/kg
Tomi Engdahl says:
Austen Hufford / Wall Street Journal:
Intel to buy Mobileye, maker of chip-based camera systems for semi-automated driving, for $15.3B at $63.54 a share, a 34% premium to its Friday closing price — Deal marks latest investment by a technology company in the future of self-driving cars — Intel Corp. on Monday said it struck …
Intel Joins Silicon Valley’s Race to Make Best ‘Server on Wheels’
Acquisition marks latest investment by a technology company in the future of autonomous cars
https://www.wsj.com/articles/intel-to-buy-mobileye-for-15-3-billion-1489404970?mod=e2tw
Acquisition marks latest investment by a technology company in the future of autonomous cars
Intel has struck deal to acquire Mobileye for about $15.3 billion, the latest technology company to invest in the expanding autonomous cars business.
Tomi Engdahl says:
VNAs Prove to be Essential Tools for 5G Communications
http://mwrf.com/test-measurement-analyzers/vnas-prove-be-essential-tools-5g-communications?NL=MWRF-001&Issue=MWRF-001_20170314_MWRF-001_951&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=10093&utm_medium=email&elq2=acce12b4213a45cea981a3633e0cfc9b
The ultimate success of next-generation 5G communication systems will rely heavily on the measurement capabilities of vector network analyzers.
Vector network analyzers (VNAs) are general-purpose measurement instruments that can be used in a wide variety of applications. A perfect example is exemplified in their role in the 5G space, which has become hotbed of activity for VNAs.
To achieve the data rates desired for 5G communications, it is critical that the channels through which the data is passed do not constrain or degrade the data rate. While the information being conveyed is digital, the signals are fundamentally analog. As data rates increase, analog behavior becomes more critical.
VNAs are excellent tools for measuring signal integrity and diagnosing issues when data rates fall short of expectations. For example, VNAs are good for analyzing real-world channel defects, like exceeded tolerances on printed-circuit-board (PCB) artwork, as well as plating and dielectric thickness variations. They are able to evaluate connector performance, construction, and how well connectors are mounted. VNAs can also analyze multi-layer PCB stackups and find imperfect vias or ground-plane issues.
Converting frequency measurements to the time domain, VNAs can even measure the distance to a fault to pinpoint where issues occur. Some VNAs, such as the Anritsu ShockLine MS46500B series, offer an Advanced Time Domain option that enables signal-integrity engineers to measure parameters such as time-domain reflection (TDR), time-domain transmission (TDT), and crosstalk. Furthermore, these analyzers are able to display an eye diagram based on simulated data being transmitted over a measured channel.
When combined with a well-characterized optical modulator or photodiode, VNAs can determine the transfer function of optical transmitters, receivers, and transceivers, including key parameters such as bandwidth, flatness, phase linearity, and group delay.
Testing 5G Base-Station Components
At the base station, unparalleled performance will be required of 5G radios and their RF components. Getting the most out of these components requires a deeper understanding of their behavior. VNAs are used to make measurements as early in the design process as the wafer stage, where S-parameter measurements can be conducted on devices to ensure expected performance or build device models.
VNAs that cover frequency ranges from 70 kHz to 145 GHz in a single coaxial connection and utilize a wide range of standard embedding/de-embedding techniques allow signal-integrity engineers to realize the most accurate device models.
The move to microwave and millimeter-wave frequencies will require many more cell sites to account for the greater path losses at these frequencies.
Combined with historically more expensive microwave and millimeter-wave instrumentation, there is a need for dramatic reductions in cost for measurement equipment, such as VNAs. As a result, dedicated cost-effective VNAs have emerged
To achieve 5G’s required data rates, many infrastructure companies are employing multiple-input, multiple-output (MIMO) technologies with antenna systems employing large numbers of array elements, known as massive MIMO. This poses challenges for VNAs, which have been historically used to characterize antenna systems.
To address this issue, there has been an emergence of small microwave/millimeter-wave measurement modules tethered to a base VNA model to get closer to the devices-under-test (DUTs).
VNAs are an essential tool for enabling 5G communication systems. They can be used in applications ranging from data-center signal-integrity measurements, through characterization of the devices and components incorporated in fiber connectivity and millimeter-wave radios in next-generation base stations, to OTA measurements required to address massive-MIMO technologies.
Tomi Engdahl says:
Digitizer touts fast, high-res sampling
http://www.edn.com/electronics-products/other/4457783/Digitizer-touts-fast–high-res-sampling
Offering two channels, the ADQ7 digitizer from SP Devices combines 14-bit vertical resolution with a sampling rate of up to 10 Gsamples/s. The module hosts a Xilinx XCKU060 FPGA, which is made available through a firmware development kit.
The ADQ7’s 2.5-GHz analog bandwidth and high dynamic range make it well-suited for such applications as LIDAR, radar, mass spectrometry, RF sampling and recording, and ATE. Its analog front-end comes in AC-coupled (ADQ7AC) and DC-coupled (ADQ7DC) variants and accommodates a wide variety of sensors and measurement requirements. The ADQ7DC supports low or zero-IF radio applications, while the ADQ7AC is recommended for high-frequency RF applications.
The AC-coupled version provides two channels operating at 5 Gsamples/s. The DC-coupled version can be switched dynamically between two channels operating at 5 Gsamples/s and one channel at 10 Gsamples/s.
development kit that supports multiple languages including, but not limited to, C++, C#, MATLAB, Python, and LabView.
http://spdevices.com/index.php/products/digitizer-product-overview
Tomi Engdahl says:
Keysight adds 10 PXI AWG and digitizer modules
http://www.edn.com/electronics-products/other/4458006/Keysight-adds-10-PXI-AWG-and-digitizer-modules
Keysight Technologies takes another aim at PXI rival National Instruments with the introduction of ten PXI modules for generating and capturing waveforms. The set consists of two FPGA-based digitizers, four FPGA-based arbitrary waveform generators (AWGs), one AWG for generating IQ signals, and three oscilloscopes.
The FPGA-based instruments in the table come from Signadyne, acquired by Keysight in 2016. The addition of the FPGA gives digitizers the ability to perform data processing on board, relieving the system controller from that resource-intensive task. NI has had that ability for some time. Where Keysight differs is in having FPGAs for AWGs, a market NI has yet to enter. Adding an FPGA to a waveform generator lets you program waveforms with complex modulation for emulating wireless signals such as multiple input multiple output (MIMO). A graphical design environment lets you program the FPGA.
Tomi Engdahl says:
64-layer flash IC enables 1-Tbyte chips
http://www.edn.com/electronics-products/other/4458078/64-layer-flash-IC-enables-1-Tbyte-chips
Toshiba has added a 512-Gbit (64-Gbyte), 64-layer flash memory device that employs 3-bit-per-cell TLC (triple-level cell) technology to its BiCS Flash product line. This technology will allow the development of 1-terabyte memory chips for use in enterprise and consumer solid-state drives
BiCS (Bit Cost Scaling) Flash is a three-dimensional flash memory stacked-cell structure suitable for applications requiring high capacity and performance. The 512-Gbit BiCS Flash device is based on a third-generation 64-layer stacking process that achieves a 65% larger capacity-per-unit chip size than the company’s 48-layer, 256-Gbit (32-Gbyte) device. The resultant increase in memory capacity per silicon wafer also leads to a reduction of cost-per-bit.
In addition to the new 512-Gbit device, which is now sampling and scheduled for mass production in the second half of 2017, the BiCS Flash portfolio includes a 64-layer, 256-Gbit offering that is currently in mass production.
Sample shipments of the 1-Tbyte device are planned to commence in April of this year.
Tomi Engdahl says:
Intersil shrinks RS-485 transceiver
http://www.edn.com/electronics-products/other/4458030/Intersil-shrinks-RS-485-transceiver
Housed in a 4×5-mm, 16-lead QSOP, Intersil’s ISL32704E isolated RS-485 differential-bus transceiver is as much as 70% smaller than competing devices. The part offers a bidirectional data transmission rate of 4 Mbps and a working voltage of 600 VRMS for use in industrial IoT networks.
The ISL32704E employs GMR (giant magnetoresistance) technology to provide 2.5 kVRMS of galvanic isolation that keeps the communication bus free from the common-mode noise generated in electrically noisy factory and building automation environments.
Working with 3-V to 5-V power supplies, the transceiver delivers a minimum differential output voltage of 1.5 V into a 54-Ω differential load to maintain data integrity over long cable lengths.
In lots of 1000 units, the ISL32704E RS-485 transceiver costs $3.79 each.