Here are some of my collection of newest trends and predictions for year 2018. I have not invented those ideas what will happen next year completely myself. I have gone through many articles that have given predictions for year 2018. Then I have picked and mixed here the best part from those articles (sources listed on the end of posting) with some of my own additions to make this posting.This article contains very many quotations from those source articles (hopefully all acknowledged with link to source).
The general trend in electronics industry is that the industry growth have been driven by mobile industry. Silicon content in smartphones and other mobile devices is increasing as vendors add greater functionality. Layering on top of that are several emerging trends such as IoT, big data, AI and smart vehicles that are creating demand for greater computing power and expanding storage capacity.
Manufacturing trends
According to Foundry Challenges in 2018 article the silicon foundry business is expected to see steady growth in 2018. The growth in semiconductor manufacturing will remain steady, but there will be challenges in the manufacturing capacity and expenses to move to the next nodes. For most applications, unless you must have highest levels of performance, there may not be as compelling a business case to focus on the bleeding-edge nodes. Over the last two years, the IC industry has experienced an acute shortage of 200mm fab capacity (legacy MCU, power, sensors, 6-micron to 65nm). In 2018, 200mm capacity will remain tight. An explosion in 200mm demand has set off a frenzied search for used semiconductor manufacturing equipment that can be used at older process nodes. The problem is there is not enough used equipment available. The profit margins in manufacturing are so thin in markets served by those fabs that it’s hard to justify paying current rising equipment prices, and newcomers may have a tough time making inroads. Foundries with fully depreciated 200mm equipment and capacity already are seeing increased revenues in their 200mm business.The specialty foundry business is undergoing a renaissance, thanks to the emergence of 5G and automotive.
300mm is expected to follow a similar path for lack of capacity because 300mm fabs already produce leading-edge chips and more mainstream 300mm demand is driven by MCUs, wireless communications and storage applications. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm.
In 2017, marking the first time that the semiconductor equipment market has exceeded the previous market high of US$47.7 billion set in 2000. Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017. In 2018, 7.5 percent growth is expected to result in sales of US$60.1 billion for the global semiconductor equipment market – another record-breaking year. Demand looks solid across the three main growth drivers for fab tool vendors—DRAM, NAND and foundry/logic.
Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up in 2017, but the problem has been growing and spreading since then, so packaging customers may encounter select shortages well into 2018. Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018.
Market for advanced packaging begins to diverge based on performance and price. Advanced Packaging is now viewed as the best way to handle large amounts of data at blazing speeds.
Moore’s law
Many recent publications say Moore’s Law is dead. Though Moore’s Law is dead may be experiencing some health challenges, it’s not time to start digging the grave for the semiconductor and electronics market yet.
Even smaller nodes are still being taken to use in high end chips. The node names are confusing. Intel’s 10nm technology is roughly equivalent to the foundry 7nm node.In 2018, Intel is expected to finally ramp up 10nm finally in the first half of 2018. In addition, GlobalFoundries, Samsung and TSMC will begin to ship their respective 7nm finFET processes. On the leading edge, GlobalFoundries, Intel, Samsung and TSMC start migrating from the 16nm/14nm to the 10nm/7nm logic nodes. It is expected that some chip-makers face some challenges on the road. Time will tell if GlobalFoundries, Samsung and TSMC will struggle at 7nm. Early predictions are for solid growth in 2018, fueled by demand for memory and logic at advanced 10/7nm. 7nm is projected to generate sales from $2.5 billion to $3.0 billion in 2018. Over time 10nm/7nm is expected to be a big and long-running node. Suppliers of FPGAs and processors are expected to jump on 10nm/7nm.
South Korea’s Samsung Electronics said it has commenced production of the second generation of its 10nm-class 8-Gb DDR4 DRAM. Devices labeled 10nm-class have feature sizes as small as 10 to 19 nanometers. With the continued need for shrinking pattern dimensions, semiconductor manufacturers continue to implement more complex patterning techniques, such as advanced multi-patterning, for the 10nm design node and beyond. They also are investing significant development effort in readying EUV lithography for production at the 7/5nm design nodes. Samsung is planning to begin transitioning to EUV for logic chips next year at the 7nm node, although it is unclear when the technology will be put into production for DRAM.
There will be talk on even smaller nodes. FinFETs will get extended to at least to 5nm, and possibly 3nm in next 5 years. The path to 5nm loks pretty clear. FinFETs will get extended at least to 5nm. It’s possible they will get extended to 3nm. EUV will be used at new nodes, followed by High NA Lithography. New smaller nodes challenges the chip design as abstractions become more difficult at 7nm and beyond. Models are becoming more difficult to develop, integrate and utilize effectively at 10/7nm and beyond as design complexity, process variation and physical effects add to the number of variables that need to be taken into account. Materials and basic structures may diverge by supplier, at 7 nm and beyond. Engineering and scientific teams at 3nm and beyond will require completely different mixes of skills than today.
Silicon is still going strong, but the hard fact is that CMOS has been running out of steam for several nodes, and that becomes more obvious at each new node. To extend into new markets and new process nodes Chipmakers Look To New Materials. There are a number of compounds in use already (generally are being confined to specific niche applications), such as gallium arsenide, gallium nitride, and silicon carbide. Silicon will be supplemented by 2D materials to extend Moore’s Law. Transition metal dichalcogenides (TMDCs), a class of 2D materials derived from basic elements—principally tellurium, selenium, sulfur, and oxygen—are being widely explored by researchers. TMDCs are functioning as semiconductors in conjunction with graphene. Graphene, the wonder material rediscovered in 2004, and a host of other two-dimensional materials are gaining ground in manufacturing semiconductors as silicon’s usefulness begins to fade. Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. Future progress increasingly will require a mix of different materials and disciplines, but silicon will remain a key component.
Interconnect Materials need to to be improved. For decades, aluminum interconnects were the industry standard. In the late 1990s, chipmakers switched to copper. Over the years, transistors have decreased dramatically in size, so interconnects also have had to scale in size leading to roadblock known as the RC challenge. Industry is investing significant effort in developing new approaches to extend copper use and finding new metals. There’s also some investigation into improvements on the dielectric side. The era of all-silicon substrates and copper wires may be coming to an end.
Application markets
Wearables are a question mark. Demand for wearables slowed down in 2017 so much that smart speakers likely outsold wearable devices in 2017 holiday season. eMarketer is estimating that usage of wearable will grow just 11.9 percent in 2018, rising from 44.7 million adult wearable users in 2017 to 50.1 million in 2018. On the other hand market research firm IDC estimates that the shipments of wearable electronics devices are projected to more than double over the next five years as watches displace fitness trackers as the biggest sellers. IDC forecasts that wearables shipments will increase at a compound annual growth rate of 18.4 percent between 2017 and 2021, rising from 113.2 million this year to 222.3 million in 2021. At the same time fitness trackers are expected to become commodity product. Tomorrow’s wearables will become more fully featured and multi-functional.
The automotive market for semiconductors is shifting into high gear in 2018. Right now the average car has about $350 worth of semiconductor content, but that is projected to grow another 50% by 2023 as the overall automotive market for semiconductors grows from $35 billion to $54 billion. The explosion of drive-by-wire technology, combined with government mandates toward fully electric powertrains, has changed this paradigm—and it impacts more than just the automotive industry. Consider implications beyond the increasingly complex vehicle itself, including new demands on supporting infrastructure. The average car today contains up to 100 million lines of code. Self-driving car will have considerably more code in it. Software controls everything from safety critical systems like brakes and power steering, to basic vehicle controls like doors and windows. Meeting ISO 26262 Software Standards is needed but it will not make the code bug free. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC. The shift to autonomous vehicles marks a major shift in the supply chain—and a major opportunity.
Many applications have need for a long service life — for example those deployed within industrial, scientific and military industries. In these applications, the service life may exceed that of component availability. Replacing an advanced, obsolete components in a design can be very costly, potentially requiring an entire redesign of the electronic hardware and software. The use of programmable devices helps designers not only to address component obsolescence, but also to reduce the cost and complexity of the solution. Programmable logic devices are provided in a range of devices of different types, capabilities and sizes, from FPGAs to System on Chips (SoC) and Complex Programmable Logic Devices (CPLD). The obsolete function can be emulated within the device, whether it is a logic function implemented in programmable logic in a CPLD, FPGA or SoC, or a processor system implemented in an FPGA or SoC.
Become familiar with USB type C connector. USB type C connector is becoming quickly more commonplace than any other earlier interface. In the end of 2016 there were 300 million devices using a USBC connection – a big part was smartphones, but the interface was also widespread on laptops. With growth, the USBC becomes soon the most common PC and peripheral interface. Thunderbolt™ 3 on USBC connector promises to fulfill the promise of USB-C for single-cable docking and so much more.
Power electronics
The power electronics market continues to grow and gain more presence across a variety of markets. 2017 was a good year for electric vehicles and the future of this market looks very promising. In 2017, we saw also how wireless charging technology has been adopted by many consumer electronic devices- including Apple smart phones. Today’s power supplies do more than deliver clean and stable dc power on daily basis—they provide advanced capabilities that can save you time and money.
Wide-bandgap semiconductor materials like gallium nitride (GaN) and silicon carbide (SiC) are anticipated to be used in many more applications in 2018. At the moment, the number of applications for those materials is steadily increasing in the automotive and military industry. Expect to see more adoption of SiC and GaN materials in automotive market.
According to Battery Market Goes Bigger and Better in 2018 article advances in battery technologies hold the keys to continuing progress in portable electronics, robotics, military, and telecommunication applications, as well as distributed power grids. It is difficult to see lithium-ion based batteries being replaced anytime soon, so the advances in battery technology are primarily through the application of lithium-ion battery chemistries. New battery protection for portable electronics cuts manufacturing steps and costs for Lithium-ion.
Transparency Market Research analysts predict that the global lithium-ion battery market is poised to rise from $29.67 billion in 2015 to $77.42 billion in 2024 with a compound annual growth rate of 11.6 %. That growth has already spread from the now ubiquitous consumer electronics segment to automotive, grid energy, and industrial applications. Dramatic increase is expected for battery power for the transportation, consumer electronic, and stationary segments. According to Bloomberg New Energy Finance (BNEF), the global energy-storage market will double six times between 2016 and 2030, rising to a total of 125 G/305 gigawatt-hours. In 2018, energy-storage systems will continue proliferating to provide backup power to the electric grid.
Memory
Memory business boomed in 2017 for both NAND and DRAM. The drivers for DRAM are smartphones and servers. Solid-state drives (SSDs) and smartphones are fueling the demand for NAND. Both the DRAM and NAND content in smartphones continues to grow, so memory business will do well in 2018.Fab tool vendors found themselves in the midst of an unexpected boom cycle in 2017, thanks to enormous demand for equipment in 3D NAND and, to a lesser degree, DRAM. In 2018, equipment demand looks robust, although the industry will be hard-pressed to surpass the record growth figures in 2017.
NAND Market Expected to Cool in Q1 from the crazy year 2017, but it is still growing well because there is increasing demand. The average NAND content in smartphones has been growing by roughly 50% recently, going from approximately 24 gigabytes in 2016 to approximately 38 gigabytes today.3D NAND will do the heavy memory lifting that smartphone users demand. Contract prices for NAND flash memory chips are expected to decline in during the first quarter of 2018 as a traditional lull in demand following the year-end quarter.
Lots of 3D NAND will go to solid state drives in 2018. IDC forecasts strong growth for the solid-state drive (SSD) industry as it transitions to 3D NAND. SSD industry revenue is expected to reach $33.6 billion in 2021, growing at a CAGR of 14.8%. Sizes of memory chips increase as number of layer in 3D NAND are added. We’ve already scaled up to 48 layers. Does this just keep scaling up, or are there physical limits here? Maybe we could see a path to 256 layers in few years.
Memory — particular DRAM — was largely considered a commodity business. Though that it’s really not true in 2017. DRAM memory marked had boomed in 2017 at the highest rate of expansion in 23 years, according to IC Insights. Skyrocketing prices drove the DRAM market to generate a record $72 billion in revenue, and it drove total revenue for the IC market up 22%. Though the outlook for the immediate future appears strong, a downturn in DRAM more than likely looms in the not-too-distant future. It will be seen when there are new players on the market. It is a largely unchallenged assertion that Chinese firms will in the not so distant future become a force in semiconductor memory market. Chinese government is committed to pumping more than $160 billion into the industry over a decade, with much of that ticketed for memory startups.
There is search for faster memory because modern computers, especially data-center servers that skew heavily toward in-memory databases, data-intensive analytics, and increasingly toward machine-learning and deep-neural-network training functions, depend on large amounts of high-speed, high capacity memory to keep the wheels turning. The memory speed has not increased as fast as the capacity. The access bandwidth of DRAM-based computer memory has improved by a factor of 20x over the past two decades. Capacity increased 128x during the same period. For year 2018 DRAM remains a near-universal choice when performance is the priority. There has been some attempts to very fast memory interfaces. Intel the company has introduced the market’s first FPGA chip with integrated high-speed EMBED (Embedded Multi-Die Interconnect Bridge): The Stratix 10 MX interfaces to HMB2 memory (High Memory Bandwidth) that offers about 10 times faster speed than standard DDR-type DIMM.
There is search going on for a viable replacement for DRAM. Whether it’s STT-RAM or phase-change memory or resistive RAM, none of them can match the speed or endurance of DRAM. Necessity is the mother of invention, and we see at least two more generations after 1x. XPoint is also coming up as another viable memory solution that could be inserted into the current memory architecture. It will be interesting to see how that plays out versus DRAM.
5G and IoT
5G something in it for everyone. 5G is big. 5G New Radio (NR) wireless technology will ultimately impact everyone in the electronics and telecommunications industries. Most estimates say 2020 is when we will ultimately see some real 5G deployments on a scale. In the meantime, companies are firming up their plans for whatever 5G products and services they will offer. Though test and measurement solutions will be key in the commercialization cycle. 5G is set to disrupt test processes. If 5G takes off, the technology will propel the development of new chips in both the infrastructure and the handset. Data centers require specialty semiconductors from power management to high-speed optical fiber front-ends. 5G systems will drive more complexity in RF front-ends .5G will offer increased capacity and decreased latency for some critical applications such as vehicle-to-vehicle (V2V) or vehicle-to-infrastructure (V2I) communications for advanced driver assistance systems (ADAS) and self-driving vehicles. The big question is whether 5G will disrupt the landscape or fall short of its promises.
Electronics manufacturers expect a lot from Internet of Thing. The evolution of intelligent electronic sensors is creating a revolution for IoT and Industrial IoT as companies bring new sensor-based, intelligent systems to market. The business promise is that the proliferation of smart and connected “things” in the Industrial Internet of Things (IIoT) provides tremendous opportunities for increased performance and lower costs. Industrial Internet of Things (IIoT) has a market forecast approaching $100 billion by 2020. Turning volumes of factory data into actionable information that has value is essential. Predictive maintenance and asset tracking are two big IoT markets to watch in 2018 because they will provide real efficiencies and improved safety. It will be about instrumenting our existing infrastructures with sensors that improve their reliability and help predict failures. It will be about tracking important assets through their lifecycles.
A new breed of designers has arrived that is leveraging inexpensive sensors to build the intelligent systems at the edge of the Internet of Things (IoT). They work in small teams, collaborate online, and they expect affordable design tools that are easy to use in order to quickly produce results. Their goal is to deliver a functioning device or a proof-of-concept to their stakeholders while spending as little money as possible to get there. We need to become multi-functional engineers who can comfortably work in the digital, RF, and system domains.
The Io edge sensor device usually needs to be cheap. Simple mathematical reasoning suggests that the average production cost per node must be small, otherwise the economics of the IoT simply are not viable. Most suppliers to the electronics industry are today working under the assumption that the bill-of-materials (BoM) cost of a node cannot exceed $5 on average. While the sensor market continues to garner billions of dollars, the average selling price of a MEMS sensor, for example, is only 60 cents.
Designing a well working and secure IoT system is still hard. IoT platforms are very complex distributed systems and managing these distributed systems is often an overlooked challenge. When designing for the IoT, security needs to be addressed from the Cloud down to each and every edge device. Protecting data is both a hardware and a software requirement, as more data is being stored and analyzed in edge devices and gateways.
The continued evolution of powerful embedded processors is enabling more functionality to be consolidated into single heterogeneous multicore devices. You will see more mixed criticality designs – those designs which contain both safety-critical and non-safety critical processes running on the same chip. It’s quickly becoming common practice for embedded system developers to isolate both safety and security features on the same SoC.
AI
There is clearly a lot of hype surrounding machine learning (ML) and artificial intelligence (AI) fields. Over the past few years, machine learning (ML) has evolved from an interesting new approach that allows computers to beat champions at chess and Go, into one that is touted as a panacea for almost everything. Machine learning already has delivered beneficial results in certain niches, but it has potential for a bigger and longer lasting impact because of the demand for broad insights and efficiencies across industries. Also EDA companies have been investing in this technology and some results are expected to be announced.
The Battle of AI Processors Begins in 2018. Machine learning applications have a voracious appetite for compute cycles, consuming as much compute power as they can possibly scrounge up. As a result, they are invariably run on parallel hardware – often parallel heterogeneous hardware—which creates development challenges of its own. 2018 will be the start of what could be a longstanding battle between chipmakers to determine who creates the hardware that artificial intelligence lives on. Main contenders on the field at the moment are CPUs, GPUs, TPUs (tensor processing units), and FPGAs. Analysts at both Research and Markets and TechNavio have predicted the global AI chip market to grow at a compound annual growth rate of about 54% between 2017 and 2021.
Sources:
Battery Market Goes Bigger and Better in 2018
Smart speakers to outsell wearables during U.S. holidays, as demand for wearables slows
Wearables Shipments Expected to Double by 2021
The Week In Review: Manufacturing #186
Five technology trends for 2018
NI Trend Watch 2018 explores trends driving the future faster
Creating Software Separation for Mixed Criticality Systems
Isolating Safety and Security Features on the Xilinx UltraScale+ MPSoC
Meeting ISO 26262 Software Standards
DRAM Growth Projected to be Highest Since ’94
NAND Market Expected to Cool in Q1
Memory Market Forecast 2018 … with Jim Handy
3D NAND Storage Fuels New Age of Smartphone Apps
$55.9 Billion Semiconductor Equipment Forecast – New Record with Korea at Top
Advanced Packaging Is Suddenly Very Cool
Apple Watch 3 shipment growth to benefit Taiwan IC packagers in 2018
Rapid SoC Proof-of-Concept for Zero Cost
EDA Challenges Machine Learning
What Can You Expect from the New Generation of Power Supplies?
Optimizing Machine Learning Applications for Parallel Hardware
FPGA-dataa 10 kertaa nopeammin
Chipmakers Look To New Materials
What the Experts Think: Delivering the next 5 years of semiconductor technology
Programmable Logic Holds the Key to Addressing Device Obsolescence
The Battle of AI Processors Begins in 2018
For China’s Memory Firms, Legal Tests May Loom
Predictions for the New Year in Analog & Power Electronics
Lithium-ion Overcomes Limitations
Will Fab Tool Boom Cycle Last?
The Next 5 Years Of Chip Technology
Chipmakers Look To New Materials
Process Window Discovery And Control
Sensors are Fundamental to New Intelligent Systems
Industrial IoT (IIoT) – Where is Silicon Valley
Internet of things (IoT) design considerations for embedded connected devices
How efficient memory solutions can help designers of IoT nodes meet tight BoM cost targets
1,325 Comments
Tomi Engdahl says:
Recognize the Flavors of RF Power Transistors
http://www.mwrf.com/semiconductors/recognize-flavors-rf-power-transistors?NL=MWRF-001&Issue=MWRF-001_20180604_MWRF-001_332&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17696&utm_medium=email&elq2=c655df843d774d61a5575900aac1c045
This technical brief focuses in on RF power transistor technologies, helping readers to determine the best choice when designing a high-power amplifier.
Tomi Engdahl says:
Dispatches from NIWeek 2018
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333335
New version of LabVIEW, data-logging software, and other goodies unveiled at National Instruments’ annual engineering pow wow.
Last week, I attended National Instruments’ NIWeek 2018 in my home base of Austin, Texas. NIWeek is a red-letter event, throwing together thousands of scientists, engineers, and industry professions to learn about all things NI. NI is an extremely important company, particularly in the wireless space, because it is responsible for building the hardware and software for testing and measuring 3G, 4G LTE, and 5G. As such, it serves many big-name customers — Qualcomm, Samsung, and AT&T, to name a few. So much of the cool stuff happening right now in tech — 5G, IoT, self-driving cars, and machine learning — wouldn’t be happening without state-of-the-art test and measurement equipment, and nobody does it as good as NI.
NIWeek is the most engineer-rich event that I attend, which makes sense given the area of NI’s expertise.
Tomi Engdahl says:
Automotive IC Market on Pace for Third Straight Record Year
https://www.eetimes.com/document.asp?doc_id=1333344
The size of the automotive IC market is on pace to grow by 18.5 percent to reach $32.3 billion in 2018, according to market research firm IC Insights. This would set a new all-time high for the automotive IC market for the third consecutive year.
The size of the automotive IC market is expected to continue increasing at a compound annual growth rate of 12.5 percent between 2017 and 2021, reaching $43.6 billion in 2021, IC Insights said.
Tomi Engdahl says:
Toshiba Retains 40% Stake in Chip Unit
https://www.eetimes.com/document.asp?doc_id=1333346
Japan’s Toshiba Corp. said it retained ownership of a 40 percent stake in its semiconductor business following the close of an $18 billion deal to sell the majority of the unit to a consortium led by U.S. private equity firm Bain Capital.
Closure of the deal, announced Friday (June 1), was expected after Toshiba announced last month that it had finally secured the approval of Chinese antitrust regulators.
Tomi Engdahl says:
Analog Devices Moves to No. 2 in Industrial ICs
https://www.eetimes.com/document.asp?doc_id=1333354
Tomi Engdahl says:
A 100th Birthday Celebration for the Flip Flop
https://hackaday.com/2018/06/04/a-100th-birthday-celebration-for-the-flip-flop/
It’s easy to get caught up in the excitement of creation as we’re building our latest widget. By the same token, it’s sometimes difficult to fully appreciate just how old some of the circuits we use are.
One such circuit turns 100 years old in June, which is surprising because it literally is the building block of every computer. It’s the flip-flop, and while its inventors likely couldn’t have imagined what they were starting, their innovation became the basic storage system for the ones and zeros of the digital age.
Tomi Engdahl says:
Electrochemical Technology Dominates in Energy Storage Systems
http://www.powerelectronics.com/alternative-energy/electrochemical-technology-dominates-energy-storage-systems?NL=ED-003&Issue=ED-003_20180606_ED-003_868&sfvc4enews=42&cl=article_2&utm_rid=CPG05000002750211&utm_campaign=17704&utm_medium=email&elq2=f3184b2781ab4d8f81e43adff38544dd
Electrochemistry is front and center when it comes to providing energy storage for utility power. Commercial versions are available now, with ongoing research aimed at developing improved systems.
Tomi Engdahl says:
Intel remains committed to pushing boundaries of PC
https://www.digitimes.com/news/a20180606PR201.html
In the transition to the data-centric era, the PC remains a critical facet of Intel’s business, and it is an area where the company believes there are still so many opportunities ahead, according to Gregory Bryant, senior vice president and general manager of the Client Computing Group at Intel.
Bryant was delivering a keynote speech at the onging Computex 2018, where Intel is showcasing how it is powering the future of computing, connectivity and communications through advanced innovations in client computing, artificial intelligence (AI), the Internet of Things (IoT) and 5G network transformation.
Tomi Engdahl says:
Top three chipmakers could face fines
http://www.china.org.cn/business/2018-06/06/content_51712499.htm
The top antitrust agency might slap fines on three dominant chipmakers including Samsung because of possible monopolistic behavior in the past one or two years, but further action has nothing to do with protecting domestic companies or Sino-U.S. friction on intellectual property rights, according to people taking part in the ongoing investigation.
The investigation conducted by the State Administration for Market Regulation focuses on possible price fixing behavior by South Korea’s Samsung, SK Hynix, and U.S.-based Micron in the past one to two years, according to a source who declined to be named as they lacked authority to speak to the media.
Tomi Engdahl says:
ARM to cede control of China operation in $775-million deal
http://www.atimes.com/article/arm-to-cede-control-of-china-operation-in-775-million-deal
Chip designer’s decision will boost semiconductor industry in the world’s second-largest economy and boost ‘Made in China 2025′ program
The deal is likely to be worth US$775 million. Semiconductor designer ARM, part of the SoftBank Group, plans to cede control of its Chinese business to a group of local investors.
Even though the price-tag looks bargain-basement, the implications will be huge.
At least 90% of the world’s mobile devices use the ARM chip “blueprint,” or the “DNA” of semiconductors. License fees and royalties generate major income for the British-based company.
Earlier this year, ARM set up a joint venture in Shenzhen’s tech hub. Then last month, plans emerged that the company was planning to hand over control to a Chinese consortium, including Hopu-Arm Innovation Fund, which is also known as Hou An Innovation Fund, according to China’s Ministry of Science and Technology.
Tomi Engdahl says:
Why worst-case circuit analysis is challenging to perform
https://www.edn.com/electronics-blogs/the-worst-case/4460715/Why-worst-case-circuit-analysis-is-challenging-to-perform
This first post in The Worst Case blog focuses on the skills, resources, and techniques needed to properly perform a worst-case circuit analysis and some of the reasons why worst-case circuit analysis (WCCA) is challenging to get right.
If you’re thinking of performing a WCCA, you’ll want to stay tuned to The Worst Case. You’ll get a glimpse into what skills you need to properly perform WCCA and why WCCA needs to be an investigation that is separate from the design function. It’s not a checkbox item, nor is it a task you can simply hand off to just any engineer. Furthermore, you can’t use it as a learning task for the “junior” engineers.
Why Engineers get WCCA wrong
The skills required to properly perform WCCA are diverse and yet each is critical to the outcome. In teaching WCCA techniques, I often find engineers so eager to tackle this important analysis on their own, even if it is their first time. Training a new engineer can take at least nine months to a year. Even then, there are multiple levels of review before an analysis is verified and complete. WCCA is that important. Often, it’s the last line of defense against defects, recalls, hazards, and failure.
Here’s a list of this and the next five topics we will cover, one per month. I expect to post six more.
Going it Alone: Why worst-case circuit analysis is challenging to perform (this article)
Failure to be rigorous
Models, models, models
Monte Carlo gone wrong
There’s a hole in my data: Test data and datasheet issues
Too many escapes and biases
What is WCCA?
A worst-case analysis is a quantitative assessment of a circuit or system’s functional performance, accounting for manufacturing, environmental, aging, and, in the case of Space applications, radiation tolerances. This is contrasted by part-based analyses such as stress & derating, failure mode, effects and criticality analysis (FMECA), and mean-time between failures (MTBF). All have their place in reliability assessment and there is certainly overlap in the math, models, and resulting conclusions.
Through a worst-case analysis, you can compute many aspects of a circuit’s performance and calculate the risks and margins of key metrics. WCCA examines the tolerance-induced effects on electronic circuits caused by potentially large and unknown variations of components beyond their initial nominal value. The variations can be the result of manufacturing, aging, or environmental influences, which can cause circuits to drift out of specification.
WCCA also lets you assess the mathematical sensitivity of circuit performance to these variations
Tomi Engdahl says:
Don’t Be The Dinosaur On IP Reuse
https://semiengineering.com/dont-be-the-dinosaur-on-ip-reuse/
To get the maximum value from IP assets, it’s time to change how we manage them.
But why is it so important to transition to new methods? The reason is that SoCs are becoming increasingly complex with increased pressures on design teams. This is due to:
Shorter times to market,
More complex technology,
More complex organizations, and
Geographically dispersed multi-partner teams with varied business models.
All of which bring higher risks in the development of an SoC. Reusing verified IPs mitigates the risks involved for a successful tape out.
Tomi Engdahl says:
Don’t let ESR waste power and cook capacitors
https://www.edn.com/electronics-blogs/power-points/4460700/Don-t-let-ESR-waste-power-and-cook-capacitors
Tomi Engdahl says:
U.S. in Deal to Ease Sanctions on China’s ZTE: Top Official
https://www.securityweek.com/us-deal-ease-sanctions-chinas-zte-top-official
US officials reached a deal Thursday to ease sanctions which threatened to cripple Chinese smartphone maker ZTE, Commerce Secretary Wilbur Ross said.
Ross told CNBC television the deal includes a $1 billion fine levied on the Chinese firm and a requirement that it change its board of directors.
In April, the Chinese group was cut off from US technology products for violating US sanctions against North Korea and Iran — measures which threatened to put ZTE out of business.
Ross said the agreement calls for “embedding a compliance department” chosen by Washington to monitor company conduct.
Tomi Engdahl says:
Shower Heads Installed in Packaging Could Keep Chips Cool
http://www.electronicdesign.com/analog/shower-heads-installed-packaging-could-keep-chips-cool?NL=ED-003&Issue=ED-003_20180607_ED-003_206&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17775&utm_medium=email&elq2=7063732c536541d8a6d2a14c6163d24d
With the wires inside chips growing smaller and closer together, miniature shower heads installed in their packaging could help keep them cool, spraying coolant directly onto the surface of the integrated circuit. The rinse could prevent chips from burning themselves up as semiconductor companies push performance boundaries.
That technology was recently introduced by semiconductor researcher Imec to help meet the growing demands of high performance electronic devices, including three-dimensional chips. These integrated circuits wire together memory, processing and other blocks to get around the limitations of existing chips, which have trouble handling artificial intelligence and other tasks.
Tomi Engdahl says:
Replace Fixed-Function ICs with Low-Cost Microcontrollers
http://www.electronicdesign.com/analog/replace-fixed-function-ics-low-cost-microcontrollers?NL=ED-003&Issue=ED-003_20180607_ED-003_206&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17775&utm_medium=email&elq2=7063732c536541d8a6d2a14c6163d24d
Sponsored by Texas Instruments: For about 25 cents, you can implement many simple analog and digital functions into applications ranging from pulse-width modulation to a stopwatch.
Most engineers have known for years that microcontrollers are the best choice in building new digital products. Legacy TTL and CMOS functional logic devices gave way to single-chip MCUs years ago. Yet some operations are still implemented with fixed-function devices because an MCU seems like expensive overkill in certain cases. Not anymore, though. When the price for a tiny MCU comes down to pennies, it’s time to reconsider the use of fixed-function circuits. Here are some ideas to help you go in that direction.
A cheap MCU can replace more discrete logic and mixed-signal devices than you think. One example is a two-bit 8-bit microcontroller that’s able to replace the still popular 555 timer IC. But that’s not all. There are four basic areas where an inexpensive MCU can replace a fixed-function device: communications, system housekeeping, pulse-width modulation (PWM), and timing. The examples illustrate how it can be done.
Tomi Engdahl says:
WSTS Raises Chip Sales Forecast
https://www.eetimes.com/document.asp?doc_id=1333357
The global semiconductor market will grow by 12.4 percent in 2018, reaching $463 billion, according to the latest forecast from World Semiconductor Trade Statistics, an organization of more than 55 chip suppliers that pools sales data.
The latest forecast is more bullish than the original WSTS forecast for 2018, issued last November. That forecast called for chip sales to increase by 7 percent. Sales are expected to increase across all product categories and in all regions of the world.
WSTS said it raised the chip sales forecast based on continued extraordinary growth in the memory segment as well as strong growth in analog chips. Those two markets are expected to grow by 26.5 percent and 9.5 percent, respectively, this year.
Tomi Engdahl says:
Toshiba Completes Sale of Memory Chip Business, and Then Buys 40 Percent Back
http://www.electronicdesign.com/industrial-automation/toshiba-completes-sale-memory-chip-business-and-then-buys-40-percent-back
Toshiba closed the sale of its semiconductor unit to an investor group led by American investment firm Bain Capital, and followed through on plans to reinvest $3.1 billion in the business. That gives the company 40.2 percent of the voting power over the world’s second largest manufacturer of NAND flash memory as the market for the technology continues to swell.
Tomi Engdahl says:
11 Myths About Portable Stimulus
Breker CEO Adnan Hamid dispels myths surrounding Accellera’s new Portable Stimulus standard, which enables test portability between verification process elements and reuse across many projects.
http://www.electronicdesign.com/test-measurement/11-myths-about-portable-stimulus
What’s required is a single, simple specification format that enables test portability between verification process elements and reuse across many projects. This is the driver behind Portable Stimulus (PS), a standard being defined by the Portable Stimulus Working Group of Accellera Systems Initiatives, a standards organization that supports a mix of user and vendor standards and open interfaces development.
PS establishes a new language and methodology that covers all phases of system-on-chip (SoC) verification . Unlike previous verification languages, such as SystemVerilog and the universal verification methodology (UVM), PS defines high-level verification intent. A verification synthesis engine consumes that description and creates test cases targeting different execution environments, such as simulation, emulation, hardware prototypes, and real silicon.
Generated tests can utilize embedded processors that exist within the SoC design to run parts of the tests. When this is coupled with the ability to coordinate activity on the interfaces, full end-to-end tests can be created that enable a team to define whether design requirements have been met. UVM sequences also can be generated for complex block-level verification problems, previously requiring resource-intensive hand-coding efforts.
The language resolves vertical portability issues that have plagued users of SystemVerilog (SV)/UVM, where lower-level models are difficult to reuse in high-level test environments.
1. Portable Stimulus is just another level of abstraction.
Portable Stimulus is the first complete verification language that exists in the electronics industry. Previous languages concentrated on stimulus, but the PS standard is a complete verification language that encompasses stimulus, checkers, coverage, and takes into account the configurability of the hardware.
2. Portable Stimulus is just a hardware-verification language.
While Portable Stimulus can be used to verify hardware, it can directly integrate aspects of the software environment as well. Increasing amounts of functionality are defined in the software that executes on deeply embedded processors.
3. Portable Stimulus replaces UVM and SystemVerilog.
Portable Stimulus enhances the existing SV/UVM methodology. Existing solutions target what are currently blocks and subsystems, while PS targets systems and the interaction between hardware and software. At the block level, it’s possible to combine the strengths of both languages—SV/UVM provides transactors and legacy verification intellectual property (VIP), while PS provides a more effective method to generate sequences than hand coding.
4. Portable Stimulus will not support legacy descriptions or files.
Portable Stimulus fully supports legacy SV/UVM descriptions.
5. Portable Stimulus defines visual or graphical representations of a design.
The standard defines two textual languages, neither of which is graphical.
6. Portable Stimulus is or is not “graph-based.”
PS is based on graph-based mathematical models, as is almost every description used with the electronic-design-automation (EDA) community, and are ideal for describing operational scenarios. Thus, vendors are able to draw from the vast amount of available research
7. Portable Stimulus is a way to move stimuli between verification tools.
The name––Portable Stimulus––creates confusion. Portable Stimulus doesn’t define stimulus and the stimulus created by a PS tool isn’t portable. PS is a description of verification intent and, from this description, a verification synthesis tool can generate stimuli suitable for a simulator, an emulator, rapid-prototyping solution, or event actual silicon. It could target other environments, such as formal verification, considered to be the horizontal portability axis.
8. Portable Stimulus doesn’t support C++.
As previously mentioned, PS defines two textual languages. One is a new language created from the ground up and referred to as the Domain Specific Language, or DSL, and a second language based on C++. Both have identical semantics and can be used interchangeably
9. Portable Stimulus doesn’t take into account design intent.
Yes and no. As a verification language, it should be independent of the actual design. It describes what should have been designed.
10. Portable Stimulus is another standard dreamed up by EDA vendors to make more money.
It has been shown that PS generates more efficient tests than existing SV/UVM environments, and those tests can be pre-generated once and used multiple times.
11. Portable Stimulus isn’t in use today––we will wait for the standard to be released.
Yes and no. PS hasn’t yet been defined and released. No one has a tool that conforms to the standard. However, tools with this capability are in heavy use across the industry right now, and significant value is being derived from them.
Tomi Engdahl says:
Aiming for Repeatable THz S-Parameter Measurements
http://www.mwrf.com/test-measurement/aiming-repeatable-thz-s-parameter-measurements?NL=MWRF-001&Issue=MWRF-001_20180607_MWRF-001_219&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17776&utm_medium=email&elq2=af5099d77b7442f1acdd9da21119b113
A study investigated the effects of different waveguide flange designs on VNA measurement uncertainty at terahertz frequencies.
Tomi Engdahl says:
Global Semiconductor Sales Increase 20 Percent Year-to-Year in April; Double-Digit Annual Growth Projected for 2018
Industry forecast projects sales will increase 12.4 percent in 2018 and 4.4 percent in 2019
https://www.semiconductors.org/news/2018/06/06/global_sales_report_2017/global_semiconductor_sales_increase_20_percent_year_to_year_in_april_double_digit_annual_growth_projected_for_2018
“The global semiconductor industry has posted consistently strong sales so far in 2018, and the global market has now experienced year-to-year growth of greater than 20 percent for 13 consecutive months,”
Tomi Engdahl says:
Li Yuan / New York Times:
The near-collapse of ZTE may prompt China’s Sputnik moment, when it gets serious about developing its own advanced chip capabilities — HONG KONG — Once derided as a technology backwater and copycat, China is justifiably proud of its technology boom. Its people zip around the country on high-speed trains.
ZTE’s Near-Collapse May Be China’s Sputnik Moment
https://www.nytimes.com/2018/06/10/technology/china-technology-zte-sputnik-moment.html
Once derided as a technology backwater and copycat, China is justifiably proud of its technology boom. Its people zip around the country on high-speed trains. They can buy, and pay for, just about anything with their smartphones. For Chinese traveling abroad, the rest of the world can seem slow and antiquated.
Now, that progress has been cast into doubt, and even some of the smartest people in the technology world are asking how they got it so wrong.
The Trump administration gave ZTE, which employs 75,000 people and is the world’s No. 4 maker of telecom gear, a stay of execution on Thursday. ZTE, which had violated American sanctions, agreed to pay a $1 billion fine and to allow monitors to set up shop in its headquarters. In return, the company — once a symbol of China’s progress and engineering know-how — will be allowed to buy the American-made microchips, software and other tools it needs to survive.
Tomi Engdahl says:
Extending https://semiengineering.com/extending-the-ic-roadmap/
Imec’s An Steegen sees advanced packaging as a critical component of future scaling, including new bridge technology.
Tomi Engdahl says:
Catch GaN if You Can
http://www.mwrf.com/semiconductors/catch-gan-if-you-can?NL=MWRF-001&Issue=MWRF-001_20180611_MWRF-001_199&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17824&utm_medium=email&elq2=17a69c1299764cd38f46d23eb952e11e
Gallium nitride is no longer limited to power-amplification applications. Now all corners of the RF/microwave industry are taking advantage of the technology’s qualities.
Tomi Engdahl says:
Fan-out is Hot, 3D Is Back, and 5G is Needed: The Inside Scoop from ECTC 2018
https://www.3dincites.com/2018/06/fan-out-is-hot-3d-is-back-and-5g-is-needed-the-inside-scoop-from-ectc-2018/
There’s fact, and there’s perception. The messages people carry away from conferences are not only influenced by what they hear from the speakers, but also from the conversations they have with their colleagues. This post contains a little of both.
Tomi Engdahl says:
Clamshell socket allows BGA1296 testing
https://www.edn.com/electronics-products/other/4460668/Clamshell-socket-allows-BGA1296-testing
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A stamped spring-pin socket, the CBT-BGA-6076 from Ironwood Electronics lets engineers test 37.5×37.5-mm BGA devices at extreme temperatures. These production test and burn-in sockets feature a clamshell lid to ease chip replacement and an integrated compression plate for vertical force actuation without distorting device position.
The CBT-BGA-6076 stamped spring-pin socket costs $1886.
Tomi Engdahl says:
Why worst-case circuit analysis is challenging to perform
https://www.edn.com/electronics-blogs/the-worst-case/4460715/Why-worst-case-circuit-analysis-is-challenging-to-perform
Tomi Engdahl says:
It’s Time for AI in PCB Design
https://www.eetimes.com/author.asp?section_id=36&doc_id=1333372
AI placement in PCB design is both possible and could be a road that brings designers into a new era of innovation.
Artificial Intelligence has been available in most EDA tools including PCB layout for some time now. Though the potential for machine learning exists in EDA, PCB designers have been slow to adopt a technology that currently auto-places and auto-routes for silicon. Most PCB designers manually route and design their boards, a time consuming and intricate process.
As early as the 1980’s, neural networking was an established theoretical concept in EDA. By the 1990’s, there were tools in place that could use the concepts.
Neuroroute – a product based on neural networks – was given 50 to 60 human-made PCB designs. These designs were relayed to an AI routing engine that used supervised machine learning to create an auto-router that makes decisions like a human.
Neuroroute paved the way for modern topological techniques.
I hear three common reasons why designers don’t like to use auto-routing:
“It makes a mess”
“The software doesn’t work.”
“It may reduce the need for human PCB designers.”
Tomi Engdahl says:
Cadence’s Paul McLellan takes a peek at Imec’s roadmap to see what the path to 3nm looks like, how nanosheets fit in, and why design and system technology co-optimization is necessary going forward.
Imec Roadmap
https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/imec2
Tomi Engdahl says:
Tiny defects in semiconductors created ‘speed bumps’ for electrons—researchers cleared the path
https://phys.org/news/2018-06-tiny-defects-semiconductors-electronsresearchers-path.html
UCLA scientists and engineers have developed a new process for assembling semiconductor devices. The advance could lead to much more energy-efficient transistors for electronics and computer chips, diodes for solar cells and light-emitting diodes, and other semiconductor-based devices.
A paper about the research was published in Nature. The study was led by Xiangfeng Duan, professor of chemistry and biochemistry in the UCLA College, and Yu Huang, professor of materials science and engineering at the UCLA Samueli School of Engineering. The lead author is Yuan Liu, a UCLA postdoctoral fellow.
Tomi Engdahl says:
Winbond to break ground for new fab in southern Taiwan
https://www.digitimes.com/news/a20180612PD206.html
DRAM and flash memory maker Winbond Electronics will start constructing a new fab in Kaohsiung, southern Taiwan in September followed by equipment move-in slated for 2020.
The new plant is part of Winbond’s operational plan over the next 10 years, according to company chairman Arthur Chiao. The future demand looks promising driven by cloud computing, big data, automotive electronics and IoT applications, said Chiao
Tomi Engdahl says:
NAND flash prices to continue slide in 3Q18
https://www.digitimes.com/news/a20180611PD212.html
NAND flash prices will continue to drop in the third quarter of 2018 as suppliers scale up their 3D NAND chip output, according to industry sources.
Tomi Engdahl says:
Getting to 3nm: It Really is Scaling Every Which Way!
http://blog.semi.org/semi-news/getting-to-3nm-it-really-is-scaling-every-which-way
With chipmakers looking toward 5nm manufacturing, it’s clear that traditional scaling is not dead but continuing in combination with other technologies. The industry sees scaling enabled by 3D architectures such as die stacking and the stacking of very small geometry wafers. Interconnect scaling also comes into play.
Tomi Engdahl says:
New Transistor Types Vs. Packaging
No one is quite sure what comes next, and that’s not a good thing.
https://semiengineering.com/new-transistor-types-vs-packaging/
Plans are being formulated for the rollout of multiple types of gate-all-around FETs and literally dozens of advanced packaging options. The question now is which ones will achieve critical mass, because there aren’t enough chips in the world to support all of them profitably.
FinFETs, which were first introduced by Intel at 22nm, are running out of steam. While they will survive 10/7nm, and maybe even 7/5nm, static leakage is becoming an issue again, and the ability to manufacture increasingly taller fins has proved to be an unworkable strategy.
Tomi Engdahl says:
On the Topic of Fuel Cells, More R&D Required
Commercial fuel cells are available, but for wider use they need more R&D to improve their performance, reliability, and cost.
http://www.powerelectronics.com/alternative-energy/topic-fuel-cells-more-rd-required?NL=ED-003&Issue=ED-003_20180613_ED-003_385&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17799&utm_medium=email&elq2=acd7757f66c74db28201bd5a26d836a4
Tomi Engdahl says:
Use Paper-Mill Biomass Waste for Lithium-Sulfur Battery Cathode
http://www.powerelectronics.com/alternative-energy/use-paper-mill-biomass-waste-lithium-sulfur-battery-cathode?NL=ED-003&Issue=ED-003_20180613_ED-003_385&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17799&utm_medium=email&elq2=acd7757f66c74db28201bd5a26d836a4
A heat-activated process converts waste lignosulfonate from papermaking production for use a cathode material in rechargeable lithium-sulfur batteries.
Tomi Engdahl says:
Lighting controls: Know the updates, changes
https://www.csemag.com/single-article/lighting-controls-know-the-updates-changes/8e2c00a1e08627d42d2dbbe2fdac3361.html?OCVALIDATE=
There has been a move away from traditional lighting controls approaches, which have only incrementally improved over decades, and toward an entirely new way of thinking about, designing, and implementing lighting controls—wirelessly, with internet connectivity, and in an individually addressable capacity all at once.
Learning Objectives:
Know the meaning of, and key differences between, DALI- and IoT-based lighting controls.
Understand primary benefits of the IoT as it relates to end users and owners in buildings.
Consider important design considerations and common pitfalls of an IoT-based lighting control design.
The task of the lighting designer or engineer is a moving target in the year 2018.
Tomi Engdahl says:
Comparing Circuit Materials for mmWave Applications
http://www.mwrf.com/materials/comparing-circuit-materials-mmwave-applications?NL=MWRF-001&Issue=MWRF-001_20180612_MWRF-001_828&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17881&utm_medium=email&elq2=9fa497c30d714ae592726c24b71441c7
Rogers Corp. will be showing its wide range of high-frequency circuit materials at the 2018 IEEE IMS exhibition, including the RO3000 line.
Frequency bands at 60 and 77 GHz, once considered experimental, are now being thought of as mainstream, since they’re the basis for automotive radar systems and for high-speed, short-haul data links in 5G wireless networks.
The RO3000 line of circuit materials is usable to 77 GHz and higher for advanced driver-assistance system (ADAS) applications such as automotive front and rear collision-avoidance radar systems and vehicle-to-vehicle (V2V) communications systems.
RO4000 circuit materials maintain consistent Dk and CTE values for microwave-frequency circuits, but can be processed using the same low-cost fabrication methods as FR4 circuit materials.
Tomi Engdahl says:
Tiny defects in semiconductors created ‘speed bumps’ for electrons—researchers cleared the path
https://phys.org/news/2018-06-tiny-defects-semiconductors-electronsresearchers-path.html
UCLA scientists and engineers have developed a new process for assembling semiconductor devices. The advance could lead to much more energy-efficient transistors for electronics and computer chips, diodes for solar cells and light-emitting diodes, and other semiconductor-based devices.
Tomi Engdahl says:
Extending The IC Roadmap
https://semiengineering.com/extending-the-ic-roadmap/
Imec’s An Steegen sees advanced packaging as a critical component of future scaling, including new bridge technology.
Tomi Engdahl says:
Subcutaneous Solar Cells Could Power Pacemakers
http://www.powerelectronics.com/solar/subcutaneous-solar-cells-could-power-pacemakers?NL=ED-003&Issue=ED-003_20180611_ED-003_293&sfvc4enews=42&cl=article_2_b&utm_rid=CPG05000002750211&utm_campaign=17798&utm_medium=email&elq2=38abe98785b44f14a1b1d87ecbeea72e
A pacemaker is a device that is implanted in the abdomen or chest area to control abnormal heart rhythms. It utilizes electrical impulses to help the heart muscle maintain a proper rhythm and heart rate. Most pacemakers are usually powered with a primary battery that requires a replacement when it is depleted. Implant replacements due to battery depletion can account for about 25% of implantations of cardiac pacemakers.
Besides the cost of these replacements, there is always a risk of complications and added stress for the patient. Several approaches have been used to replace the primary battery with one that is rechargeable.
Over the years, various power sources have been used for pacemakers—among them a radioactive material power source using plutonium-238. Another approach involved inductive transfer in a manner similar to charging a smartphone battery. Several other techniques have utilized the movement of the heart to harvest energy for powering the pacemaker. These approaches all had problems that limited their commercial use. In addition, some of these solutions are affected by cell phone signals or an MRI procedure
A new approach proposed by Swiss researchers involves the use of solar cells placed under the skin to power an electronic implant. The Swiss researchers found that a 3.6 square centimeter solar cell is all that is needed to generate enough power during winter and summer to power a typical pacemaker.
Tomi Engdahl says:
Keysight Launches USB Instruments at 2018 IMS
http://www.mwrf.com/test-measurement/keysight-launches-usb-instruments-2018-ims?NL=MWRF-001&Issue=MWRF-001_20180615_MWRF-001_51&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17952&utm_medium=email&elq2=8149a75891fa4dbfb7e5564f6fe283f4
The company introduced a series of USB test instruments, including the Streamline Series VNAs, for use through 26.5 GHz.
One of the most significant announcements at the 2018 IEEE IMS exhibition came from Keysight Technologies, with the demonstration of several new RF/microwave test instruments in Universal Serial Bus (USB) form. The test instruments, which include a vector network analyzer (VNA), an oscilloscope, and an arbitrary waveform generator (AWG), bring new portability to the quality of Keysight measurements. They are designed to provide the full measurement capabilities of each instrument in an extremely compact configuration, while a USB-connected computer provides the processing power and control interface.
Tomi Engdahl says:
Chip Dis-Integration
https://semiengineering.com/chip-dis-integration/
Continued integration is no longer the natural way forward for semiconductors. What needs to happen to make it easier?
Companies that have been following Moore’s Law and have ridden the technology curve down to 7nm are having to rethink many of their options, especially if the content includes any high-speed analog. But problems exist even for chips that are completely digital.
Meanwhile, companies looking at cost-sensitive, battery-powered IoT edge devices are quickly migrating from designs made from standard parts integrated on a board to SoCs that combine MEMS, analog, RF and digital. They are following the technology curve at a very controlled pace. And while they are looking at chip integration, they are very concerned about additional, unwanted functionality in IP.
Tomi Engdahl says:
Near-Threshold Issues Deepen
https://semiengineering.com/near-threshold-issues-widen/
Process variation plus timing are adding to low-power challenges at the most advanced nodes.
Tomi Engdahl says:
Complexity, Reliability And Cost
https://semiengineering.com/complexity-reliability-and-cost/
Fraunhofer EAS’s top scientist digs into new technical and business challenges shaping the semiconductor industry.
SE: What is the biggest challenge you see in the semiconductor industry?
Schneider: Complexity. You have complexity in the system, in the structure, in the function, in the value chain, and in customer supplier relations. Supporting people to design systems, to make them, to bring them to market more quickly, is the most important problem we’re dealing with right now.
Tomi Engdahl says:
MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imagination last year for $65 million while Imagination itself was in the process of being acquired by Chinese-backed VC firm Canyon Bridge. Tallwood has previously made investments in Wave. Terms of this deal were not disclosed.
Source: https://semiengineering.com/the-week-in-review-design-134/
Tomi Engdahl says:
Solving Six Low-Power Debug Pitfalls
http://www.electronicdesign.com/power/solving-six-low-power-debug-pitfalls?NL=ED-003&Issue=ED-003_20180614_ED-003_604&sfvc4enews=42&cl=article_1_b&utm_rid=CPG05000002750211&utm_campaign=17800&utm_medium=email&elq2=b95a23eb058f46c18ef0d5ee9bfa5c21
Simulation-based debug challenges arise when verifying the behavior of a power-managed SoC from the front-end design phase through the back-end implementation phase.
Tomi Engdahl says:
https://www.uusiteknologia.fi/2018/06/18/usb-liitettava-oskilloskooppi-kaksi-muutakin/
Tomi Engdahl says:
CEO Outlook On Chip Industry
https://semiengineering.com/ceo-outlook-on-chip-industry-2/
Part 3: The growing impact of security on design, and where the discontinuities and opportunities will be over the next five years.
Tomi Engdahl says:
Three Steps To Low Power Coverage Closure
https://semiengineering.com/three-steps-to-low-power-coverage-closure/
Verifying the complex interactions between power elements at a high abstraction level.
Low-power design and verification is becoming more complex. Yet it is critical that all power elements are verified, and it is even more important to verify the complex interactions between these elements at a high abstraction level.
However, power-aware coverage closure is difficult to attain and complex by nature. Existing low-power coverage methodologies are error prone and highly time consuming. A faster and more direct approach is needed.
It is a challenge to capture the coverage information of UPF objects and power states for the following reasons:
Power states are written in an abstract manner in UPF
There is no pre-defined coverage metric to capture power states and their transitions
The Unified Coverage Interoperability Standard (UCIS) defines various standard metrics related to coverage items; however, it does not provide any metric to capture power intent
In this article we present a three-step methodology using UPF 3.0 HDL package functions with SystemVerilog coverage constructs to achieve coverage of key design failure scenarios found in low power designs.